Patents by Inventor Hatsuhide Igarashi
Hatsuhide Igarashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8508412Abstract: A semiconductor device, includes a chip, a first external terminal, a second external terminal, and a partial antenna wiring that is coupled to the first external terminal, and that constitutes a matching circuit, wherein the chip includes first and second electrode pads that are coupled to the partial antenna wiring, a third electrode pad that is different from each of the first and second electrode pads, and that is coupled to the second external terminal, and an electrostatic discharge (ESD) protection circuit that is coupled to the third electrode pad.Type: GrantFiled: May 11, 2011Date of Patent: August 13, 2013Assignee: Renesas Electronics CorporationInventor: Hatsuhide Igarashi
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Patent number: 8330581Abstract: To provide an IC tag, a method of controlling the IC tag, and an IC tag system which can reduce a communication sequence between the reader/writer and the IC tag and can shorten a communication period or a period necessary for executing the command. According to an embodiment of the invention, an IC tag that executes a command processing based on a command received from a redder/writer, includes: a command analyzing unit determining an execution condition of the command received from the redder/writer; and a command execution unit executing a first command processing if the execution condition is met, and executing a second command processing different from the first command processing if the execution condition is not met.Type: GrantFiled: April 9, 2012Date of Patent: December 11, 2012Assignee: Renesas Electronics CorporationInventors: Kazuhiro Akiyama, Hatsuhide Igarashi, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino
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Publication number: 20120194321Abstract: To provide an IC tag, a method of controlling the IC tag, and an IC tag system which can reduce a communication sequence between the reader/writer and the IC tag and can shorten a communication period or a period necessary for executing the command. According to an embodiment of the invention, an IC tag that executes a command processing based on a command received from a redder/writer, includes: a command analyzing unit determining an execution condition of the command received from the redder/writer; and a command execution unit executing a first command processing if the execution condition is met, and executing a second command processing different from the first command processing if the execution condition is not met.Type: ApplicationFiled: April 9, 2012Publication date: August 2, 2012Inventors: Kazuhiro AKIYAMA, Hatsuhide Igarashi, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino
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Patent number: 8174365Abstract: To provide an IC tag, a method of controlling the IC tag, and an IC tag system which can reduce a communication sequence between the reader/writer and the IC tag and can shorten a communication period or a period necessary for executing the command. According to an embodiment of the invention, an IC tag that executes a command processing based on a command received from a redder/writer, includes: a command analyzing unit determining an execution condition of the command received from the redder/writer; and a command execution unit executing a first command processing if the execution condition is met, and executing a second command processing different from the first command processing if the execution condition is not met.Type: GrantFiled: September 26, 2006Date of Patent: May 8, 2012Assignee: Renesas Electronics CorporationInventors: Kazuhiro Akiyama, Hatsuhide Igarashi, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino
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Patent number: 8115562Abstract: Disclosed is an oscillator in which current consumption relating to oscillation is reduced. The oscillator comprises: an amplifier to an input and output of which a piezoelectric oscillator and a feedback resistor are connected in parallel, and which is constituted by a CMOS logic inverter circuit; and a control circuit, which is constituted by a CMOS logic circuit, for clamping input/output levels of the amplifier and halting oscillation before oscillation start-up, unclamping the input/output levels at beginning of oscillation start-up and supplying a pulse signal to an output terminal of the amplifier a prescribed period of time after the beginning of oscillation start-up.Type: GrantFiled: September 25, 2009Date of Patent: February 14, 2012Assignee: Renesas Electronics CorporationInventor: Hatsuhide Igarashi
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Publication number: 20110216455Abstract: A semiconductor device, includes a chip, a first external terminal, a second external terminal, and a partial antenna wiring that is coupled to the first external terminal, and that constitutes a matching circuit, wherein the chip includes first and second electrode pads that are coupled to the partial antenna wiring, a third electrode pad that is different from each of the first and second electrode pads, and that is coupled to the second external terminal, and an electrostatic discharge (ESD) protection circuit that is coupled to the third electrode pad.Type: ApplicationFiled: May 11, 2011Publication date: September 8, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Hatsuhide Igarashi
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Patent number: 7973395Abstract: A semiconductor device includes: a semiconductor chip configured to process a signal in a radio frequency band; two conductive antenna connection pins connected with two external antenna conductors, respectively; an island for the semiconductor chip to be mounted thereon; a suspending pin connected with the island; and an antenna connection conductor configured to connect the two antenna connection pins without connection with the island and the suspending pin. A series connection of one of the two external antenna conductors, one of the two antenna connection pins, the antenna connection conductor section, the other of the two antenna connection pins and the other of the two external antenna conductors in this order, functions as an antenna by connecting the series connection with the semiconductor chip.Type: GrantFiled: May 18, 2009Date of Patent: July 5, 2011Assignee: Renesas Electronics CorporationInventors: Hatsuhide Igarashi, Toshiyuki Yamada
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Patent number: 7973719Abstract: A semiconductor package includes an insulating substrate configured to be provided for mounting a semiconductor chip which processes a signal with a frequency in a radio frequency band. The insulating substrate includes a first external connecting electrode, a second external connecting electrode, and a partial antenna wiring. The first external connecting electrode and the second external connecting electrode are connected with the partial antenna wiring. Each of the first external connecting electrode and the second external connecting electrode is an electrode to be connected with an external antenna pattern.Type: GrantFiled: October 31, 2008Date of Patent: July 5, 2011Assignee: Renesas Electronics CorporationInventor: Hatsuhide Igarashi
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Patent number: 7889055Abstract: An IC tag according to an embodiment of the invention includes: a storage circuit having a plurality of memory cells; and a memory control circuit receiving commands by use of a radio signal to control the storage circuit based on the commands, the commands including a specific command to collectively control the plurality of memory cells, and the memory control circuit executing control corresponding to the specific command on the storage circuit based on the specific command and first key data received in association with the specific command.Type: GrantFiled: September 26, 2006Date of Patent: February 15, 2011Assignee: Renesas Electronics CorporationInventors: Kazuhiro Akiyama, Hatsuhide Igarashi, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino
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Patent number: 7717349Abstract: A semiconductor device for an IC tag comprises a receive unit for demodulating receive data from a received RF signal and a signal processing unit for detecting a command comprising data signals from the receive data demodulated by the receive unit and executing processing based on the command, wherein the signal processing unit has a command acceptance mode for detecting the command from the receive data and a command execution mode for executing the command, and cancels the data signal when the data signal is detected from the receive data in the command execution mode.Type: GrantFiled: July 28, 2005Date of Patent: May 18, 2010Assignee: NEC Electronics CorporationInventors: Kazuhiro Akiyama, Hatsuhide Igarashi, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino, Shigeki Kajimoto
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Publication number: 20100079213Abstract: Disclosed is an oscillator in which current consumption relating to oscillation is reduced. The oscillator comprises: an amplifier to an input and output of which a piezoelectric oscillator and a feedback resistor are connected in parallel, and which is constituted by a CMOS logic inverter circuit; and a control circuit, which is constituted by a CMOS logic circuit, for clamping input/output levels of the amplifier and halting oscillation before oscillation start-up, unclamping the input/output levels at beginning of oscillation start-up and supplying a pulse signal to an output terminal of the amplifier a prescribed period of time after the beginning of oscillation start-up.Type: ApplicationFiled: September 25, 2009Publication date: April 1, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Hatsuhide Igarashi
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Publication number: 20090283883Abstract: A semiconductor device includes: a semiconductor chip configured to process a signal in a radio frequency band; two conductive antenna connection pins connected with two external antenna conductors, respectively; an island for the semiconductor chip to be mounted thereon; a suspending pin connected with the island; and an antenna connection conductor configured to connect the two antenna connection pins without connection with the island and the suspending pin. A series connection of one of the two external antenna conductors, one of the two antenna connection pins, the antenna connection conductor section, the other of the two antenna connection pins and the other of the two external antenna conductors in this order, functions as an antenna by connecting the series connection with the semiconductor chip.Type: ApplicationFiled: May 18, 2009Publication date: November 19, 2009Inventors: Hatsuhide Igarashi, Toshiyuki Yamada
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Publication number: 20090115041Abstract: A semiconductor package includes an insulating substrate configured to be provided for mounting a semiconductor chip which processes a signal with a frequency in a radio frequency band. The insulating substrate includes a first external connecting electrode, a second external connecting electrode, and a partial antenna wiring. The first external connecting electrode and the second external connecting electrode are connected with the partial antenna wiring. Each of the first external connecting electrode and the second external connecting electrode is an electrode to be connected with an external antenna pattern.Type: ApplicationFiled: October 31, 2008Publication date: May 7, 2009Applicant: NEC Electronics CorporationInventor: Hatsuhide Igarashi
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Patent number: 7468668Abstract: A semiconductor device for an IC tag comprises a receive unit for demodulating receive data from a received RF signal and a signal processing unit for detecting a command comprising data signals from the receive data demodulated by the receive unit and executing processing based on the command, wherein the signal processing unit has a command acceptance mode for detecting the command from the receive data and a command execution mode for executing the command, and generates an error signal when the data signal is not detected from the receive data in the command acceptance mode.Type: GrantFiled: July 28, 2005Date of Patent: December 23, 2008Assignee: NEC Electronics CorporationInventors: Kazuhiro Akiyama, Hatsuhide Igarashi, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino, Shigeki Kajimoto
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Publication number: 20070069860Abstract: An IC tag according to an embodiment of the invention includes: a storage circuit having a plurality of memory cells; and a memory control circuit receiving commands by use of a radio signal to control the storage circuit based on the commands, the commands including a specific command to collectively control the plurality of memory cells, and the memory control circuit executing control corresponding to the specific command on the storage circuit based on the specific command and first key data received in association with the specific command.Type: ApplicationFiled: September 26, 2006Publication date: March 29, 2007Inventors: Kazuhiro Akiyama, Hatsuhide Igarashi, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino
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Publication number: 20070069865Abstract: According to an embodiment of the invention, an IC tag for receiving a command data including a first command data not requiring the IC tag to send back response data and a second command data requiring the IC tag to send back the response data using a radio signal, including: a control circuit generating a confirmation signal indicating a reception condition of first command data; and a transmitter transmitting the confirmation signal.Type: ApplicationFiled: September 28, 2006Publication date: March 29, 2007Inventors: Kazuhiro Akiyama, Hatsuhide Igarashi, Tetsuya Kawasaki, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino, Yuichi Sakurai, Tooru Miura
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Publication number: 20070069863Abstract: To provide an IC tag, a method of controlling the IC tag, and an IC tag system which can reduce a communication sequence between the reader/writer and the IC tag and can shorten a communication period or a period necessary for executing the command. According to an embodiment of the invention, an IC tag that executes a command processing based on a command received from a redder/writer, includes: a command analyzing unit determining an execution condition of the command received from the redder/writer; and a command execution unit executing a first command processing if the execution condition is met, and executing a second command processing different from the first command processing if the execution condition is not met.Type: ApplicationFiled: September 26, 2006Publication date: March 29, 2007Inventors: Kazuhiro Akiyama, Hatsuhide Igarashi, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino
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Publication number: 20070024426Abstract: By canceling the invalidation, there is provided an IC tag that can be reused after the IC tag's function was invalidated. An IC tag according to an embodiment operates in accordance with a standard protocol and a non-standard protocol and includes a control circuit for switching an operational mode, when receiving a KILL command during an operation based on the standard protocol, to an invalidated state based on the non-standard protocol, and when receiving a KILL cancel command during an operation based on the non-standard protocol, to a normal state based on the standard protocol.Type: ApplicationFiled: July 27, 2006Publication date: February 1, 2007Inventors: Kazuhiro Akiyama, Koutarou Satou, Hatsuhide Igarashi
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Publication number: 20060022798Abstract: A communication system comprises an IC tag, and a reader/writer for performing radio communication with the IC tag. The reader/writer further comprises an encoding unit for encoding a digital signal having at least one bit and generating an encoded signal and a transmission unit for transmitting a modulated wave acquired by modulating a carrier based on the encoded signal during an acceptance period when the encoded signal is accepted in the IC tag, and transmitting the carrier to the IC tag during an execution period when the processing based on the encoded signal is executed in the IC tag. The IC tag further comprises a receive unit for receiving the modulated wave or the carrier transmitted from the reader/writer and a power supply voltage generation unit for generating the power supply voltage based on the received modulated wave or the carrier.Type: ApplicationFiled: July 28, 2005Publication date: February 2, 2006Inventors: Kazuhiro Akiyama, Hatsuhide Igarashi, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino, Shigeki Kajimoto
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Publication number: 20060022804Abstract: A semiconductor device for an IC tag comprises a receive unit for demodulating receive data from a received RF signal and a signal processing unit for detecting a command comprising data signals from the receive data demodulated by the receive unit and executing processing based on the command, wherein the signal processing unit has a command acceptance mode for detecting the command from the receive data and a command execution mode for executing the command, and generates an error signal when the data signal is not detected from the receive data in the command acceptance mode.Type: ApplicationFiled: July 28, 2005Publication date: February 2, 2006Inventors: Kazuhiro Akiyama, Hatsuhide Igarashi, Seiichi Okamoto, Toshiyuki Miyashita, Kazumi Seki, Tatsuya Uchino, Shigeki Kajimoto