Patents by Inventor Hayato Goto

Hayato Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11244239
    Abstract: A search device updates positions and momentums of a plurality of virtual particles, for each unit time from an initial time to an end time. The search device, for each unit time, calculates, for each of the particles, a position at a target time of a corresponding particle, calculates, for each of a plurality of nodes, a first accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to outgoing two or more directed edges, calculates, for each of the nodes, a second accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to incoming two or more directed edges, and calculates, for each of the particles, a momentum at the target time of a corresponding particle based on the first accumulative value and the second accumulative value.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: February 8, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kosuke Tatsumura, Hayato Goto, Masaya Yamasaki, Ryo Hidaka, Yoshisato Sakai
  • Publication number: 20220019714
    Abstract: According to an embodiment, a calculation device includes a memory and one or more processors coupled to the memory. The one or more processors are configured to: repeat a processing procedure including a first variable update and a second variable update; and display an image on a display device. The one or more processors are further configured to: while repeating the processing procedure, output values of the updated first variables xi and second variables yi, and when repetition of the processing procedure is finished, output a sign of the last updated first variable xi; and display on the display device a monitoring image representing a temporal change in at least some of the first variables xi and the second variables yi, based on the output values of the first variables xi and the second variables yi.
    Type: Application
    Filed: September 15, 2021
    Publication date: January 20, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA DIGITAL SOLUTIONS CORPORATION
    Inventors: Kotaro ENDO, Hayato GOTO, Kosuke TATSUMURA, Yoshisato SAKAI
  • Publication number: 20220019715
    Abstract: An information processing device includes a storage unit and a processing circuit. The storage unit is configured to store a first variable which is an element of a first vector and a second variable which is an element of a second vector. The processing circuit is configured to update the first variable by multiplying the second variable weighted with a first coefficient by a time step and adding the multiplied second variable to the corresponding first variable, update the second variable by weighting the first variable with the time step and a second coefficient, adding the weighted first variable to the corresponding second variable, calculating a problem term using the plurality of first variables, and adding the problem term multiplied by the time step to the second variable, update the time step, and monotonically increase or monotonically decrease the second coefficient depending on the number of updates.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 20, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA DIGITAL SOLUTIONS CORPORATION
    Inventors: Toru ITO, Hayato GOTO, Kosuke TATSUMURA, Masaru SUZUKI
  • Publication number: 20220012307
    Abstract: An information processing device includes a storage unit and a processing circuit, and repeatedly updates a first vector having a first variable as an element and a second vector having a second variable as an element. The processing circuit updates the first vector by weighted addition of the corresponding second variable to the first variable; stores the updated first vector in the storage unit as a searched vector; performs weighting of the first variable with a first coefficient that monotonically increases depending on the number of updates and adds the weighted first variable to the corresponding second variable; calculates a problem term using the first variables; adds the problem term to the second variable; calculates a correction term including an inverse number of a distance between the first vector to be updated and the searched vector; and adds the correction term to the second variable to update the second vector.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 13, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA DIGITAL SOLUTIONS CORPORATION
    Inventors: Masaru SUZUKI, Hayato GOTO, Kosuke TATSUMURA
  • Publication number: 20220012306
    Abstract: An information processing device includes a storage unit and a processing circuit. The storage unit is configured to store a first variable and the second variable. The processing circuit is configured to update a first vector having the first variable by weighted addition of the corresponding second variable to the first variable, update a second vector having the second variable by weighting the first variable with a first coefficient that monotonically increases or monotonically decreases depending on the number of updates, adding the weighted first variable to the corresponding second variable, calculating a problem term using a plurality of the first variables, and adding the problem term to the second variable, and repeat updating of the first vector and the second vector, then initialize the second variable of the second vector using a pseudo random number, and then repeat updating of the first vector and the second vector again.
    Type: Application
    Filed: September 27, 2021
    Publication date: January 13, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA DIGITAL SOLUTIONS CORPORATION
    Inventors: Masaru SUZUKI, Hayato Goto, Kosuke Tatsumura
  • Publication number: 20220012017
    Abstract: An information processing device includes arithmetic circuits each configured to repeatedly update a first vector which has a first variable as an element and a second vector which has a second variable corresponding to the first variable as an element, and a data exchange circuit. Each arithmetic circuit is configured to update the first variable based on the corresponding second variable, weight the first variable with a first coefficient and add the weighted first variable to the corresponding second variable, calculate a problem term using a plurality of the first variables, and add the problem term to the second variable; different values are set as the first coefficients in the respective arithmetic circuits. The data exchange circuit is configured to execute at least one of exchange of the first vector and the second vector or exchange of the first coefficients between the arithmetic circuits.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 13, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA DIGITAL SOLUTIONS CORPORATION
    Inventors: Masaru SUZUKI, Hayato GOTO, Kosuke TATSUMURA
  • Publication number: 20220012387
    Abstract: An information processing device includes a storage unit and a processing circuit. The storage unit is configured to store a first variable and a second variable. The processing circuit is configured to update the first variable based on the second variable, which corresponds to the first variable, weight the first variable with a first coefficient and add the weighted first variable to the corresponding second variable, calculate a problem term using the plurality of first variables, add the problem term to the second variable, calculate a first correction term including a product of a constraint term and a second coefficient, add the first correction term to the second variable, and increase absolute values of the first coefficient and the second coefficient depending on the number of updates. The constraint term is based on a constraint condition and has the first variable as an argument.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 13, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA DIGITAL SOLUTIONS CORPORATION
    Inventors: Masaru SUZUKI, Hayato GOTO, Kosuke TATSUMURA, Kotaro ENDO, Yoshisato SAKAI
  • Patent number: 11170069
    Abstract: According to one embodiment, a calculating device includes a processor. The processor acquires a data set {s} and repeats a processing procedure. The processing procedure includes first and second variable updates. The first variable update includes updating an ith entry of a first variable xi by adding a first function to the ith entry of the first variable xi. The ith entry of the first variable xi is one of a first variable set {x}. A variable of the first function includes at least a part of a second variable set {y}. The second variable update includes updating an ith entry of a second variable yi by adding a second function and a third function to the ith entry of the second variable yi. The ith entry of the second variable yi is one of the second variable set {y}. The processor outputs at least a fourth function.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: November 9, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro Kanao, Hayato Goto, Kosuke Tatsumura
  • Patent number: 11169732
    Abstract: According to one embodiment, a computing device includes a first magnetic section, a first reading section, a memory section, and a computing section. The first reading section is configured to output a first signal corresponding to a magnetization state of a partial region of the first magnetic section. The computing section is configured to perform computation using the first signal when first information stored in the memory section is in a first state, and to perform computation using a reverse signal of the first signal when the first information is in a second state.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: November 9, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Rie Sato, Koichi Mizushima, Hayato Goto
  • Publication number: 20210326407
    Abstract: A calculation apparatus according to an embodiment includes matrix multiplication circuitry, time evolution circuitry, management circuitry, and output circuitry. The matrix multiplication circuitry calculates N second intermediate variables at a first time point by matrix multiplication between N (N>=2) first intermediate variables at the first time point and a preset coefficient matrix in N rows and N columns. The time evolution circuitry calculates N first variables at a second time point and N first intermediate variables at the second time point, the second time point being a time point following one sampling period after the first time point. The management circuitry increments time point from a start time point for each sampling period and controls the above circuitry to perform a process for each time point. The output circuitry outputs N first variables at a preset end time point.
    Type: Application
    Filed: June 30, 2021
    Publication date: October 21, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kosuke TATSUMURA, Hayato GOTO
  • Publication number: 20210319075
    Abstract: According to one embodiment, a processor calculates values of variables in each step of a repetitive calculation using values of the variables calculated in a previous step, and determines whether a difference between the values of the variables calculated in each step and a particular value is larger than a first value. The processor corrects a value of the variables calculated in the previous step to be close to the particular value and calculates a value of the variables in the current step using a corrected value of the variables if the difference is larger than the first value.
    Type: Application
    Filed: June 24, 2021
    Publication date: October 14, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA DIGITAL SOLUTIONS CORPORATION
    Inventors: Yoshisato SAKAI, Hayato GOTO, Kosuke TATSUMURA
  • Publication number: 20210263705
    Abstract: According to one embodiment, a calculating device includes nonlinear oscillators, connectors, and a controller. One of the connectors connects at least two of the nonlinear oscillators. The nonlinear oscillators include first and second nonlinear oscillators. The first nonlinear oscillator includes a first circuit part and a first conductive member. The first circuit part includes first and second Josephson junctions. The second nonlinear oscillator includes a second circuit part and a second conductive member. The second circuit part includes third and fourth Josephson junctions. Numbers of the connectors connected to the first and second connectors are first and second numbers, respectively. The second number is greater than the first number. The controller performs at least a first operation of supplying a first signal to the first conductive member and supplying a second signal to the second conductive member. The second signal is different from the first signal.
    Type: Application
    Filed: September 4, 2020
    Publication date: August 26, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro KANAO, Hayato GOTO
  • Patent number: 11093581
    Abstract: A calculation apparatus according to an embodiment includes matrix multiplication circuitry, time evolution circuitry, management circuitry, and output circuitry. The matrix multiplication circuitry calculates N second intermediate variables at a first time point by matrix multiplication between N (N>=2) first intermediate variables at the first time point and a preset coefficient matrix in N rows and N columns. The time evolution circuitry calculates N first variables at a second time point and N first intermediate variables at the second time point, the second time point being a time point following one sampling period after the first time point. The management circuitry increments time point from a start time point for each sampling period and controls the above circuitry to perform a process for each time point. The output circuitry outputs N first variables at a preset end time point.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: August 17, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kosuke Tatsumura, Hayato Goto
  • Publication number: 20210182356
    Abstract: According to one embodiment, an information processing device includes a first processing circuit and a second processing circuit. The first processing circuit is configured to update a third vector based on basic equations. Each of the basic equations is a partial derivative of an objective function with respect to either of the variables in the objective function. The second processing circuit is configured to update the element of the first vector and update the element of the second vector. The element of the first vector smaller than a first value is set to the first value. The element of the first vector greater than a second value is set to the second value.
    Type: Application
    Filed: February 26, 2021
    Publication date: June 17, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA DIGITAL SOLUTIONS CORPORATION
    Inventors: Yoshisato SAKAI, Hayato GOTO, Kosuke TATSUMURA, Kotaro ENDO, Masaru SUZUKI
  • Patent number: 11003734
    Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes a first variable update and a second variable update. The first variable update includes updating a first variable xi by adding a first function to the first variable xi before the first variable update. The second variable update includes updating the second variable yi by adding a second function and a third function to the second variable yi before the second variable update. A variable of the first function set includes a calculation parameter. The calculation parameter is different before and after the processing procedure. The processor performs at least an output of at least one of the first variable xi obtained after the repeating of the processing procedure or a function of the first variable xi obtained after the repeating of the processing procedure.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: May 11, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hayato Goto, Taro Kanao, Kosuke Tatsumura
  • Publication number: 20210103844
    Abstract: A search device updates positions and momentums of a plurality of virtual particles, for each unit time from an initial time to an end time. The search device, for each unit time, calculates, for each of the particles, a position at a target time of a corresponding particle, calculates, for each of a plurality of nodes, a first accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to outgoing two or more directed edges, calculates, for each of the nodes, a second accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to incoming two or more directed edges, and calculates, for each of the particles, a momentum at the target time of a corresponding particle based on the first accumulative value and the second accumulative value.
    Type: Application
    Filed: August 27, 2020
    Publication date: April 8, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kosuke TATSUMURA, Hayato GOTO, Masaya YAMASAKI, Ryo HIDAKA, Yoshisato SAKAI
  • Publication number: 20210073319
    Abstract: A calculation apparatus according to an embodiment includes one or more processing circuits configured to function as an interaction unit, a first addition unit, and a time evolution unit. The interaction unit generates N first intermediate variables obtained by performing a matrix computing on the N first variables and the coefficient matrix at the first time. The first addition unit calculates N second variables at the second time at which the sampling period elapses from the first time. The time evolution unit executes a time evolution process on the N second variables at the first time to generate N first variables at the second time. If the N first variables at the second time unsatisfied a predetermined constraint condition, the time evolution unit changes the N second variables at the second time in a direction of satisfying the constraint condition.
    Type: Application
    Filed: February 26, 2020
    Publication date: March 11, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro KANAO, Kosuke TATSUMURA, Hayato GOTO
  • Publication number: 20210056160
    Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes a first variable update and a second variable update. The first variable update includes updating an ith entry of a first variable xi by adding a first function to the ith entry of the first variable xi before the first variable update. The second variable update includes updating the ith entry of the second variable yi by adding a second function and a third function to the ith entry of the second variable yi before the second variable update. The processor performs at least an output of at least one of the ith entry of the first variable xi obtained after the repeating of the processing procedure or a function of the ith entry of the first variable xi obtained after the repeating of the processing procedure.
    Type: Application
    Filed: November 6, 2020
    Publication date: February 25, 2021
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hayato GOTO, Kosuke TATSUMURA
  • Publication number: 20210004238
    Abstract: According to one embodiment, a calculating device includes a first memory, a second memory, a third memory, a first arithmetic module, a second arithmetic module, a first conductive line electrically connecting a first output terminal of the first memory and a first input terminal of the first arithmetic module, a second conductive line electrically connecting a second output terminal of the first memory and a first input terminal of the second arithmetic module, a third conductive line electrically connecting a first output terminal of the second memory and a second input terminal of the second arithmetic module, a fourth conductive line electrically connecting a first output terminal of the third memory and a third input terminal of the second arithmetic module, and a fifth conductive line electrically connecting a first output terminal of the second arithmetic module and a second input terminal of the first arithmetic module.
    Type: Application
    Filed: September 22, 2020
    Publication date: January 7, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kosuke TATSUMURA, Hayato GOTO
  • Patent number: 10860679
    Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes a first variable update and a second variable update. The first variable update includes updating an ith entry of a first variable xi by adding a first function to the ith entry of the first variable xi before the first variable update. The second variable update includes updating the ith entry of the second variable yi by adding a second function and a third function to the ith entry of the second variable yi before the second variable update. The processor performs at least an output of at least one of the ith entry of the first variable xi obtained after the repeating of the processing procedure or a function of the ith entry of the first variable xi obtained after the repeating of the processing procedure.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: December 8, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hayato Goto, Kosuke Tatsumura