Abstract: The solid-state imaging device of the present disclosure includes a signal processing unit including an AD converter that digitizes an analog pixel signal read from each pixel of the pixel array unit to a signal line, the signal processing unit transferring digitized pixel data at a first speed higher than a frame rate; a memory unit that stores the pixel data transferred from the signal processing unit; a data processing unit that reads pixel data at a second speed lower than the first speed from the memory unit; and a control unit that, when the pixel data is read from the memory unit, controls to stop operation of a current source connected with the signal line and operation of at least the AD converter of the signal processing unit.

Abstract: A reference voltage circuit for generating a reference voltage to be referred when a pixel signal is digitally converted, includes ramp voltage generating means for generating a ramp voltage which drops from a predetermined initial voltage at a certain gradient, a transistor for forming, together with the ramp voltage generating means, a current mirror circuit, and gain change means for changing a current value of a current flowing from a predetermined power supply via the transistor to change the gradient of the ramp voltage generated by the ramp voltage generating means.

Abstract: An image outputting apparatus includes a header production section for producing a header including header information formed from first and second frame information regarding whether pixel data included in a payload are of first and last lines of one frame, respectively, first line information regarding whether or not the pixel data included in the payload are valid, and second line information regarding a line number of a line formed from the pixel data included in the payload, and an error detection code for use for detection of an error of the header information. A packet production section produces a packet which includes, in the payload thereof, pixel data for one line which configure an image obtained by imaging by an imaging section and to which the header is added. An outputting section outputs the produced packet to an image processing apparatus.

Abstract: The present disclosure provides an image outputting apparatus, including, an image pickup section, an error correction code calculation section adapted to calculate an error correction code using pixel data, which configure an image obtained by image pickup by the image pickup section, as an information word, and an outputting section adapted to output coded data, which are data of a codeword obtained by adding the error correction code to the pixel data, to an image processing apparatus provided in an apparatus in which the image outputting apparatus is provided.

Abstract: There is provided a solid-state image sensor including a pixel array unit in which pixels are arrayed, the pixel including a photodiode converting an optical signal into an electrical signal, and a readout unit which reads out an analog image signal from the pixel to a signal line and processes the read out analog pixel signal in a unit of column. The readout unit includes a ?? modulator which has a function to convert the analog pixel signal in to a digital signal, and an amplifier which is arranged on an input side of the ?? modulator and amplifies the analog pixel signal read out to the signal line using a set gain to input the signal to the ?? modulator.

Abstract: An imaging device that can not only reduce noises including shading but also read out a pixel at high speed, a method for controlling the imaging device, and a camera using the imaging device are provided. In a 3-transistor-driven pixel circuit 11, the drain of a reset transistor 113 is connected to a drive signal line DRNL (n), and the drain of an amplifier transistor 114 is connected to a source voltage VDD. A row drive circuit 12a quickly decreases the voltage level applied to the drive signal line DRNL (n) from a high-level voltage VH to a lowest level voltage VLL, then increases it from the lowest level voltage VLL to a low-level voltage VL, and then gradually returns it to the high-level voltage VH.

Abstract: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage Vx are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage Vx, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become ?W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

Abstract: The present disclosure relates to an image pickup device, a control method, and an image pickup apparatus, which can implement more various data outputs. An image pickup apparatus of the present disclosure includes a pixel array in which incident light of an object is photoelectrically converted by a photoelectric conversion element at each of a plurality of pixels arranged in a matrix form, a selection unit that selects the number of A/D converters that output a pixel signal of each pixel in the pixel array, and a control unit that controls the selection unit and causes the selection unit to select the number of the A/D converters according to a request. The present disclosure can be applied to an image pickup device, a control method, and an image pickup apparatus.

Abstract: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage VX are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage VX, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become ?W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

Abstract: Disclosed herein is an image pickup circuit including: amplifying means for amplifying a charge corresponding to an amount of light received by a photodetector, and outputting a pixel signal; ramp signal generating means for generating a ramp signal whose voltage drops with a fixed slope from a predetermined initial voltage; and comparing means for comparing the pixel signal output by the amplifying means with the ramp signal output by the ramp signal generating means. A reference potential of the pixel signal output by the amplifying means and a reference potential of the ramp signal output by the ramp signal generating means are at a same level.

Abstract: A solid-state imaging device includes: a pixel section having pixels performing photoelectric conversion arranged in a matrix form; a pixel signal reading unit including an AD converting part that reads pixel signals in a unit of pixels, and compares a reference signal as a ramp waveform with the pixel signals to perform AD conversion; a clamp unit clamping the signal line with a clamp voltage such that the pixel signals are held at or greater than a set voltage; a correction bias circuit generating a clamp voltage according to a clamp voltage set value supplied and supplies the clamp voltage to the clamp unit; and a correction bias selecting unit selecting the clamp voltage set value such that the clamp voltage is generated in association with slope determining information for determining a slope of the reference signal, and supplies the clamp voltage set value to the correction bias circuit.

Abstract: Disclosed herein is an image pickup circuit including: amplifying means for amplifying a charge corresponding to an amount of light received by a photodetector, and outputting a pixel signal; ramp signal generating means for generating a ramp signal whose voltage drops with a fixed slope from a predetermined initial voltage; and comparing means for comparing the pixel signal output by the amplifying means with the ramp signal output by the ramp signal generating means. A reference potential of the pixel signal output by the amplifying means and a reference potential of the ramp signal output by the ramp signal generating means are at a same level.

Abstract: A solid-state imaging device includes plural photoelectric conversion means arranged along light receiving surfaces, readout means for reading out signal charge generated in the photoelectric conversion means, a voltage supply means for supplying various levels of voltages to respective units including the photoelectric conversion means and the readout means, a detection means for detecting level change of a prescribed supply voltage in supply voltages by the voltage supply means and a control means for controlling so that the level change is converged when level change of the prescribed supply voltage is detected by the detection means.

Abstract: There is provided a solid-state imaging device including a plurality of pixels which are arranged in a two-dimensional array form and in each of which color separation is performed in a substrate depth direction. The solid-state imaging device includes a pixel addition section which performs addition, when pixel signals of the plurality of pixels are added up to be outputted, by setting addition regions of pixel signals of a first color component to be shifted from addition regions of pixel signals of a second color component at regular intervals.

Abstract: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage VX are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage VX, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become ?W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

Abstract: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage Vx are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage Vx, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become ?W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

Abstract: An imaging device is disclosed. The device includes: a unit pixel that outputs an analog electric signal in accordance with a signal charge; a local voltage supply circuit that generates a local voltage different from an operation voltage; a reference signal generation section that generates a reference signal based on the local voltage provided by the local voltage supply circuit; and a processing section that converts, by referring to the reference signal generated by the reference signal generation section, the analog signal provided by the unit pixel into a digital signal. In the imaging device, the reference signal generation section keeps constant a load current of the local voltage supply circuit in an operating state.

Abstract: A solid-state imaging device includes: a pixel section having pixels performing photoelectric conversion arranged in a matrix form; a pixel signal reading unit including an AD converting part that reads pixel signals in a unit of pixels, and compares a reference signal as a ramp waveform with the pixel signals to perform AD conversion; a clamp unit clamping the signal line with a clamp voltage such that the pixel signals are held at or greater than a set voltage; a correction bias circuit generating a clamp voltage according to a clamp voltage set value supplied and supplies the clamp voltage to the clamp unit; and a correction bias selecting unit selecting the clamp voltage set value such that the clamp voltage is generated in association with slope determining information for determining a slope of the reference signal, and supplies the clamp voltage set value to the correction bias circuit.

Abstract: An image outputting apparatus includes a header production section for producing a header including header information formed from first and second frame information regarding whether pixel data included in a payload are of first and last lines of one frame, respectively, first line information regarding whether or not the pixel data included in the payload are valid, and second line information regarding a line number of a line formed from the pixel data included in the payload, and an error detection code for use for detection of an error of the header information. A packet production section produces a packet which includes, in the payload thereof, pixel data for one line which configure an image obtained by imaging by an imaging section and to which the header is added. An outputting section outputs the produced packet to an image processing apparatus.

Abstract: The present disclosure provides an image outputting apparatus, including, an image pickup section, an error correction code calculation section adapted to calculate an error correction code using pixel data, which configure an image obtained by image pickup by the image pickup section, as an information word, and an outputting section adapted to output coded data, which are data of a codeword obtained by adding the error correction code to the pixel data, to an image processing apparatus provided in an apparatus in which the image outputting apparatus is provided.