Patents by Inventor Hazel Deborah Schofield

Hazel Deborah Schofield has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Chip scale surface mounted device and process of manufacture
    Patent number: 7476979
    Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: January 13, 2009
    Assignee: International Rectifier Corporation
    Inventors: Martin Standing, Hazel Deborah Schofield
  • Chip scale surface mounted device and process of manufacture
    Patent number: 7253090
    Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: August 7, 2007
    Assignee: International Rectifier Corporation
    Inventors: Martin Standing, Hazel Deborah Schofield
  • Chip scale surface mounted device and process of manufacture
    Patent number: 6890845
    Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: May 10, 2005
    Assignee: International Rectifier Corporation
    Inventors: Martin Standing, Hazel Deborah Schofield
  • Chip scale surface mounted device and process of manufacture
    Publication number: 20040224438
    Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom.
    Type: Application
    Filed: June 7, 2004
    Publication date: November 11, 2004
    Applicant: International Rectifier Corporation
    Inventors: Martin Standing, Hazel Deborah Schofield
  • Chip scale surface mounted device and process of manufacture
    Patent number: 6767820
    Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: July 27, 2004
    Assignee: International Rectifier Corporation
    Inventors: Martin Standing, Hazel Deborah Schofield
  • Chip scale surface mounted device and process of manufacture
    Publication number: 20040038509
    Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom.
    Type: Application
    Filed: August 5, 2003
    Publication date: February 26, 2004
    Applicant: International Rectifier Corporation
    Inventors: Martin Standing, Hazel Deborah Schofield
  • Chip scale surface mounted device and process of manufacture
    Publication number: 20040026796
    Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom.
    Type: Application
    Filed: August 5, 2003
    Publication date: February 12, 2004
    Applicant: International Rectifier Corporation
    Inventors: Martin Standing, Hazel Deborah Schofield
  • Chip scale surface mounted device and process of manufacture
    Patent number: 6624522
    Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: September 23, 2003
    Assignee: International Rectifier Corporation
    Inventors: Martin Standing, Hazel Deborah Schofield
  • Conductive clip for a semiconductor package
    Patent number: D503691
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: April 5, 2005
    Assignee: International Rectifier Corporation
    Inventors: Martin Standing, Hazel Deborah Schofield