Patents by Inventor He Lin

He Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978814
    Abstract: A photo detector includes a superlattice with an undoped first semiconductor layer including undoped intrinsic semiconductor material, a doped second semiconductor layer having a first conductivity type on the first semiconductor layer, an undoped third semiconductor layer including undoped intrinsic semiconductor material on the second semiconductor layer, and a fourth semiconductor layer having a second opposite conductivity type on the third semiconductor layer, along with a first contact having the first conductivity type in the first, second, third, and fourth semiconductor layers, and a second contact having the second conductivity type and spaced apart from the first contact in the first, second, third, and fourth semiconductor layers. An optical shield on a second shielded portion of a top surface of the fourth semiconductor layer establishes electron and hole lakes.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: May 7, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: He Lin, Sameer Pendharkar
  • Publication number: 20240142512
    Abstract: A semiconductor device testing system, with a platform for supporting a semiconductor substrate, a light emitting system directed toward the platform, a controller, coupled to the light emitting system and adapted to selectively alter an operational parameter of the light emitting system, and a tester configured to characterize an electrical parameter of an electrical device formed in or over the semiconductor substrate while the electrical device is illuminated by one or more wavelengths of light emitted by the light emitting system under direction of the controller.
    Type: Application
    Filed: October 31, 2022
    Publication date: May 2, 2024
    Inventors: Zhi Peng Feng, Ren Hui Fan, Alfred Griffin, He Lin
  • Publication number: 20220167857
    Abstract: An intelligent portable medical instrument has an information processing unit and a data storage unit which are connected to a measurement and human body data collection unit. The measurement and human body data collection unit measures electrical, chemical, and acoustic data and sends the data to the information processing unit. The information processing unit compares the measured human physiological index data with the standard ranges of values and makes a preliminary health diagnosis opinion. The preliminary health diagnosis opinion and the measured data are transmitted to an in vitro unit which preferably uploads the information to a cloud server. The in vivo portion of the intelligent portable medical instrument is provided by a single integrated circuit.
    Type: Application
    Filed: November 29, 2020
    Publication date: June 2, 2022
    Inventor: He Lin
  • Patent number: 11321991
    Abstract: A system for providing a gaming trend display at a gaming table comprising a processing device, memory and a display device for displaying historical Baccarat game outcomes in one or more predefined formats stored in memory, the systems and methods comprising a data communication device for detecting a new game outcome, the processing device converting the new game outcome for display in the one or more predefined formats on the display device and responsive to updating the display device with the new game outcome, activating the display of an illustrative game outcome in the one or more predefined formats, wherein the illustrative game outcome has the display characteristics of being visually distinguishable from the historical game outcomes, and wherein the illustrative game outcome display is deactivated responsive to receiving a new game outcome detected by the data communication device.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: May 3, 2022
    Inventor: He Lin
  • Patent number: 11271072
    Abstract: A trench capacitor includes a plurality of trenches in a semiconductor substrate. A first polysilicon layer is located within the plurality of trenches and over a top surface of the substrate. The first polysilicon layer is continuous between the plurality of trenches. The trench capacitor further includes a plurality of second polysilicon layers. Each of the second polysilicon layers fills a corresponding trench of the plurality of trenches. The second polysilicon layers each extend to a top surface of the first polysilicon layer.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: March 8, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jiao Jia, Zhipeng Feng, He Lin, Yunlong Liu, Manoj Jain
  • Publication number: 20210408306
    Abstract: A photo detector includes a superlattice with an undoped first semiconductor layer including undoped intrinsic semiconductor material, a doped second semiconductor layer having a first conductivity type on the first semiconductor layer, an undoped third semiconductor layer including undoped intrinsic semiconductor material on the second semiconductor layer, and a fourth semiconductor layer having a second opposite conductivity type on the third semiconductor layer, along with a first contact having the first conductivity type in the first, second, third, and fourth semiconductor layers, and a second contact having the second conductivity type and spaced apart from the first contact in the first, second, third, and fourth semiconductor layers. An optical shield on a second shielded portion of a top surface of the fourth semiconductor layer establishes electron and hole lakes.
    Type: Application
    Filed: September 14, 2021
    Publication date: December 30, 2021
    Inventors: He Lin, Sameer Pendharkar
  • Patent number: 11158750
    Abstract: A photo detector includes a superlattice with an undoped first semiconductor layer including undoped intrinsic semiconductor material, a doped second semiconductor layer having a first conductivity type on the first semiconductor layer, an undoped third semiconductor layer including undoped intrinsic semiconductor material on the second semiconductor layer, and a fourth semiconductor layer having a second opposite conductivity type on the third semiconductor layer, along with a first contact having the first conductivity type in the first, second, third, and fourth semiconductor layers, and a second contact having the second conductivity type and spaced apart from the first contact in the first, second, third, and fourth semiconductor layers. An optical shield on a second shielded portion of a top surface of the fourth semiconductor layer establishes electron and hole lakes.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: October 26, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: He Lin, Sameer Pendharkar
  • Patent number: 10939264
    Abstract: Apparatuses, methods and storage medium associated with cloud computing for mobile client devices are disclosed herein. In embodiments, a cloud server may include one or more processors, and a mobile computing operating system to host execution of an application. The cloud server may also include a cloud application server to interact with a cloud application client of a mobile client device to provide audio and video streams to the mobile client device, and to receive touch, key and sensor events from the mobile client device, to enable the application to be executed for the mobile client device. Other embodiments may be described or claimed.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Bin Zhu, Yi Yang, He Lin, Yuming Li, Zuo Wang, Zhouyi Xie
  • Publication number: 20210005763
    Abstract: A photo detector includes a superlattice with an undoped first semiconductor layer including undoped intrinsic semiconductor material, a doped second semiconductor layer having a first conductivity type on the first semiconductor layer, an undoped third semiconductor layer including undoped intrinsic semiconductor material on the second semiconductor layer, and a fourth semiconductor layer having a second opposite conductivity type on the third semiconductor layer, along with a first contact having the first conductivity type in the first, second, third, and fourth semiconductor layers, and a second contact having the second conductivity type and spaced apart from the first contact in the first, second, third, and fourth semiconductor layers. An optical shield on a second shielded portion of a top surface of the fourth semiconductor layer establishes electron and hole lakes.
    Type: Application
    Filed: July 3, 2019
    Publication date: January 7, 2021
    Applicant: Texas Instruments Incorporated
    Inventors: He Lin, Sameer Pendharkar
  • Publication number: 20200250935
    Abstract: Systems and methods for providing wagering games associated with Baccarat, including modified versions of Baccarat described herein, which are configured for receiving and determining the outcome of the wager for the associated game based on the satisfaction of at least one of the following: the banker hand score being four; the banker hand score being six and having three playing cards in the banker hand; and the banker hand score and player hand score both being six and both the player hand and banker hand having three playing cards; and the banker hand score being eight and both the banker hand and the player hand having three playing cards.
    Type: Application
    Filed: November 5, 2019
    Publication date: August 6, 2020
    Inventor: He Lin
  • Patent number: 10720490
    Abstract: A trench capacitor includes at least one epitaxial semiconductor surface layer on a semiconductor substrate having a doping level that is less than a doping level of the semiconductor substrate. A plurality of trenches are formed through at least one half of a thickness of the epitaxial semiconductor surface layer. The epitaxial semiconductor surface layer is thicker than a depth of the plurality of trenches. At least one capacitor dielectric layer lines a surface of the trenches. At least one trench fill layer on the dielectric layer fills the trenches.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: July 21, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: He Lin, Jiao Jia, Yunlong Liu, Manoj Jain
  • Patent number: 10692822
    Abstract: In some examples, an electrostatic discharge (ESD) device includes a substrate layer, a transition layer positioned on the substrate layer, a plurality of superlattice layers on the transition layer and including at least two doped superlattice layers. The ESD device further includes a plurality of doped contact structures extending from the transition layer to a surface of an outermost layer of the plurality of superlattice layers, where a first of the plurality of doped contact structures comprises an anode and a second of the plurality of doped contact structures comprises a cathode, where the plurality of doped contact structures are to generate a zero capacitance ESD device.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: June 23, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: He Lin
  • Publication number: 20200161415
    Abstract: A trench capacitor includes a plurality of trenches in a semiconductor substrate. A first polysilicon layer is located within the plurality of trenches and over a top surface of the substrate. The first polysilicon layer is continuous between the plurality of trenches. The trench capacitor further includes a plurality of second polysilicon layers. Each of the second polysilicon layers fills a corresponding trench of the plurality of trenches. The second polysilicon layers each extend to a top surface of the first polysilicon layer.
    Type: Application
    Filed: January 28, 2020
    Publication date: May 21, 2020
    Inventors: JIAO JIA, ZHIPENG FENG, HE LIN, YUNLONG LIU, MANOJ JAIN
  • Publication number: 20200152729
    Abstract: A trench capacitor includes at least one epitaxial semiconductor surface layer on a semiconductor substrate having a doping level that is less than a doping level of the semiconductor substrate. A plurality of trenches are formed through at least one half of a thickness of the epitaxial semiconductor surface layer. The epitaxial semiconductor surface layer is thicker than a depth of the plurality of trenches. At least one capacitor dielectric layer lines a surface of the trenches. At least one trench fill layer on the dielectric layer fills the trenches.
    Type: Application
    Filed: January 2, 2020
    Publication date: May 14, 2020
    Inventors: HE LIN, JIAO JIA, YUNLONG LIU, MANOJ JAIN
  • Patent number: 10586844
    Abstract: A trench capacitor includes at least one epitaxial semiconductor surface layer on a semiconductor substrate having a doping level that is less than a doping level of the semiconductor substrate. A plurality of trenches are formed through at least one half of a thickness of the epitaxial semiconductor surface layer. The epitaxial semiconductor surface layer is thicker than a depth of the plurality of trenches. At least one capacitor dielectric layer lines a surface of the trenches. At least one trench fill layer on the dielectric layer fills the trenches.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: March 10, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: He Lin, Jiao Jia, Yunlong Liu, Manoj Jain
  • Patent number: 10559650
    Abstract: A trench capacitor includes a plurality of trenches in a doped semiconductor surface layer of a substrate. At least one dielectric layer lines a surface of the plurality of trenches. A second polysilicon layer that is doped is on a first polysilicon layer that is on the dielectric layer which fills the plurality of trenches. The second polysilicon layer has a higher doping level as compared to the first polysilicon layer.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: February 11, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jiao Jia, Zhipeng Feng, He Lin, Yunlong Liu, Manoj Jain
  • Patent number: 10467863
    Abstract: Systems and methods for providing wagering games associated with Baccarat, including modified versions of Baccarat described herein, which are configured for receiving and determining the outcome of the wager for the associated game based on the satisfaction of at least one of the following: the banker hand score being four; the banker hand score being six and having three playing cards in the banker hand; and the banker hand score and player hand score both being six and both the player hand and banker hand having three playing cards; and the banker hand score being eight and both the banker hand and the player hand having three playing cards.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: November 5, 2019
    Inventor: He Lin
  • Publication number: 20190229180
    Abstract: A trench capacitor includes at least one epitaxial semiconductor surface layer on a semiconductor substrate having a doping level that is less than a doping level of the semiconductor substrate. A plurality of trenches are formed through at least one half of a thickness of the epitaxial semiconductor surface layer. The epitaxial semiconductor surface layer is thicker than a depth of the plurality of trenches. At least one capacitor dielectric layer lines a surface of the trenches. At least one trench fill layer on the dielectric layer fills the trenches.
    Type: Application
    Filed: June 28, 2018
    Publication date: July 25, 2019
    Inventors: HE LIN, JIAO JIA, YUNLONG LIU, MANOJ JAIN
  • Publication number: 20190229074
    Abstract: In some examples, an electrostatic discharge (ESD) device includes a substrate layer, a transition layer positioned on the substrate layer, a plurality of superlattice layers on the transition layer and including at least two doped superlattice layers. The ESD device further includes a plurality of doped contact structures extending from the transition layer to a surface of an outermost layer of the plurality of superlattice layers, where a first of the plurality of doped contact structures comprises an anode and a second of the plurality of doped contact structures comprises a cathode, where the plurality of doped contact structures are to generate a zero capacitance ESD device.
    Type: Application
    Filed: April 1, 2019
    Publication date: July 25, 2019
    Inventor: He Lin
  • Publication number: 20190229181
    Abstract: A trench capacitor includes a plurality of trenches in a doped semiconductor surface layer of a substrate. At least one dielectric layer lines a surface of the plurality of trenches. A second polysilicon layer that is doped is on a first polysilicon layer that is on the dielectric layer which fills the plurality of trenches. The second polysilicon layer has a higher doping level as compared to the first polysilicon layer.
    Type: Application
    Filed: July 6, 2018
    Publication date: July 25, 2019
    Inventors: JIAO JIA, ZHIPENG FENG, HE LIN, YUNLONG LIU, MANOJ JAIN