Abstract: A circuit includes a fuse cell with a current mirror. The first leg of the current minor includes first and second N-type transistors coupled in series between the upper and lower rails and the second leg includes third and fourth N-type transistors coupled in series between the upper and lower rails. The size of the first N-type transistor is (Y·A1), the second N-type transistor is (X·A2), the third N-type transistor is (X·A1) and the fourth N-type transistor is (Y·A2) where X and Y are integers and A1 and A2 are the sizes of respective reference transistors. A fuse has a first terminal coupled between the first and second N-type transistors and a second terminal coupled between the third and fourth N-type transistors; a first control node on the second leg of the current minor is coupled to control the voltage at an output node of the fuse cell.

Abstract: Apparatus disclosed herein implement a fast transient precision current limiter such as may be included in an electronic voltage regulator. The current limiter includes two current sense element/current clamp control loops. A fast response time control loop first engages and clamps a current spike. A precision control loop then engages to more accurately clamp the output current to a programmed set point. The precision clamping loop includes an inner loop to linearize the precision current sense element. The inner loop forces the drain-to-source voltage (VDS) of the precision sense element to track the VDS of the regulator pass element. A more precise clamping operation results. Overall speed is not sacrificed as the fast response time clamping loop operates in parallel to protect circuitry while the precision clamping loop engages.

Abstract: There are disclosed nanoemulsion optical materials, methods of making nanoemulsion optical materials and optical articles comprising nanoemulsion optical materials. A nanoemulsion optical material includes a polymer matrix and a plurality of nano-droplets, comprising an optically interactive material, directly dispersed within the polymer matrix.

Abstract: An instrumentation amplifier (INA) that includes a first amplifier and a second amplifier coupled to the first amplifier. The first amplifier includes a first transistor. The first amplifier is configured to receive a positive phase signal of a differential signal. The second amplifier includes a second transistor and is configured to receive a negative phase signal of the differential signal. The first and second transistors each include a gate, source, and drain. The first transistor drain is connected to the second transistor drain.

Abstract: Catheter includes an outer shaft member having a proximal section and a distal outer member. The outer shaft has an inflation lumen defined therethrough. A balloon is in fluid communication with the inflation lumen and has a proximal balloon shaft, a proximal cone portion, a working length, a distal cone portion, and a distal balloon shaft. Catheter also includes a monolithic inner tubular member extending from the outer shaft proximal section through the distal outer member and through the balloon to form a tip. The distal balloon shaft has an inner diameter and comprises a distal seal portion coupled to the inner tubular member and a proximal portion free of attachment to the inner tubular member. The length of the proximal portion of the distal balloon shaft is at least about two times the inner diameter of the distal balloon shaft. Methods of making a catheter are also provided.

Abstract: An instrumentation amplifier (INA) that includes a first amplifier and a second amplifier coupled to the first amplifier. The first amplifier includes a first transistor. The first amplifier is configured to receive a positive phase signal of a differential signal. The second amplifier includes a second transistor and is configured to receive a negative phase signal of the differential signal. The first and second transistors each include a gate, source, and drain. The first transistor drain is connected to the second transistor drain.

Abstract: Apparatus disclosed herein implement a fast transient precision current limiter such as may be included in an electronic voltage regulator. The current limiter includes two current sense element/current clamp control loops. A fast response time control loop first engages and clamps a current spike. A precision control loop then engages to more accurately clamp the output current to a programmed set point. The precision clamping loop includes an inner loop to linearize the precision current sense element. The inner loop forces the drain-to-source voltage (VDS) of the precision sense element to track the VDS of the regulator pass element. A more precise clamping operation results. Overall speed is not sacrificed as the fast response time clamping loop operates in parallel to protect circuitry while the precision clamping loop engages.

Abstract: A level formatter is provided that has differentially coupled closed loop current sources, each configured to precisely establish a current proportional to a reference voltage. A bridge circuit is differentially coupled to two supplementary current sources and controlled to rapidly switch the current from the supplementary current sources to produce output voltages at respective outputs that are approximately equal to respective one of two reference voltages.

Abstract: A shape retainer is provided for use with a bag, the shape retainer having a pillow having a form that provides structural support for maintaining a predetermined shape, and a stuffing that is provided inside the form. The shape retainer further includes an outer casing made of a fabric material, the outer casing having an interior space with pockets to hold a desiccant and sachet, and an opening through which the pillow may be inserted into or removed from the interior space, the outer casing surrounding the pillow. The shape retainer is inserted through an opening of the bag into an interior cavity of the bag, the shape retainer positioned inside the cavity to provide support to the walls of the bag.

Abstract: A method for user interface workflow composition includes defining a form of different fields, at least one of the fields in the form referencing a business object providing access to data in an external data source that is different than at least one other data source for a correspondingly different one of the fields. A set of references to both human steps and automated steps of a workflow is loaded such, each human step referencing a corresponding user interface and each human step and automated step individually including contextual data. A human step is generated for the defined form and loading into the module. Graphical elements, each representative of a selected human or automated step, are visually placed into a canvas along with an individual graphical element representative of the defined form. Transitions are defined between the human and automated steps represented by corresponding graphical elements setting forth a user interface workflow.

Abstract: A level formatter is provided that has differentially coupled closed loop current sources, each configured to precisely establish a current proportional to a reference voltage. A bridge circuit is differentially coupled to two supplementary current sources and controlled to rapidly switch the current from the supplementary current sources to produce output voltages at respective outputs that are approximately equal to respective ones of two reference voltages.

Abstract: Embodiments of stents having profiles that improve gripping of the stent on a stent delivery system are provided. Additionally, embodiments of molds for fabricating the stents are provided.

Abstract: An apparatus for regulating voltage for at least one differential transistor pair having a voltage follower buffer, the voltage follower section having a first voltage-temperature response, includes: (a) a differential amplifier having two input loci and an output locus, a first input locus of the two input loci receiving a reference voltage; (b) a temperature responsive unit coupled between the output locus and ground; and (c) a feedback line coupled between the temperature responsive unit and a second input locus of the two input loci. The temperature responsive unit has a second voltage-temperature response similar to the first voltage-temperature response.

Abstract: A high-speed front-multiplexed multi-channel LVDS-compatible repeater circuit that limits input leakage current levels in the event one or more input voltages of the circuit exceeds the supply voltage. The LVDS repeater includes a multiplexor having a plurality of differential inputs and at least one differential output. The multiplexor includes a plurality of transmission gates to allow any one of the differential inputs to be routed to any differential output. Each transmission gate includes a first PMOS transistor and an NMOS transistor. The multiplexor further includes first Schottky diodes coupled between Vcc and the back-gate nodes of the first PMOS transistors, and second PMOS transistors coupled as shunts between the gate nodes of the first PMOS transistors and the source nodes of the NMOS transistors.

Abstract: Embodiments of stents having profiles that improve gripping of the stent on a stent delivery system are provided. Additionally, embodiments of molds for fabricating the stents are provided.

Abstract: An apparatus for handling high speed data communication signals in at least one input channel. Each communication signal is encoded in signal excursions in at least one predetermined format. The apparatus includes: (a) at least one input locus coupled with each input channel for receiving the signals; (b) at least one output locus for presenting selected communication signals in a desired format in at least one output channel; and (c) a plurality of treating circuits for treating the signal excursions in a plurality of formats that include the predetermined format and the desired format. Each treating circuit is coupled with at least one respective input locus and at least one respective output locus. The apparatus presents sufficiently low capacitance between input loci and output loci to impart substantially zero time delay to the communication signals.

Abstract: A driver circuit comprises a driver portion, differential voltage input terminals, feedback circuitry, and differential voltage output terminals. The feedback circuitry connects a sample portion of the driver portion to a mixer portion of the driver portion. The sample portion may comprise an internal connection to the driver portion, for example, at a midpoint between differential outputs by the driver portion before regulation of the same differential voltages.

Abstract: An apparatus for regulating voltage for at least one differential transistor pair having a voltage follower buffer, the voltage follower section having a first voltage-temperature response, includes: (a) a differential amplifier having two input loci and an output locus, a first input locus of the two input loci receiving a reference voltage; (b) a temperature responsive unit coupled between the output locus and ground; and (c) a feedback line coupled between the temperature responsive unit and a second input locus of the two input loci. The temperature responsive unit has a second voltage-temperature response similar to the first voltage-temperature response.

Abstract: A driver circuit (20) including a differential first pair of transistors (Q1, Q2), a voltage drive stage (26) including a second pair of transistors (Q3, Q4), a first pair of nodes (N1, N2) coupled to the first pair of transistors (Q1, Q2) and to the second pair of transistors (Q3, Q4), a second pair of nodes (N3, N4) coupled to the second pair of transistors (Q3, Q4), and a dynamic current switch (28) coupled to the second pair of nodes.

Abstract: A high-speed front-multiplexed multi-channel LVDS-compatible repeater circuit that limits input leakage current levels in the event one or more input voltages of the circuit exceeds the supply voltage. The LVDS repeater includes a multiplexor having a plurality of differential inputs and at least one differential output. The multiplexor includes a plurality of transmission gates to allow any one of the differential inputs to be routed to any differential output. Each transmission gate includes a first PMOS transistor and an NMOS transistor. The multiplexor further includes first Schottky diodes coupled between Vcc and the back-gate nodes of the first PMOS transistors, and second PMOS transistors coupled as shunts between the gate nodes of the first PMOS transistors and the source nodes of the NMOS transistors.