Abstract: Provided are a tricyclodecane dimethanol composition, in which a ratio of structural isomers is controlled, and a preparation method thereof.

Abstract: The present invention relates to a phosphine precursor for the preparation of a quantum dot, and a quantum dot prepared therefrom. Using the phosphine precursor for the preparation of a quantum dot of the present invention, a quantum dot with improved luminous efficiency and higher luminous color purity can be provided.

Abstract: Provided are a tricyclodecane dimethanol composition which may be suitably used in preparing a polyester resin exhibiting excellent solvent resistance and chemical resistance when forming a coating film and having excellent solubility in organic solvents or water, and a preparation method thereof.

Abstract: Provided are a tricyclodecane dimethanol composition which may be usefully applied to the preparation of a high heat resistant polyester by reducing the content of impurities, and a preparation method thereof.

Abstract: Provided are a tricyclodecane dimethanol composition, in which a ratio of isomers is controlled, and a preparation method thereof.

Abstract: Provided are a tricyclodecane dimethanol composition which may be suitably used in preparing a polyester resin exhibiting excellent solvent resistance and chemical resistance when forming a coating film and having excellent solubility in organic solvents or water, and a preparation method thereof.

Abstract: Provided are a tricyclodecane dimethanol composition, in which a ratio of structural isomers is controlled, and a preparation method thereof.

Abstract: Provided are a tricyclodecane dimethanol composition which may be usefully applied to the preparation of a high heat resistant polyester by reducing the content of impurities, and a preparation method thereof.

Abstract: The present invention relates to a phosphine precursor for the preparation of a quantum dot, and a quantum dot prepared therefrom. Using the phosphine precursor for the preparation of a quantum dot of the present invention, a quantum dot with improved luminous efficiency and higher luminous color purity can be provided.

Abstract: A method of preparing 3(4),8(9)-bisformyltricyclo[5.2.1.02,6]decane is provided. According to the present invention, 3(4),8(9)-bisformyltricyclo[5.2.1.02,6]decane (TCDDA) may be prepared with a high conversion rate and purity without a separate catalyst recovery process.

Abstract: A method for cycloaddition of dimethyl muconate is disclosed. According to the method, a direct transferring of a solid phase trans,trans-dimehtyl muconate into a reactor pre-filled with ethylene gas increases the efficiency of the reaction and suppress side reactions resulting an improvements in yield and purity. Furthermore, the method is capable of obtaining a high yield of dimethylcyclohex-2-en-1,4-dicarboxylate at a lower cost, and therefore is also useful for the mass synthesis of dimethyl terephthalate.

Abstract: A method for cycloaddition of dimethyl muconate is disclosed. According to the method, a direct transferring of a solid phase trans,trans-dimehtyl muconate into a reactor pre-filled with ethylene gas increases the efficiency of the reaction and suppress side reactions resulting an improvements in yield and purity. Furthermore, the method is capable of obtaining a high yield of dimethylcyclohex-2-en-1,4-dicarboxylate at a lower cost, and therefore is also useful for the mass synthesis of dimethyl terephthalate.

Abstract: The present invention relates to a phosphine precursor for the preparation of a quantum dot, and a quantum dot prepared therefrom. Using the phosphine precursor for the preparation of a quantum dot of the present invention, a quantum dot with improved luminous efficiency and higher luminous color purity can be provided.

Abstract: The present invention relates to a phosphine precursor for the preparation of a quantum dot, and a quantum dot prepared therefrom. Using the phosphine precursor for the preparation of a quantum dot of the present invention, a quantum dot with improved luminous efficiency and higher luminous color purity can be provided.

Abstract: The present invention relates to a compound inhibiting CDK5-mediated PPARG phosphorylation and a pharmaceutical composition for treating PPARG-related diseases containing the same as an active ingredient. A compound represented by formula 1 or an optical isomer thereof according to the present invention that binds to PPARG at a high affinity level, but does not act as an agonist, thereby inducing no gene transcription; blocks CDK5, which is a cause of PPARG phosphorylation, thereby causing no side effects of existing anti-diabetic drugs; can be formulated into drugs due to improved pharmacological properties thereof; and can be favorably used as a pharmaceutical composition for treating PPARG-related diseases due to favorable treatment effects on PPARG-related diseases.

Abstract: In a DRAM device having a capacitor and a method thereof, the capacitor included in the device is characterized to have a lower electrode that passes through a plurality of interlayer insulating layers. A first interlayer insulating layer is formed on a semiconductor substrate. A first contact plug layer is formed through the first interlayer insulating to electrically contact the semiconductor substrate. An insulating layer is formed on the first interlayer insulating layer. The insulating layer is etched to form the first interlayer insulating layer and a temporary storage node hole exposing the first contact plug. The first interlayer insulating layer exposed by the temporary storage node hole and portions of the first contact plug are simultaneously etched to form a storage node hole. A lower electrode layer is conformally formed on a surface of the semiconductor substrate having the storage node hole.

Abstract: A semiconductor device includes a semiconductor layer disposed between a semiconductor substrate and a gate electrode, a back gate insulating layer pattern disposed between the semiconductor layer and the semiconductor substrate, and a gate insulating layer disposed between the semiconductor layer and the gate electrode. The semiconductor substrate extends from both sides of the back gate insulating layer pattern to the gate insulating layer and is directly in contact with a sidewall of the semiconductor layer.

Abstract: In a method of forming a DRAM device having a capacitor and a DRAM device so formed, an interlayer dielectric having at least one layer is formed on a semiconductor substrate. The interlayer dielectric layer and a predetermined portion of the semiconductor substrate are sequentially etched to form a storage node hole. A lower electrode is conformally formed in the storage node hole and on the interlayer dielectric layer. A planarization process is performed to remove a portion of the lower electrode layer that lies on the interlayer dielectric layer and to form a lower electrode in the storage node hole. A dielectric layer and an upper electrode layer are sequentially formed on the lower electrode. The upper electrode layer and the dielectric layer are sequentially patterned.

Abstract: A capacitor of a semiconductor device and a method for fabricating the same may be provided. The method may include forming an interlayer insulation layer, an etch stop layer, and/or a sacrificial insulation layer on a semiconductor substrate, patterning the interlayer insulation layer, the etch stop layer, and/or the sacrificial insulation layer to form a contact hole exposing a desired or predetermined region of the semiconductor substrate, filling the contact hole to form a contact plug, removing the sacrificial insulation layer to expose an upper portion of the contact plug, and/or forming a dielectric layer and/or a top electrode on the exposed upper portion of the contact plug.

Abstract: In a method of forming a DRAM device having a capacitor and a DRAM device so formed, an interlayer dielectric having at least one layer is formed on a semiconductor substrate. The interlayer dielectric layer and a predetermined portion of the semiconductor substrate are sequentially etched to form a storage node hole. A lower electrode is conformally formed in the storage node hole and on the interlayer dielectric layer. A planarization process is performed to remove a portion of the lower electrode layer that lies on the interlayer dielectric layer and to form a lower electrode in the storage node hole. A dielectric layer and an upper electrode layer are sequentially formed on the lower electrode. The upper electrode layer and the dielectric layer are sequentially patterned.