Patents by Inventor Hee-Ju Shin

Hee-Ju Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240129725
    Abstract: A service identifying and processing method using a wireless terminal message according to an exemplary embodiment of the present invention includes (a) receiving a wireless terminal message by a first entity which is a mobile device; and (b) expressing, by a first agent which is an information processing application program installed on the first entity, entity information of second entity based on the wireless terminal message and service confirmation information related to service provided by the second entity, through an application screen by the first agent.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 18, 2024
    Applicant: ESTORM CO., LTD.
    Inventors: Jong Hyun WOO, Tae Il LEE, Il Jin JUNG, Hee Jun SHIN, Hyung Seok JANG, Min Jae SON, Sang Heon BAEK, Seo Bin PARK, Hyo Sang KWON, Mi Ju KIM, Jung Hoon SONG, Rakhmanov DILSHOD, Dong Hee KIM, Jeon Gjin KIM
  • Patent number: 11735241
    Abstract: A magnetic memory device includes a pinned layer, a free layer, a tunnel barrier layer between the pinned layer and the free layer, a first oxide layer spaced apart from the tunnel barrier layer with the free layer therebetween, and a second oxide layer spaced apart from the free layer with the first oxide layer therebetween. The first oxide layer includes an oxide of a first material and may have a thickness of 0.3 ? to 2.0 ?. The second oxide layer may include an oxide of a second material and may have a thickness of 0.1 ? to 5.0 ?. A first oxygen affinity of the first material may be greater than a second oxygen affinity of the second material.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: August 22, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hee Ju Shin, Sang Hwan Park, Se Chung Oh, Ki Woong Kim, Hyeon Woo Seo
  • Patent number: 11725271
    Abstract: A sputtering apparatus including a chamber, a stage inside the chamber and configured to receive a substrate thereon, a first sputter gun configured to provide a sputtering source to an inside of the chamber, a first RF source configured to provide a first power having a first frequency to the first sputter gun, and a second RF source configured to provide a second power having a second frequency to the first sputter gun, the second frequency being lower than the first frequency may be provided.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: August 15, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki Woong Kim, Hyeon Woo Seo, Hee Ju Shin, Se Chung Oh, Hyun Cho
  • Publication number: 20220375983
    Abstract: An image sensor is provided. The image sensor includes unit pixels inside the substrate; a pixel separation pattern provided between the unit pixels, inside the substrate; a first inter-wiring insulating film provided on the first surface of the substrate; a pad pattern provided inside the first inter-wiring insulating film; a first connection pattern provided inside the first inter-wiring insulating film, an upper surface of the first connection pattern and an upper surface of the first inter-wiring insulating film being provided along a first common plane; a second inter-wiring insulating film provided on the upper surface of the first inter-wiring insulating film; a second connection pattern provided inside the second inter-wiring insulating film, a lower surface of the second connection pattern and a lower surface of the second inter-wiring insulating film being provided along a second common plane; and a microlens provided on the second surface of the substrate.
    Type: Application
    Filed: January 12, 2022
    Publication date: November 24, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Kuk Kang, Min Ho Jang, Hoon Joo Na, Hee Ju Shin
  • Publication number: 20220235450
    Abstract: A sputtering apparatus including a chamber, a stage inside the chamber and configured to receive a substrate thereon, a first sputter gun configured to provide a sputtering source to an inside of the chamber, a first RF source configured to provide a first power having a first frequency to the first sputter gun, and a second RF source configured to provide a second power having a second frequency to the first sputter gun, the second frequency being lower than the first frequency may be provided.
    Type: Application
    Filed: April 15, 2022
    Publication date: July 28, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ki Woong KIM, Hyeon Woo SEO, Hee Ju SHIN, Se Chung OH, Hyun CHO
  • Patent number: 11339467
    Abstract: A sputtering apparatus including a chamber, a stage inside the chamber and configured to receive a substrate thereon, a first sputter gun configured to provide a sputtering source to an inside of the chamber, a first RF source configured to provide a first power having a first frequency to the first sputter gun, and a second RF source configured to provide a second power having a second frequency to the first sputter gun, the second frequency being lower than the first frequency may be provided.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: May 24, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki Woong Kim, Hyeon Woo Seo, Hee Ju Shin, Se Chung Oh, Hyun Cho
  • Publication number: 20220020409
    Abstract: A magnetic memory device includes a pinned layer, a free layer, a tunnel barrier layer between the pinned layer and the free layer, a first oxide layer spaced apart from the tunnel barrier layer with the free layer therebetween, and a second oxide layer spaced apart from the free layer with the first oxide layer therebetween. The first oxide layer includes an oxide of a first material and may have a thickness of 0.3 ? to 2.0 ?. The second oxide layer may include an oxide of a second material and may have a thickness of 0.1 ? to 5.0 ?. A first oxygen affinity of the first material may be greater than a second oxygen affinity of the second material.
    Type: Application
    Filed: March 16, 2021
    Publication date: January 20, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hee Ju SHIN, Sang Hwan PARK, Se Chung OH, Ki Woong KIM, Hyeon Woo SEO
  • Patent number: 11176982
    Abstract: A semiconductor device includes a storage layer including at least one first magnetic layer and a reference layer facing the storage layer and including at least one second magnetic layer. The device also includes a tunnel barrier layer between the storage layer and the reference layer. The device further includes at least one spin-orbit torque line adjacent the storage layer.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: November 16, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Hoon Kim, Hee Ju Shin, Ung Hwan Pi
  • Patent number: 11004900
    Abstract: An MRAM device includes a first conductive pattern including a material generating a spin orbital torque, a torque transfer pattern contacting a portion of an upper surface of the first conductive pattern, an insulation pattern on a side of the torque transfer pattern and covering the first conductive pattern, and a magnetic tunnel junction (MTJ) structure on the torque transfer pattern, the MTJ structure including a free layer pattern, a tunnel barrier pattern, and a fixed layer pattern sequentially stacked.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: May 11, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hee-Ju Shin, Ung-Hwan Pi
  • Publication number: 20210027822
    Abstract: A semiconductor device includes a storage layer including at least one first magnetic layer and a reference layer facing the storage layer and including at least one second magnetic layer. The device also includes a tunnel barrier layer between the storage layer and the reference layer. The device further includes at least one spin-orbit torque line adjacent the storage layer.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 28, 2021
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Hoon KIM, Hee Ju Shin, Ung Hwan Pi
  • Publication number: 20210010127
    Abstract: A sputtering apparatus including a chamber, a stage inside the chamber and configured to receive a substrate thereon, a first sputter gun configured to provide a sputtering source to an inside of the chamber, a first RF source configured to provide a first power having a first frequency to the first sputter gun, and a second RF source configured to provide a second power having a second frequency to the first sputter gun, the second frequency being lower than the first frequency may be provided.
    Type: Application
    Filed: February 18, 2020
    Publication date: January 14, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ki Woong Kim, Hyeon Woo Seo, Hee Ju Shin, Se Chung Oh, Hyun Cho
  • Patent number: 10825497
    Abstract: A semiconductor device includes a storage layer including at least one first magnetic layer and a reference layer facing the storage layer and including at least one second magnetic layer. The device also includes a tunnel barrier layer between the storage layer and the reference layer. The device further includes at least one spin-orbit torque line adjacent the storage layer.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: November 3, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Hoon Kim, Hee Ju Shin, Ung Hwan Pi
  • Publication number: 20200251527
    Abstract: An MRAM device includes a first conductive pattern including a material generating a spin orbital torque, a torque transfer pattern contacting a portion of an upper surface of the first conductive pattern, an insulation pattern on a side of the torque transfer pattern and covering the first conductive pattern, and a magnetic tunnel junction (MTJ) structure on the torque transfer pattern, the MTJ structure including a free layer pattern, a tunnel barrier pattern, and a fixed layer pattern sequentially stacked.
    Type: Application
    Filed: July 16, 2019
    Publication date: August 6, 2020
    Inventors: Hee-Ju Shin, Ung-Hwan PI
  • Publication number: 20200082858
    Abstract: A semiconductor device includes a storage layer including at least one first magnetic layer and a reference layer facing the storage layer and including at least one second magnetic layer. The device also includes a tunnel barrier layer between the storage layer and the reference layer. The device further includes at least one spin-orbit torque line adjacent the storage layer.
    Type: Application
    Filed: March 29, 2019
    Publication date: March 12, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: JAE HOON KIM, Hee Ju Shin, Ung Hwan Pi
  • Patent number: 10128312
    Abstract: There is provided a non-volatile memory device which can enhance the reliability of a memory device by using an ovonic threshold switch (OTS) selection element including a multilayer structure. The non-volatile memory device includes a first electrode and a second electrode spaced apart from each other, a selection element layer between the first electrode and the second electrode, which is closer to the second electrode rather than to the first electrode, and which includes a first chalcogenide layer, a second chalcogenide layer, and a material layer disposed between the first and second chalcogenide layers. The first chalcogenide layer including a first chalcogenide material, and the second chalcogenide layer including a second chalcogenide material. A memory layer between the first electrode and the selection element layer includes a third chalcogenide material which is different from the first and second chalcogenide materials.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: November 13, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Zhe Wu, Jeong Hee Park, Dong Ho Ahn, Jin Woo Lee, Hee Ju Shin, Ja Bin Lee
  • Publication number: 20180040669
    Abstract: There is provided a non-volatile memory device which can enhance the reliability of a memory device by using an ovonic threshold switch (OTS) selection element including a multilayer structure. The non-volatile memory device includes a first electrode and a second electrode spaced apart from each other, a selection element layer between the first electrode and the second electrode, which is closer to the second electrode rather than to the first electrode, and which includes a first chalcogenide layer, a second chalcogenide layer, and a material layer disposed between the first and second chalcogenide layers. The first chalcogenide layer including a first chalcogenide material, and the second chalcogenide layer including a second chalcogenide material. A memory layer between the first electrode and the selection element layer includes a third chalcogenide material which is different from the first and second chalcogenide materials.
    Type: Application
    Filed: April 12, 2017
    Publication date: February 8, 2018
    Inventors: Zhe WU, Jeong Hee PARK, Dong Ho AHN, Jin Woo LEE, Hee Ju SHIN, Ja Bin LEE
  • Patent number: 9666789
    Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: May 30, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-Heon Park, Ki-Woong Kim, Hee-Ju Shin, Joon-Myoung Lee, Woo-Jin Kim, Jae-Hoon Kim, Se-Chung Oh, Yun-Jae Lee
  • Patent number: 9178135
    Abstract: A magnetic device can include a tunnel bather and a hybrid magnetization layer disposed adjacent the tunnel barrier. The hybrid magnetization layer can include a first perpendicular magnetic anisotropy (PMA) layer, a second PMA layer, and an amorphous blocking layer disposed between the first and second PMA layers. The first PMA layer can include a multi-layer film in which a first layer formed of Co and a second layer formed of Pt or Pd are alternately stacked. A first dopant formed of an element different from those of the first and second layers can also be included in the first PMA layer. The second PMA layer can be disposed between the first PMA layer and the tunnel barrier, and can include at least one element selected from a group consisting of Co, Fe, and Ni.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: November 3, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-hyun Kim, Hee-ju Shin, Woo-jin Kim, Sang-hwan Park
  • Publication number: 20150280108
    Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
    Type: Application
    Filed: June 16, 2015
    Publication date: October 1, 2015
    Inventors: JEONG-HEON PARK, KI-WOONG KIM, HEE-JU SHIN, JOON-MYOUNG LEE, WOO-JIN KIM, JAE-HOON KIM, SE-CHUNG OH, YUN-JAE LEE
  • Patent number: 9087977
    Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: July 21, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-Heon Park, Ki-Woong Kim, Hee-Ju Shin, Joon-Myoung Lee, Woo-Jin Kim, Jae-Hoon Kim, Se-Chung Oh, Yun-Jae Lee