Patents by Inventor Helmut Strack

Helmut Strack has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10651037
    Abstract: One embodiment of the invention relates to a method for fabricating a doped semiconductor zone in a semiconductor body. The method includes implanting dopant particles via one side into the semiconductor body or applying a layer containing dopant particles to one side of the semiconductor body. The method also includes irradiating the semiconductor body via the one side with further particles at least in the region containing the dopant particles. The method finally includes carrying out a thermal treatment by means of which the semiconductor body is heated, at least in the region containing the dopant particles, to a predetermined temperature in order to activate the implanted dopant particles, said temperature being less than 700° C.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: May 12, 2020
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Anton Mauder, Helmut Strack, Holger Schulze
  • Patent number: 10325996
    Abstract: A semiconductor device is produced by providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, and introducing dopant atoms of a first doping type and dopant atoms of a second doping type into the epitaxial layer.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Franz Hirler, Anton Mauder, Helmut Strack, Frank Kahlmann, Gerhard Miller
  • Publication number: 20180061962
    Abstract: A semiconductor device is produced by providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, and introducing dopant atoms of a first doping type and dopant atoms of a second doping type into the epitaxial layer.
    Type: Application
    Filed: October 4, 2017
    Publication date: March 1, 2018
    Inventors: Hans-Joachim Schulze, Franz Hirler, Anton Mauder, Helmut Strack, Frank Kahlmann, Gerhard Miller
  • Patent number: 9837280
    Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate, forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas, at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure, and at least partly removing the support structure.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: December 5, 2017
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack
  • Publication number: 20160343577
    Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate, forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas, at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure, and at least partly removing the support structure.
    Type: Application
    Filed: August 5, 2016
    Publication date: November 24, 2016
    Inventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack
  • Patent number: 9496364
    Abstract: In accordance with one component, a power field effect transistor is proposed, including a substrate, a channel, a gate electrode, and a gate insulator. The gate insulator is arranged at least partly between the gate electrode and the channel and includes a material having a hysteresis with respect to its polarization, such that a switching state of the transistor produced by a voltage applied to the gate electrode is maintained after the voltage has been switched off. Furthermore, a half-bridge circuit is proposed, including a high-side transistor in accordance with the construction according to the disclosure, and a low-side transistor, and also methods and circuits for driving.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: November 15, 2016
    Assignee: Infineon Technologies AG
    Inventors: Peter Irsigler, Johannes Georg Laven, Hans-Joachim Schulze, Helmut Strack
  • Patent number: 9437440
    Abstract: A method for producing a semiconductor device is provided. The method includes: forming in a semiconductor substrate a plurality of semiconductor mesas extending to an upper side so that adjacent semiconductor mesas are spaced apart from each other by one of a substantially empty trench and a trench substantially filled with a sacrificial layer selectively etchable with respect to the semiconductor mesas; forming a support structure mechanically connecting the semiconductor mesas spaced apart from each other by one of the substantially empty trench and the trench substantially filled with the sacrificial layer; and processing the semiconductor substrate from the upper side while the semiconductor mesas are mechanically connected via the support structure.
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: September 6, 2016
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack
  • Patent number: 9412813
    Abstract: One aspect includes a method for forming a buried material layer in a semiconductor body, including providing a semiconductor body having a first side and having a plurality of first trenches extending from the first surface into the semiconductor body. Each of the plurality of first trenches has a bottom and has at least one sidewall and the plurality of first trenches is separated from one another by semiconductor mesa regions. A first material layer is formed on the bottom of each of the plurality of first trenches such that the first material layer leaves at least one segment of at least one sidewall of each of the plurality of trenches uncovered. Each of the plurality of first trenches is filled by epitaxially growing a semiconductor material from the at least one uncovered sidewall segment. After filling the first trenches, second trenches are formed in the mesa regions.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: August 9, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans-Joachim Schulze, Anton Mauder, Helmut Strack
  • Publication number: 20150380511
    Abstract: In accordance with one component, a power field effect transistor is proposed, including a substrate, a channel, a gate electrode, and a gate insulator. The gate insulator is arranged at least partly between the gate electrode and the channel and includes a material having a hysteresis with respect to its polarization, such that a switching state of the transistor produced by a voltage applied to the gate electrode is maintained after the voltage has been switched off. Furthermore, a half-bridge circuit is proposed, including a high-side transistor in accordance with the construction according to the disclosure, and a low-side transistor, and also methods and circuits for driving.
    Type: Application
    Filed: June 30, 2015
    Publication date: December 31, 2015
    Inventors: Peter Irsigler, Johannes Georg Laven, Hans-Joachim Schulze, Helmut Strack
  • Patent number: 9171728
    Abstract: A method for forming a semiconductor device includes providing a semiconductor body which has a main surface and a first n-type semiconductor region, forming a trench which extends from the main surface into the first n-type semiconductor region, and forming a dielectric layer having fixed negative charges on a surface of the trench, by performing at least one atomic layer deposition using an organometallic precursor.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: October 27, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Hans-Joachim Schulze, Franz Hirler, Wolfgang Lehnert, Rudolf Berger, Klemens Pruegl, Helmut Strack
  • Patent number: 9117874
    Abstract: A semiconductor device, in which a first trench section is produced proceeding from a surface of a semiconductor body into the semiconductor body. A semiconductor layer is produced above the surface and above the first trench section. A further trench section is produced in the semiconductor layer in such a way that the first trench section and the further trench section form a continuous trench structure.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: August 25, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Franz Hirler, Thoralf Kautzsch, Anton Mauder, Michael Rueb, Hans-Joachim Schulze, Helmut Strack, Armin Willmeroth
  • Publication number: 20150187875
    Abstract: One aspect includes a method for forming a buried material layer in a semiconductor body, including providing a semiconductor body having a first side and having a plurality of first trenches extending from the first surface into the semiconductor body. Each of the plurality of first trenches has a bottom and has at least one sidewall and the plurality of first trenches is separated from one another by semiconductor mesa regions. A first material layer is formed on the bottom of each of the plurality of first trenches such that the first material layer leaves at least one segment of at least one sidewall of each of the plurality of trenches uncovered. Each of the plurality of first trenches is filled by epitaxially growing a semiconductor material from the at least one uncovered sidewall segment. After filling the first trenches, second trenches are formed in the mesa regions.
    Type: Application
    Filed: March 10, 2015
    Publication date: July 2, 2015
    Inventors: Hans-Joachim Schulze, Anton Mauder, Helmut Strack
  • Patent number: 9012980
    Abstract: A method of manufacturing a semiconductor device includes forming a charge compensation device structure in a semiconductor substrate. The method further includes measuring a value of an electric characteristic related to the charge compensation device. At least one of proton irradiation and annealing parameters are adjusted based on the measured value. Based on the at least one of the adjusted proton irradiation and annealing parameters the semiconductor substrate is irradiated with protons, and thereafter, the semiconductor substrate is annealed.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: April 21, 2015
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Hans Weber, Werner Schustereder, Wolfgang Jantscher, Helmut Strack
  • Patent number: 8975151
    Abstract: One aspect includes a method for forming a buried material layer in a semiconductor body, including providing a semiconductor body having a first side and having a plurality of first trenches extending from the first surface into the semiconductor body. Each of the plurality of first trenches has a bottom and has at least one sidewall and the plurality of first trenches is separated from one another by semiconductor mesa regions. A first material layer is formed on the bottom of each of the plurality of first trenches such that the first material layer leaves at least one segment of at least one sidewall of each of the plurality of trenches uncovered. Each of the plurality of first trenches is filled by epitaxially growing a semiconductor material from the at least one uncovered sidewall segment. After filling the first trenches, second trenches are formed in the mesa regions.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: March 10, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans-Joachim Schulze, Anton Mauder, Helmut Strack
  • Patent number: 8946872
    Abstract: A method for producing a semiconductor includes providing a p-doped semiconductor body having a first side and a second side; implanting protons into the semiconductor body via the first side to a target depth of the semiconductor body; bonding the first side of the semiconductor body to a carrier substrate; forming an n-doped zone in the semiconductor body by heating the semiconductor body such that a pn junction arises in the semiconductor body; and removing the second side of the semiconductor body at least as far as a space charge zone spanned at the pn junction.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: February 3, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Hans-Joachim Schulze, Helmut Strack, Hans-Joerg Timme, Wolfgang Werner
  • Patent number: 8921979
    Abstract: A method for producing a semiconductor layer is disclosed. One embodiment provides for a semiconductor layer on a semiconductor substrate containing oxygen. Crystal defects are produced at least in a near-surface region of the semiconductor substrate. A thermal process is carried out wherein the oxygen is taken up at the crystal defects. The semiconductor layer is deposited epitaxially over the near-surface region of the semiconductor substrate.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: December 30, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans-Joachim Schulze, Helmut Strack, Hans-Joerg Timme, Rainer Winkler
  • Publication number: 20140235058
    Abstract: A method for forming a semiconductor device includes providing a semiconductor body which has a main surface and a first n-type semiconductor region, forming a trench which extends from the main surface into the first n-type semiconductor region, and forming a dielectric layer having fixed negative charges on a surface of the trench, by performing at least one atomic layer deposition using an organometallic precursor.
    Type: Application
    Filed: April 24, 2014
    Publication date: August 21, 2014
    Inventors: Anton Mauder, Hans-Joachim Schulze, Franz Hirler, Wolfgang Lehnert, Rudolf Berger, Klemens Pruegl, Helmut Strack
  • Patent number: 8786012
    Abstract: A power semiconductor device has a semiconductor body which includes an active area and a peripheral area which both define a horizontal main surface of the semiconductor body. The semiconductor body further includes an n-type semiconductor layer, a pn junction and at least one trench. The n-type semiconductor layer is embedded in the semiconductor body and extends to the main surface in the peripheral area. The pn junction is arranged between the n-type semiconductor layer and the main surface in the active area. The at least one trench extends in the peripheral area from the main surface into the n-type semiconductor layer and includes a dielectric layer with fixed negative charges. In the vertical direction, the dielectric layer is arranged both below and above the pn junction. The dielectric layer with fixed negative charges typically has a negative net charge. Further, a method for forming a semiconductor device is provided.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: July 22, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Franz Hirler, Wolfgang Lehnert, Rudolf Berger, Klemens Pruegl, Hans-Joachim Schulze, Helmut Strack
  • Patent number: 8748974
    Abstract: A power semiconductor device has a semiconductor body which includes an active area and a peripheral area which both define a horizontal main surface of the semiconductor body. The semiconductor body further includes an n-type semiconductor layer, a pn junction and at least one trench. The n-type semiconductor layer is embedded in the semiconductor body and extends to the main surface in the peripheral area. The pn junction is arranged between the n-type semiconductor layer and the main surface in the active area. The at least one trench extends in the peripheral area from the main surface into the n-type semiconductor layer and includes a dielectric layer with fixed negative charges. In the vertical direction, the dielectric layer is arranged both below and above the pn junction. The dielectric layer with fixed negative charges typically has a negative net charge. Further, a method for forming a semiconductor device is provided.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: June 10, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Franz Hirler, Wolfgang Lehnert, Rudolf Berger, Klemens Pruegl, Hans-Joachim Schulze, Helmut Strack
  • Publication number: 20140141602
    Abstract: A method for producing a semiconductor device is provided. The method includes: forming in a semiconductor substrate a plurality of semiconductor mesas extending to an upper side so that adjacent semiconductor mesas are spaced apart from each other by one of a substantially empty trench and a trench substantially filled with a sacrificial layer selectively etchable with respect to the semiconductor mesas; forming a support structure mechanically connecting the semiconductor mesas spaced apart from each other by one of the substantially empty trench and the trench substantially filled with the sacrificial layer; and processing the semiconductor substrate from the upper side while the semiconductor mesas are mechanically connected via the support structure.
    Type: Application
    Filed: October 25, 2013
    Publication date: May 22, 2014
    Inventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack