Patents by Inventor Heng-Wen Ting
Heng-Wen Ting has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10483396Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a substrate. A fin is on the substrate. The fin includes silicon germanium. An interfacial layer is over the fin. The interfacial layer has a thickness in a range from greater than 0 nm to about 4 nm. A source/drain region is over the interfacial layer. The source/drain region includes silicon germanium.Type: GrantFiled: June 11, 2018Date of Patent: November 19, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Yun Chin, Chii-Horng Li, Chien-Wei Lee, Hsueh-Chang Sung, Heng-Wen Ting, Roger Tai, Pei-Ren Jeng, Tzu-Hsiang Hsu, Yen-Ru Lee, Yan-Ting Lin, Davie Liu
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Patent number: 10468482Abstract: A method includes forming a crown structure over a substrate; forming fins in the crown structure; forming an intra-device isolation region between the fins and forming inter-device isolation regions on opposing sides of the crown structure; forming a gate structure over the fins; forming a dielectric layer that extends continuously over the inter-device isolation regions, the fins and the intra-device isolation region; performing an etching process to reduce a thickness of the dielectric layer, where after the etching process, upper surfaces of the inter-device isolation regions and upper surfaces of the fins are exposed while an upper surface of the intra-device isolation region is covered by a remaining portion of the dielectric layer; and forming an epitaxial structure over the exposed upper surfaces of the fins, where after the epitaxial structure is formed, there is a void between the epitaxial structure and the intra-device isolation region.Type: GrantFiled: January 30, 2018Date of Patent: November 5, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Li-Li Su, Tzu-Ching Lin
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Publication number: 20190252240Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.Type: ApplicationFiled: April 22, 2019Publication date: August 15, 2019Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
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Patent number: 10269618Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.Type: GrantFiled: November 27, 2017Date of Patent: April 23, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
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Publication number: 20190051737Abstract: A semiconductor device includes a plurality of semiconductor fins, an epitaxy structure, a capping layer, and a contact. The epitaxy structure adjoins the semiconductor fins. The epitaxy structure has a plurality of protrusive portions. The capping layer is over a sidewall of the epitaxy structure. The contact is in contact with the epitaxy structure and the capping layer. The contact has a portion between the protrusive portions. The portion of the contact between the protrusive portions has a bottom in contact with the epitaxy structure.Type: ApplicationFiled: October 15, 2018Publication date: February 14, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yen-Ru LEE, Chii-Horng LI, Chien-I KUO, Heng-Wen TING, Jung-Chi TAI, Lilly SU, Yang-Tai HSIAO
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Patent number: 10164097Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structures, and a plurality of epitaxy structures. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structures are respectively disposed on the semiconductor fins. The epitaxy structures are separated from each other, and at least one of the epitaxy structures has a substantially round profile.Type: GrantFiled: September 11, 2015Date of Patent: December 25, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yen-Ru Lee, Chii-Horng Li, Heng-Wen Ting, Tzu-Hsiang Hsu, Chih-Yun Chin
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Patent number: 10103249Abstract: A semiconductor device includes a semiconductor substrate, a plurality of semiconductor fins and a source/drain structure. The semiconductor fins and the source/drain structure are located on the semiconductor substrate, and the source/drain structure is connected to the semiconductor fins. The source/drain structure has a top portion with a W-shape cross section for forming a contact landing region. The semiconductor device may further include a plurality of capping layers located on a plurality of recessed portions of the top portion.Type: GrantFiled: September 10, 2015Date of Patent: October 16, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Lilly Su, Yang-Tai Hsiao
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Publication number: 20180175144Abstract: A method includes forming a crown structure over a substrate; forming fins in the crown structure; forming an intra-device isolation region between the fins and forming inter-device isolation regions on opposing sides of the crown structure; forming a gate structure over the fins; forming a dielectric layer that extends continuously over the inter-device isolation regions, the fins and the intra-device isolation region; performing an etching process to reduce a thickness of the dielectric layer, where after the etching process, upper surfaces of the inter-device isolation regions and upper surfaces of the fins are exposed while an upper surface of the intra-device isolation region is covered by a remaining portion of the dielectric layer; and forming an epitaxial structure over the exposed upper surfaces of the fins, where after the epitaxial structure is formed, there is a void between the epitaxial structure and the intra-device isolation region.Type: ApplicationFiled: January 30, 2018Publication date: June 21, 2018Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Li-Li Su, Tzu-Ching Lin
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Publication number: 20180082883Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.Type: ApplicationFiled: November 27, 2017Publication date: March 22, 2018Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
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Patent number: 9905641Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structure, and an epitaxy structure. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structure is disposed on the semiconductor fins. At least one void is present between the first isolation structure and the epitaxy structure.Type: GrantFiled: September 15, 2015Date of Patent: February 27, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Lilly Su, Tzu-Ching Lin
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Patent number: 9831116Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.Type: GrantFiled: January 20, 2016Date of Patent: November 28, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
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Publication number: 20170077300Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structures, and a plurality of epitaxy structures. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structures are respectively disposed on the semiconductor fins. The epitaxy structures are separated from each other, and at least one of the epitaxy structures has a substantially round profile.Type: ApplicationFiled: September 11, 2015Publication date: March 16, 2017Inventors: Yen-Ru LEE, Chii-Horng LI, Heng-Wen TING, Tzu-Hsiang HSU, Chih-Yun CHIN
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Publication number: 20170077228Abstract: A semiconductor device includes a semiconductor substrate, a plurality of semiconductor fins and a source/drain structure. The semiconductor fins and the source/drain structure are located on the semiconductor substrate, and the source/drain structure is connected to the semiconductor fins. The source/drain structure has a top portion with a W-shape cross section for forming a contact landing region. The semiconductor device may further include a plurality of capping layers located on a plurality of recessed portions of the top portion.Type: ApplicationFiled: September 10, 2015Publication date: March 16, 2017Inventors: Yen-Ru LEE, Chii-Horng LI, Chien-I KUO, Heng-Wen TING, Jung-Chi TAI, Lilly SU, Yang-Tai HSIAO
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Publication number: 20170076973Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.Type: ApplicationFiled: January 20, 2016Publication date: March 16, 2017Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Lilly Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
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Publication number: 20170077222Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structure, and an epitaxy structure. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structure is disposed on the semiconductor fins. At least one void is present between the first isolation structure and the epitaxy structure.Type: ApplicationFiled: September 15, 2015Publication date: March 16, 2017Inventors: Yen-Ru LEE, Chii-Horng LI, Chien-I KUO, Heng-Wen TING, Jung-Chi TAI, Lilly SU, Tzu-Ching LIN
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Patent number: 8368057Abstract: An organic thin film transistor includes: a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an organic active layer. The organic active layer includes an organic semiconductor compound represented by the following formula (A) as defined in the specification.Type: GrantFiled: September 9, 2010Date of Patent: February 5, 2013Assignee: National Tsing Hua UniversityInventors: Yu-Ping Wang, Heng-Wen Ting, Chung-Min Tsai, Tri-Rung Yew
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Patent number: 8283469Abstract: The present invention discloses a soluble and air-stable perylene diimide (PDI) derivative to function as an N-type organic semiconductor material. In the PDI derivative of the present invention, the core thereof is substituted by electron withdrawing groups, and the side chains thereof are substituted by benzene functional groups, whereby are promoted the solubility and air-stability of the molecule. The PDI derivative of the present invention can be used to fabricate an organic semiconductor element via a soluble process at a low temperature and under an atmospheric environment.Type: GrantFiled: March 24, 2010Date of Patent: October 9, 2012Assignee: National Tsing Hua UniversityInventors: Szu-Ying Chen, Heng-Wen Ting, Tri-Rung Yew, Jeng-Hua Wei
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Publication number: 20110233526Abstract: The present invention discloses a soluble and air-stable perylene diimide (PDI) derivative to function as an N-type organic semiconductor material. In the PDI derivative of the present invention, the core thereof is substituted by electron withdrawing groups, and the side chains thereof are substituted by benzene functional groups, whereby are promoted the solubility and air-stability of the molecule. The PDI derivative of the present invention can be used to fabricate an organic semiconductor element via a soluble process at a low temperature and under an atmospheric environment.Type: ApplicationFiled: March 24, 2010Publication date: September 29, 2011Inventors: Szu-Ying Chen, Heng-Wen Ting, Tri-Rung Yew, Jeng-Hua Wei
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Publication number: 20110193065Abstract: An organic thin film transistor includes: a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an organic active layer. The organic active layer includes an organic semiconductor compound represented by the following formula (A) as defined in the specification.Type: ApplicationFiled: September 9, 2010Publication date: August 11, 2011Inventors: Yu-Ping Wang, Heng-Wen Ting, Chung-Min Tsai, Tri-Rung Yew