Patents by Inventor Henning Feick

Henning Feick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260107485
    Abstract: A Schottky diode is disclosed. The Schottky diode includes: a drift region of a first doping type; a Schottky electrode connected to an anode node of the Schottky diode and adjoining the drift region; a Schottky contact formed between the Schottky electrode and the drift region; a shielding region of a second doping type complementary to the first doping type and connected to the Schottky electrode; a cathode region of the first doping type arranged in the drift region, spaced apart from the Schottky contact in a first lateral direction, and connected to a cathode node of the Schottky diode; and a compensation region of the second doping type adjoining the drift region and connected to the anode node. The shielding region at least partially laterally surrounds the Schottky contact.
    Type: Application
    Filed: October 13, 2025
    Publication date: April 16, 2026
    Inventors: Clemens Mart, Swapnil Pandey, Jürgen Faul, Henning Feick
  • Publication number: 20260090112
    Abstract: A method for producing a protection device and a protection device are disclosed. The method includes: forming a first diode arrangement including at least one first diode and at least one second diode connected in anti-series between a first circuit node and a second circuit node of the first diode arrangement; forming a second diode arrangement including at least one first diode and at least one second diode connected in anti-series between a first circuit node and a second circuit node of the second diode arrangement; and connecting the second circuit node of the first diode arrangement and the second circuit node of the second diode arrangement.
    Type: Application
    Filed: October 16, 2025
    Publication date: March 26, 2026
    Inventors: Rolf Weis, Josef Deichler, Henning Feick, Ahmed Mahmoud
  • Publication number: 20260090009
    Abstract: A semiconductor device includes a high voltage device. The high voltage device includes a central region with a first inner region. A termination area laterally surrounds the central portion and includes a first extension region. The first extension region is formed between the first inner region and a first outer region. A lightly doped base portion and the extension region form a pn junction. The central region further includes a second inner region. The second inner region and the first inner region are laterally separated and connected to different inner contact structures. Alternatively or in addition, the high voltage device further includes a second outer region, with the first outer region and the second outer region being laterally separated and connected to different outer contact structures.
    Type: Application
    Filed: September 10, 2025
    Publication date: March 26, 2026
    Inventors: Lars Müller-Meskamp, Fabian Geisenhof, Franz Hirler, Tom Peterhänsel, Annett Winzer, Henning Feick
  • Patent number: 12557326
    Abstract: A transistor device includes: a semiconductor substrate having a doping concentration of a first dopant type; a highly doped source region of a second dopant type formed in a first surface of the semiconductor substrate; a first highly doped drain region of the second dopant type formed in the first surface; a gate structure arranged on the first surface and including a gate electrode formed on the first surface; and a first lightly doped region formed in the first surface and extending from the highly doped source region under the gate electrode. A channel region extends between the first lightly doped region and the highly doped drain region. The channel region has an average doping level of the first dopant type of n×10x that varies by less than 0.5×n×10X between the first lightly doped region and the highly doped drain region along the lateral direction parallel to the first surface.
    Type: Grant
    Filed: August 30, 2023
    Date of Patent: February 17, 2026
    Assignee: Infineon Technologies AG
    Inventors: Jürgen Faul, Andreas Urban Bertl, Ewa Kowalska, Henning Feick
  • Patent number: 12471384
    Abstract: A method for producing a protection device and a protection device are disclosed. The method includes: forming a first diode arrangement including at least one first diode and at least one second diode connected in anti-series between a first circuit node and a second circuit node of the first diode arrangement; forming a second diode arrangement including at least one first diode and at least one second diode connected in anti-series between a first circuit node and a second circuit node of the second diode arrangement; and connecting the second circuit node of the first diode arrangement and the second circuit node of the second diode arrangement.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: November 11, 2025
    Assignee: Infineon Technologies Austria AG
    Inventors: Rolf Weis, Josef Deichler, Henning Feick, Ahmed Mahmoud
  • Patent number: 12362191
    Abstract: A device includes a thinned semiconductor substrate having a first side and a second side opposite to the first side; and at least one radio frequency device at the first side, wherein the second side of the thinned semiconductor substrate is processed to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device through Bosch etching.
    Type: Grant
    Filed: January 9, 2024
    Date of Patent: July 15, 2025
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Hans Taddiken, Christian Butschkow, Andrea Cattaneo, Henning Feick, Dominik Heiss, Christoph Kadow, Uwe Seidel, Valentyn Solomko, Anton Steltenpohl
  • Publication number: 20250192781
    Abstract: An electronic circuit and an integrated circuit are disclosed. The electronic circuit includes: a level shifter including a level shifter transistor having a load path coupled between a low-side reference node and a high-side supply node of the electronic circuit. The electronic circuit further includes a semiconductor body having a base region of a first doping type, a tub of a second doping type complementary to the first doping type, and a device region of the first doping separated from the base region by the tub. The level shifter transistor is at least partially integrated in the device region, and the tub is connected to the high-side supply node and the base region is connected to the low-side reference node.
    Type: Application
    Filed: December 6, 2024
    Publication date: June 12, 2025
    Inventors: Rolf Weis, Ahmed Mahmoud, Henning Feick, Denis Reso
  • Patent number: 12176339
    Abstract: An electronic device is disclosed. The electronic device includes: a first doped region of a first doping type arranged in a first semiconductor layer of a second doping type complementary to the first doping type; an insulation layer formed on top of the first semiconductor layer and adjoining the first doped region; at least two active device regions arranged in a second semiconductor layer formed on top of the insulation layer; and an electrical connection between one of the at least two active device regions and the first doped region. Each of the at least two active device regions is arranged adjacent to the first doped region and separated from the first doped region by the insulation layer.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: December 24, 2024
    Assignee: Infineon Technologies AG
    Inventors: Juergen Faul, Andreas Urban Bertl, Henning Feick
  • Patent number: 12057517
    Abstract: A photon avalanche diode includes: first, second, and third diodes formed in a semiconductor body, the second diode being a photodiode; a main cathode terminal connected to the cathode of the first diode; a main anode terminal connected to the anode of the third diode; an auxiliary cathode terminal connected to the cathode of the second and third diodes; and an auxiliary anode terminal connected to the anode of the first and second diodes. The main anode terminal is electrically connected to ground or a reference potential. The main cathode terminal is electrically connected to a voltage which causes a photocarrier multiplication region to form within the semiconductor body. The auxiliary anode terminal is electrically connected to ground or to a read-out circuit. The auxiliary cathode terminal is electrically connected to a constant bias voltage less than a voltage applied to the main cathode terminal.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: August 6, 2024
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventor: Henning Feick
  • Patent number: 12015096
    Abstract: According to an embodiment, a time of flight sensor device includes: a semiconductor substrate having a conversion region to convert an electromagnetic signal into photo-generated charge carriers, and including a substrate doping region having a n-doping type. The substrate doping region extends from a first main surface region of the semiconductor substrate into the semiconductor substrate. The semiconductor substrate has a p doped region adjacent to the substrate doping region. The substrate doping region at least partially forms the conversion region in the semiconductor substrate. A readout node arranged in the semiconductor substrate within the substrate doping region and having the n-doping type is configured to readout the photo generated charge carriers. A control electrode is arranged in the substrate doping region of the semiconductor substrate and in the substrate doping region and has a p-doping type.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: June 18, 2024
    Assignee: Infineon Technologies AG
    Inventor: Henning Feick
  • Publication number: 20240145253
    Abstract: A device includes a thinned semiconductor substrate having a first side and a second side opposite to the first side; and at least one radio frequency device at the first side, wherein the second side of the thinned semiconductor substrate is processed to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device through Bosch etchin
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Inventors: Hans Taddiken, Christian Butschkow, Andrea Cattaneo, Henning Feick, Dominik Heiss, Christoph Kadow, Uwe Seidel, Valentyn Solomko, Anton Steltenpohl
  • Patent number: 11948802
    Abstract: A device includes a thinned semiconductor substrate having a first side and a second side opposite to the first side; and at least one radio frequency device at the first side, wherein the second side of the thinned semiconductor substrate is processed to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device through Bosch etching.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: April 2, 2024
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Hans Taddiken, Christian Butschkow, Andrea Cattaneo, Henning Feick, Dominik Heiss, Christoph Kadow, Uwe Seidel, Valentyn Solomko, Anton Steltenpohl
  • Publication number: 20240097037
    Abstract: A transistor device includes: a semiconductor substrate having a doping concentration of a first dopant type; a highly doped source region of a second dopant type formed in a first surface of the semiconductor substrate; a first highly doped drain region of the second dopant type formed in the first surface; a gate structure arranged on the first surface and including a gate electrode formed on the first surface; and a first lightly doped region formed in the first surface and extending from the highly doped source region under the gate electrode. A channel region extends between the first lightly doped region and the highly doped drain region. The channel region has an average doping level of the first dopant type of n×10x that varies by less than 0.5×n×10X between the first lightly doped region and the highly doped drain region along the lateral direction parallel to the first surface.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 21, 2024
    Inventors: Jürgen Faul, Andreas Urban Bertl, Ewa Kowalska, Henning Feick
  • Patent number: 11869919
    Abstract: A sensor device includes: a semiconductor substrate having a sensing region which extends vertically below a main surface region of the semiconductor substrate into the substrate; a semiconductor capping layer that extends vertically below the main surface region into the substrate; a buried deep trench structure that extends vertically below the capping layer into the substrate and laterally relative to the sensing region, the buried deep trench structure including a doped semiconductor layer that extends from a surface region of the buried deep trench structure into the substrate; a trench doping region that extends from the doped semiconductor layer of the buried deep trench structure into the substrate; and electronic circuitry for the sensing region in a capping region of the substrate vertically above the buried deep trench structure. Methods of manufacturing the sensor device are also provided.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: January 9, 2024
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Magali Glemet, Boris Binder, Henning Feick, Dirk Offenberg
  • Publication number: 20230083491
    Abstract: A photon avalanche diode includes: first, second, and third diodes formed in a semiconductor body, the second diode being a photodiode; a main cathode terminal connected to the cathode of the first diode; a main anode terminal connected to the anode of the third diode; an auxiliary cathode terminal connected to the cathode of the second and third diodes; and an auxiliary anode terminal connected to the anode of the first and second diodes. The main anode terminal is electrically connected to ground or a reference potential. The main cathode terminal is electrically connected to a voltage which causes a photocarrier multiplication region to form within the semiconductor body. The auxiliary anode terminal is electrically connected to ground or to a read-out circuit. The auxiliary cathode terminal is electrically connected to a constant bias voltage less than a voltage applied to the main cathode terminal.
    Type: Application
    Filed: November 23, 2022
    Publication date: March 16, 2023
    Inventor: Henning Feick
  • Publication number: 20230071856
    Abstract: A method for producing a protection device and a protection device are disclosed. The method includes: forming a first diode arrangement including at least one first diode and at least one second diode connected in anti-series between a first circuit node and a second circuit node of the first diode arrangement; forming a second diode arrangement including at least one first diode and at least one second diode connected in anti-series between a first circuit node and a second circuit node of the second diode arrangement; and connecting the second circuit node of the first diode arrangement and the second circuit node of the second diode arrangement.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 9, 2023
    Inventors: Rolf Weis, Josef Deichler, Henning Feick, Ahmed Mahmoud
  • Patent number: 11594654
    Abstract: A method of generating a germanium structure includes performing an epitaxial depositing process on an assembly of a silicon substrate and an oxide layer, wherein one or more trenches in the oxide layer expose surface portions of the silicon substrate. The epitaxial depositing process includes depositing germanium onto the assembly during a first phase, performing an etch process during a second phase following the first phase in order to remove germanium from the oxide layer, and repeating the first and second phases. A germanium crystal is grown in the trench or trenches. An optical device includes a light-incidence surface formed by a raw textured surface of a germanium structure obtained by an epitaxial depositing process without processing the surface of the germanium structure after the epitaxial process.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: February 28, 2023
    Assignee: Infineon Technologies AG
    Inventors: Andre Roeth, Henning Feick, Heiko Froehlich, Thoralf Kautzsch, Olga Khvostikova, Stefano Parascandola, Thomas Popp, Maik Stegemann, Mirko Vogt
  • Publication number: 20230049511
    Abstract: Disclosed is a circuit arrangement. The circuit arrangement includes: an electronic circuit integrated in a semiconductor body; an input pin coupled to the electronic circuit; an insulation layer formed on top of the semiconductor body; and a protection device connected to the input pin. The protection device is integrated in a polysilicon layer formed on top of the insulation layer.
    Type: Application
    Filed: August 8, 2022
    Publication date: February 16, 2023
    Inventors: Rolf Weis, Josef Deichler, Henning Feick, Ahmed Mahmoud
  • Publication number: 20230029591
    Abstract: An electronic device is disclosed. The electronic device includes: a first doped region of a first doping type arranged in a first semiconductor layer of a second doping type complementary to the first doping type; an insulation layer formed on top of the first semiconductor layer and adjoining the first doped region; at least two active device regions arranged in a second semiconductor layer formed on top of the insulation layer; and an electrical connection between one of the at least two active device regions and the first doped region. Each of the at least two active device regions is arranged adjacent to the first doped region and separated from the first doped region by the insulation layer.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 2, 2023
    Inventors: Juergen Faul, Andreas Urban Bertl, Henning Feick
  • Patent number: 11527670
    Abstract: A photon avalanche diode includes a semiconductor body having a first side and a second side opposite the first side, a primary doped region of a first conductivity type at the first side of the semiconductor body, a primary doped region of a second conductivity type opposite the first conductivity type at the second side of the semiconductor body, an enhancement region of the second conductivity type below and adjoining the primary doped region of the first conductivity type, the enhancement region forming an active pn-junction with the primary doped region of the first conductivity type, and a collection region of the first conductivity type interposed between the enhancement region and the primary doped region of the second conductivity type and configured to transport a photocarrier generated in the collection region or the primary doped region of the second conductivity type towards the enhancement region.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: December 13, 2022
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventor: Henning Feick