Abstract: A nanoscale thermoelectric device, which may be operated as a refrigerator or as a thermoelectric generator includes N-type and p-type active areas connected to a central terminal and end electrodes made of interconnect metal. Reducing lateral dimensions of the active areas reduces vertical thermal conduction, thus improving the efficiency of the thermoelectric device. The thermoelectric device may be integrated into the fabrication process sequence of an IC without adding process cost or complexity. Operated as a refrigerator, the central terminal may be configured to cool a selected component in the IC, such as a transistor. Operated as a thermoelectric generator with a heat source applied to the central terminal, the end terminals may provide power to a circuit in the IC.

Abstract: A gated resonant tunneling diode (GRTD) is disclosed including a metal oxide semiconductor (MOS) gate over a gate dielectric layer which is biased to form an inversion layer between two barrier regions, resulting in a quantum well less than 15 nanometers wide. Source and drain regions adjacent to the barrier regions control current flow in and out of the quantum well. The GRTD may be integrated in CMOS ICs as a quantum dot or a quantum wire device. The GRTD may be operated in a negative conductance mode, in a charge pump mode and in a radiative emission mode.

Abstract: A neutron generating device is described. In one embodiment, the device has a chamber filled with a gas containing deuterium or tritium together with a piezoelectric crystal having a mechanical excitation apparatus proximate thereto. The piezoelectric crystal has first and second metal electrodes located on opposing surfaces. The first metal electrode is in electrical contact with a neutral potential. A field emitter tip is located on the second metal electrode, which emits an electrical field to form deuterium or tritium ions upon the mechanical excitation of the piezoelectric crystal. The deuterium or tritium ions are accelerated by an electric potential differential between the first metal electrode and the second metal electrode into a target containing deuterium or tritium with sufficient energy to form neutrons.

Abstract: One embodiment of the present invention relates to a method for transistor matching. In this method, a channel is formed within a first transistor by applying a gate-source bias having a first polarity to the first transistor. The magnitude of a potential barrier in a pocket implant region of the first transistor is reduced by applying a body-source bias having the first polarity to the first transistor. Current flow is facilitated across the channel by applying a drain-source bias having the first polarity to the first transistor. Other methods and circuits are also disclosed.

Abstract: The present invention provides, in one embodiment, a transistor (100). The transistor (100) comprises a doped semiconductor substrate (105) and a drain-extended well (115) having a curved region (125) and a straight region (130) surrounded by the doped semiconductor substrate (105). The drain-extended well (115) has an opposite dopant type as the doped semiconductor substrate (105). The transistor (100) further includes a centered source/drain (120) surrounded by the drain-extended well (115) and separated from an outer perimeter (135) of the drain-extended well (115). A separation in the curved region (145) is greater than a separation in the straight region (150). Other embodiments of the present invention include an integrated circuit (300) and a method of manufacturing a transistor (200).

Abstract: In one embodiment of the present invention, a system for identifying and storing a target information unit, contained in a received information stream including multiple information units, according to a stored tag file corresponding to the target information unit, includes one or more stored tag files. Each tag file corresponds to a target information unit having a predetermined length and includes a first set of attributes associated with the corresponding target information unit. The system further includes a processor that accesses a digitized data stream representing the received information stream and extracts a second set of one or more attributes from a portion of the digitized data stream.

Abstract: A system for controlling a polishing machine during polishing of a workpiece, such as a semiconductor wafer, includes a carrier which has an interface surface for engaging a workpiece and establishing ultrasonic coupling thereto. At least one crystal oscillator is ultrasonically coupled to the carrier and operates at a resonant frequency in an ultrasonic band which is indicative of a desired polishing depth of the workpiece, such as the endpoint of polishing. A detector circuit provides an output signal which is representative of an output level of the crystal oscillator. A processor circuit receives the signal from the detector circuit and provides a signal to the polishing machine when the amplitude of the signal from the detector circuit indicates that the desired polishing endpoint has been reached. A number of crystal oscillators can be spatially arranged on the carrier to establish a local polishing depth detection array.