Abstract: A method for providing a visual representation of data stored in a database may include generating a graphic user interface configured to receive inputs for constructing a hierarchical measure based on the data stored in the database. An indication to add, to the hierarchical measure, a first measure and a second measure may be received via the graphic user interface. In response to the indication, the hierarchical measure may be constructed to include, based on the first measure being added prior to the second measure, the first measure as a parent measure and the second measure as a child measure. A first value of the first measure may correspond to an aggregate of at least a second value of the second measure. The graphic user interface may be updated to provide a visual representation of the hierarchical measure. Related systems and articles of manufacture are also provided.

Abstract: A method for providing a visual representation of data stored in a database may include generating a graphic user interface configured to receive inputs for constructing a hierarchical measure based on the data stored in the database. An indication to add, to the hierarchical measure, a first measure and a second measure may be received via the graphic user interface. In response to the indication, the hierarchical measure may be constructed to include, based on the first measure being added prior to the second measure, the first measure as a parent measure and the second measure as a child measure. A first value of the first measure may correspond to an aggregate of at least a second value of the second measure. The graphic user interface may be updated to provide a visual representation of the hierarchical measure. Related systems and articles of manufacture are also provided.

Abstract: In one embodiment, the present disclosure pertains to dynamic display layout of electronic content. In one embodiment, content is displayed across a range of display sizes, where within certain ranges of display sizes, the content is scaled up or down in size, and across breakpoints the content is repositioned to optimize the presentation of the electronic content to a user. In one embodiment, widgets are associated with elements of a grid. The widgets define regions where content is displayed. The grid elements may be part of a page, where the width of different displays sets the page width, the size of the grid elements, and the size of the widgets and related content in the display.

Abstract: Embodiments of the present invention relate to a method for a near non-adaptive virtual metrology for wafer processing control. In accordance with an embodiment of the present invention, a method for processing control comprises diagnosing a chamber of a processing tool that processes a wafer to identify a key chamber parameter, and controlling the chamber based on the key chamber parameter if the key chamber parameter can be controlled, or compensating a prediction model by changing to a secondary prediction model if the key chamber parameter cannot be sufficiently controlled.

Abstract: A semiconductor manufacturing line includes an inert environment selected from the group consisting essentially of an inert airtight wafer holder, an inert wafer transport channel, an inert production tool, an inert clean room, and combinations thereof.

Abstract: A first embodiment is a method for semiconductor process control comprising clustering processing tools of a processing stage into a tool cluster based on processing data and forming a prediction model for processing a semiconductor wafer based on the tool cluster. A second embodiment is a method for semiconductor process control comprising providing cluster routes between first stage tool clusters and second stage tool clusters, assigning a comparative optimization ranking to each cluster route, and scheduling processing of wafers. The comparative optimization ranking identifies comparatively which cluster routes provide for high wafer processing uniformity.

Abstract: Described herein are methods and systems for analyzing multidimensional data that use tangential exploration of data via a third or Z-dimension to the current two-dimensional view. The tangential exploration allows higher dimensionality to be explored without causing visual clutter.

Abstract: Embodiments of the present invention relate to a method for a near non-adaptive virtual metrology for wafer processing control. In accordance with an embodiment of the present invention, a method for processing control comprises diagnosing a chamber of a processing tool that processes a wafer to identify a key chamber parameter, and controlling the chamber based on the key chamber parameter if the key chamber parameter can be controlled, or compensating a prediction model by changing to a secondary prediction model if the key chamber parameter cannot be sufficiently controlled.

Abstract: A method to enable wafer result prediction includes collecting manufacturing data from various semiconductor manufacturing tools and metrology tools; choosing key parameters using an autokey method based on the manufacturing data; building a virtual metrology based on the key parameters; and predicting wafer results using the virtual metrology.

Abstract: Embodiments of the present invention relate to a method for a near non-adaptive virtual metrology for wafer processing control. In accordance with an embodiment of the present invention, a method for processing control comprises diagnosing a chamber of a processing tool that processes a wafer to identify a key chamber parameter, and controlling the chamber based on the key chamber parameter if the key chamber parameter can be controlled, or compensating a prediction model by changing to a secondary prediction model if the key chamber parameter cannot be sufficiently controlled.

Abstract: A system and method for controlling resistivity uniformity in a Copper trench structure by controlling the CMP process is provided. A preferred embodiment comprises a system and a method in which a plurality of CMP process recipes may be created comprising at least a slurry arm position. A set of metrological data for at least one layer of the semiconductor substrate may be estimated, and an optimum CMP process recipe may be selected based on the set of metrological data. The optimum CMP process recipe may be implemented on the semiconductor substrate.

Abstract: A system, method, and computer readable medium for extracting a key process parameter correlative to a selected device parameter are provided. In an embodiment, the key process parameter is determined using a gene map analysis. The gene map analysis includes grouping highly correlative process parameter and determining the correlation of a group to the selected device parameter. In an embodiment, the groups having greatest correlation to the selected device parameter are displayed in a correlation matrix and/or a gene map.

Abstract: A method and apparatus involve providing a substrate having a dielectric layer formed thereon, forming a photoresist mask over the dielectric layer, the photoresist mask defining an opening, etching the dielectric layer through the at least one opening in the photoresist mask, treating a portion of the photoresist mask with an etching species, and removing the treated photoresist mask with a supercritical fluid. The etching, treating, and removing can be performed in one chamber.

Abstract: Integrated circuits with multi-dimensional pad structures are provided. An exemplary embodiment of an integrated circuit device with multi-dimensional pad structures comprises an integrated circuit (IC) stack structure comprising a plurality of device layers, wherein one of the devices comprise a first pad exposed by an edge surface thereof.

Abstract: A first embodiment is a method for semiconductor process control comprising clustering processing tools of a processing stage into a tool cluster based on processing data and forming a prediction model for processing a semiconductor wafer based on the tool cluster. A second embodiment is a method for semiconductor process control comprising providing cluster routes between first stage tool clusters and second stage tool clusters, assigning a comparative optimization ranking to each cluster route, and scheduling processing of wafers. The comparative optimization ranking identifies comparatively which cluster routes provide for high wafer processing uniformity.

Abstract: Embodiments of the present invention relate to a method for a near non-adaptive virtual metrology for wafer processing control. In accordance with an embodiment of the present invention, a method for processing control comprises diagnosing a chamber of a processing tool that processes a wafer to identify a key chamber parameter, and controlling the chamber based on the key chamber parameter if the key chamber parameter can be controlled, or compensating a prediction model by changing to a secondary prediction model if the key chamber parameter cannot be sufficiently controlled.

Abstract: Described herein are methods and systems for analyzing multidimensional data that use tangential exploration of data via a third or Z-dimension to the current two-dimensional view. The tangential exploration allows higher dimensionality to be explored without causing visual clutter.

Abstract: A method is disclosed for controlling the sheet resistance of copper trenches formed on semiconductor wafers. The method includes forming a plurality of copper-filled trenches on a wafer, measuring the sheet resistance of each of the plurality of copper-filled trenches, and comparing the measured sheet resistance values to a predetermined sheet resistance value. Photolithography steps performed on subsequent wafers are adjusted according to a difference between the measured sheet resistance values and the predetermined value. In one embodiment, this adjustment takes the form of adjusting a photolithographic extension exposure energy to thereby adjust the cross-section of the resulting trenches.

Abstract: A method for improving within-wafer uniformity is provided. The method includes forming an electrical component by a first process step and a second process step, wherein the electrical component has a target electrical parameter. The method includes providing a first plurality of production tools for performing the first process step; providing a second plurality of production tools for performing the second process step; providing a wafer; performing the first process step on the wafer using one of the first plurality of production tools; and selecting a first route including a first production tool from the second plurality of production tools. A within-wafer uniformity of the target electrical parameter on the wafer manufactured by the first route is greater than a second route including a second production tool in the second plurality of production tools.

Abstract: A method of monitoring uniformity of a wafer is provided. A wafer parameter is selected. Manufacturing data is collected. The manufacturing data includes measurements of the selected wafer parameter. An average offset profile of the wafer parameter for a first and second wafer is determined using the manufacturing data. The first and second wafer are associated with a product type and were processed by a processing tool. An offset profile for a third wafer is predicted for a wafer using the average offset profile. The third wafer is associated with the product type and was processed by the processing tool.