Patents by Inventor Henry S. Povolny
Henry S. Povolny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10892197Abstract: A lower electrode assembly configured to support a semiconductor substrate in a plasma processing chamber includes a base plate, an upper plate above the base plate, and a mounting groove surrounding a bond layer located between the base plate and the upper plate. An edge seal including a compressible ring is mounted in the mounting groove such that the compressible ring is axially compressed between the upper plate and the base plate. At least one gas passage is in fluid communication with an annular space between the compressible ring and an inner wall of the mounting groove. The at least gas one passage extends through the base plate and includes a plurality of outlets in fluid communication with the annular space. In some examples, a backing seal may be located between the edge seal and an inner wall of the mounting groove.Type: GrantFiled: August 29, 2018Date of Patent: January 12, 2021Assignee: LAM RESEARCH CORPORATIONInventors: Keith William Gaff, Matthew Busche, Anthony Ricci, Henry S. Povolny, Scott Stevenot
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Publication number: 20180366379Abstract: A lower electrode assembly configured to support a semiconductor substrate in a plasma processing chamber includes a base plate, an upper plate above the base plate, and a mounting groove surrounding a bond layer located between the base plate and the upper plate. An edge seal including a compressible ring is mounted in the mounting groove such that the compressible ring is axially compressed between the upper plate and the base plate. At least one gas passage is in fluid communication with an annular space between the compressible ring and an inner wall of the mounting groove. The at least gas one passage extends through the base plate and includes a plurality of outlets in fluid communication with the annular space. In some examples, a backing seal may be located between the edge seal and an inner wall of the mounting groove.Type: ApplicationFiled: August 29, 2018Publication date: December 20, 2018Inventors: Keith William GAFF, Matthew BUSCHE, Anthony RICCI, Henry S. POVOLNY, Scott STEVENOT
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Patent number: 10102321Abstract: Systems and methods for defining a refined RF model of an RF transmission path includes identifying a selected initial term in the RF model having a least significant impact on a goodness of fit of the RF model with the selected initial term removed from the RF model. The initial term having the least significant impact on the goodness of fit is removed from the RF model. A selected non-initial term having a most significant impact on the goodness of fit of the RF model is identified and added to the RF model. The non-initial term being selected from a set of terms describing corresponding elements of the RF transmission path. The initial terms and non-initial terms having the most significant impact of goodness of fit are selected for a refined RF model.Type: GrantFiled: November 10, 2014Date of Patent: October 16, 2018Assignee: Lam Research CorporationInventors: Henry S. Povolny, John C. Valcore, Jr.
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Patent number: 10090211Abstract: A lower electrode assembly useful for supporting a semiconductor substrate in a plasma processing chamber includes a temperature controlled base plate, an upper plate above the base plate, and an annular mounting groove surrounding a bond layer located between the base plate and the upper plate. The mounting groove includes an inner wall, an opening of the mounting groove faces radially outward relative to the inner wall, and the mounting groove includes a step extending downward from the upper plate on an upper wall of the groove or extending upward from the base plate on a lower wall of the groove. An edge seal including a compressible ring is mounted in the groove such that the compressible ring is compressed between the upper plate and the base plate to cause an outer surface of the compressible ring to be biased radially outward relative to the inner wall toward the step.Type: GrantFiled: December 26, 2013Date of Patent: October 2, 2018Assignee: LAM RESEARCH CORPORATIONInventors: Keith William Gaff, Matthew Busche, Anthony Ricci, Henry S. Povolny, Scott Stevenot
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Patent number: 9911577Abstract: An arrangement for controlling a plasma processing system is provided. The arrangement includes an RF sensing mechanism for obtaining an RF voltage signal. The arrangement also includes a voltage probe coupled to the RF sensing mechanism to facilitate acquisition of the signal while reducing perturbation of RF power driving a plasma in the plasma processing system. The arrangement further includes a signal processing arrangement configured for receiving the signal, split the voltage signals into a plurality of channels, convert the signals into a plurality of direct current (DC) signals, convert the DC signals into digital signals and process the digital signal in a digital domain to generate a transfer function output. The arrangement moreover includes an ESC power supply subsystem configured to receive the transfer function output as a feedback signal to control the plasma processing system.Type: GrantFiled: August 12, 2016Date of Patent: March 6, 2018Assignee: Lam Research CorporationInventors: John C. Valcore, Jr., Henry S. Povolny
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Publication number: 20160351375Abstract: An arrangement for controlling a plasma processing system is provided. The arrangement includes an RF sensing mechanism for obtaining an RF voltage signal. The arrangement also includes a voltage probe coupled to the RF sensing mechanism to facilitate acquisition of the signal while reducing perturbation of RF power driving a plasma in the plasma processing system. The arrangement further includes a signal processing arrangement configured for receiving the signal, split the voltage signals into a plurality of channels, convert the signals into a plurality of direct current (DC) signals, convert the DC signals into digital signals and process the digital signal in a digital domain to generate a transfer function output. The arrangement moreover includes an ESC power supply subsystem configured to receive the transfer function output as a feedback signal to control the plasma processing system.Type: ApplicationFiled: August 12, 2016Publication date: December 1, 2016Inventors: John C. Valcore, JR., Henry S. Povolny
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Patent number: 9455126Abstract: An arrangement for controlling a plasma processing system is provided. The arrangement includes an RF sensing mechanism for obtaining an RF voltage signal. The arrangement also includes a voltage probe coupled to the RF sensing mechanism to facilitate acquisition of the signal while reducing perturbation of RF power driving a plasma in the plasma processing system. The arrangement further includes a signal processing arrangement configured for receiving the signal, split the voltage signals into a plurality of channels, convert the signals into a plurality of direct current (DC) signals, convert the DC signals into digital signals and process the digital signal in a digital domain to generate a transfer function output. The arrangement moreover includes an ESC power supply subsystem configured to receive the transfer function output as a feedback signal to control the plasma processing system.Type: GrantFiled: July 24, 2015Date of Patent: September 27, 2016Assignee: Lam Research CorporationInventors: John C. Valcore, Jr., Henry S. Povolny
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Publication number: 20160117425Abstract: Systems and methods for defining a refined RF model of an RF transmission path includes identifying a selected initial term in the RF model having a least significant impact on a goodness of fit of the RF model with the selected initial term removed from the RF model. The initial term having the least significant impact on the goodness of fit is removed from the RF model. A selected non-initial term having a most significant impact on the goodness of fit of the RF model is identified and added to the RF model. The non-initial term being selected from a set of terms describing corresponding elements of the RF transmission path. The initial terms and non-initial terms having the most significant impact of goodness of fit are selected for a refined RF model.Type: ApplicationFiled: November 10, 2014Publication date: April 28, 2016Inventors: Henry S. Povolny, John C. Valcore, JR.
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Publication number: 20150332894Abstract: An arrangement for controlling a plasma processing system is provided. The arrangement includes an RF sensing mechanism for obtaining an RF voltage signal. The arrangement also includes a voltage probe coupled to the RF sensing mechanism to facilitate acquisition of the signal while reducing perturbation of RF power driving a plasma in the plasma processing system. The arrangement further includes a signal processing arrangement configured for receiving the signal, split the voltage signals into a plurality of channels, convert the signals into a plurality of direct current (DC) signals, convert the DC signals into digital signals and process the digital signal in a digital domain to generate a transfer function output. The arrangement moreover includes an ESC power supply subsystem configured to receive the transfer function output as a feedback signal to control the plasma processing system.Type: ApplicationFiled: July 24, 2015Publication date: November 19, 2015Inventors: John C. Valcore, JR., Henry S. Povolny
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Patent number: 9128473Abstract: An arrangement for controlling a plasma processing system is provided. The arrangement includes an RF sensing mechanism for obtaining an RF voltage signal. The arrangement also includes a high impedance arrangement coupled to the RF sensing mechanism to facilitate acquisition of the signal while reducing perturbation of RF power driving a plasma in the plasma processing system. The arrangement further includes a signal processing arrangement configured for receiving the signal, processing the signal in a digital domain to obtain peak voltage information for a fundamental frequency and a broadband frequency of the signal, deriving wafer bias information from the peak voltage information, and applying signal to a transfer function to obtain a transfer function output. The arrangement moreover includes an ESC power supply subsystem configured to receive the transfer function output as a feedback signal to control the plasma processing system.Type: GrantFiled: August 5, 2013Date of Patent: September 8, 2015Assignee: Lam Research CorporationInventors: John C. Valcore, Henry S. Povolny
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Publication number: 20150187614Abstract: A lower electrode assembly useful for supporting a semiconductor substrate in a plasma processing chamber includes a temperature controlled lower base plate, an upper plate, a mounting groove surrounding a bond layer and an edge seal comprising a ring compressed in the groove. A gas source supplies inert gas to the groove and maintains the inert gas at a pressure of 100 mTorr to 100 Torr in the groove.Type: ApplicationFiled: December 26, 2013Publication date: July 2, 2015Applicant: Lam Research CorporationInventors: Keith William Gaff, Matthew Busche, Anthony Ricci, Henry S. Povolny, Scott Stevenot
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Patent number: 8832916Abstract: A method for dechucking a substrate from an electrostatic chuck (ESC) in a plasma processing system is provided. The method includes flowing a first gas into a plasma chamber. The method also includes flowing a second gas to a backside of the substrate to create a high pressure buildup of the second gas under the backside. The method further includes reducing a flow of the second gas such that at least a portion is trapped under the substrate backside. The method yet also includes pumping out the plasma chamber to increase a pressure differential between a first pressure that exists under the backside of the substrate and a second pressure that exists in a region above the substrate, wherein the pressure differential enables the substrate to be lifted from the ESC. The method yet also includes removing the substrate from the ESC.Type: GrantFiled: July 12, 2011Date of Patent: September 16, 2014Assignee: Lam Research CorporationInventor: Henry S. Povolny
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Publication number: 20130345847Abstract: An arrangement for controlling a plasma processing system is provided. The arrangement includes an RF sensing mechanism for obtaining an RF voltage signal. The arrangement also includes a high impedance arrangement coupled to the RF sensing mechanism to facilitate acquisition of the signal while reducing perturbation of RF power driving a plasma in the plasma processing system. The arrangement further includes a signal processing arrangement configured for receiving the signal, processing the signal in a digital domain to obtain peak voltage information for a fundamental frequency and a broadband frequency of the signal, deriving wafer bias information from the peak voltage information, and applying signal to a transfer function to obtain a transfer function output. The arrangement moreover includes an ESC power supply subsystem configured to receive the transfer function output as a feedback signal to control the plasma processing system.Type: ApplicationFiled: August 5, 2013Publication date: December 26, 2013Inventors: John C. Valcore, JR., Henry S. Povolny
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Patent number: 8501631Abstract: A method for controlling a plasma processing system using wafer bias information derived from RF voltage information is proposed. The RF voltage is processed via an analog or digital methodology to obtain peak voltage information at least for each of the fundamental frequencies and the broadband frequency. The peak voltage information is then employed to derive the wafer bias information to serve as a feedback or control signal to hardware/software of the plasma processing system.Type: GrantFiled: December 7, 2010Date of Patent: August 6, 2013Assignee: Lam Research CorporationInventors: John C. Valcore, Jr., Henry S. Povolny
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Patent number: 8454027Abstract: A clockable device for use with an electrostatic chuck configured to hold a substrate in a plasma environment is disclosed. The clockable device comprises a first portion of the electrostatic chuck having at least one face with variable thermal contact areas located thereon. A second portion of the electrostatic chuck has at least one face with variable thermal contact areas located thereon. The at least one face of the second portion is configured to be placed in thermal contact with the at least one face of the first portion to control a thermal gradient across a face of the substrate.Type: GrantFiled: September 23, 2009Date of Patent: June 4, 2013Assignee: Lam Research CorporationInventors: Henry S. Povolny, Andreas Fischer
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Publication number: 20130014371Abstract: A method for dechucking a substrate from an electrostatic chuck (ESC) in a plasma processing system is provided. The method includes flowing a first gas into a plasma chamber. The method also includes flowing a second gas to a backside of the substrate to create a high pressure buildup of the second gas under the backside. The method further includes reducing a flow of the second gas such that at least a portion is trapped under the substrate backside. The method yet also includes pumping out the plasma chamber to increase a pressure differential between a first pressure that exists under the backside of the substrate and a second pressure that exists in a region above the substrate, wherein the pressure differential enables the substrate to be lifted from the ESC. The method yet also includes removing the substrate from the ESC.Type: ApplicationFiled: July 12, 2011Publication date: January 17, 2013Inventor: Henry S. Povolny
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Publication number: 20110137446Abstract: A method for controlling a plasma processing system using wafer bias information derived from RF voltage information is proposed. The RF voltage is processed via an analog or digital methodology to obtain peak voltage information at least for each of the fundamental frequencies and the broadband frequency. The peak voltage information is then employed to derive the wafer bias information to serve as a feedback or control signal to hardware/software of the plasma processing system.Type: ApplicationFiled: December 7, 2010Publication date: June 9, 2011Inventors: John C. Valcore, JR., Henry S. Povolny
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Publication number: 20100078899Abstract: A clockable device for use with an electrostatic chuck configured to hold a substrate in a plasma environment is disclosed. The clockable device comprises a first portion of the electrostatic chuck having at least one face with variable thermal contact areas located thereon. A second portion of the electrostatic chuck has at least one face with variable thermal contact areas located thereon. The at least one face of the second portion is configured to be placed in thermal contact with the at least one face of the first portion to control a thermal gradient across a face of the substrate.Type: ApplicationFiled: September 23, 2009Publication date: April 1, 2010Applicant: Lam Research CorporationInventors: Henry S. Povolny, Andreas Fischer
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Patent number: 6755151Abstract: A thin film deposition method uses a vacuum confinement cup that employs a dense hot filament and multiple gas inlets. At least one reactant gas is introduced into the confinement cup both near and spaced apart from the heated filament. An electrode inside the confinement cup is used to generate plasma for film deposition. The method is used to deposit advanced thin films (such as silicon based thin films) at a high quality and at a high deposition rate.Type: GrantFiled: July 10, 2003Date of Patent: June 29, 2004Assignee: The University of ToledoInventors: Xunming Deng, Henry S. Povolny
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Publication number: 20040106269Abstract: A thin film deposition method uses a vacuum confinement cup that employs a dense hot filament and multiple gas inlets. At least one reactant gas is introduced into the confinement cup both near and spaced apart from the heated filament. An electrode inside the confinement cup is used to generate plasma for film deposition. The method is used to deposit advanced thin films (such as silicon based thin films) at a high quality and at a high deposition rate.Type: ApplicationFiled: July 10, 2003Publication date: June 3, 2004Inventors: Xunming Deng, Henry S. Povolny