Patents by Inventor Heon Ham

Heon Ham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8159589
    Abstract: An image sensor for high-speed data readout is provided. The image sensor includes a line memory block temporarily storing a digital signal in unit of lines which is generated based on an analog signal output from a pixel array. The line memory block includes a plurality of line memories, a plurality of data line pairs respectively connecting the line memories to a sense amplifying unit, and a plurality of data line prechargers each including at least two precharge units separately connected with a corresponding one of the data line pairs to precharge the corresponding data line pair with a predetermined precharge voltage. Accordingly, the image sensor performs high-speed digital signal readout based on precharge operation of the data line prechargers.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: April 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung Hyun Lim, Gun Hee Han, Seog Heon Ham
  • Patent number: 8094058
    Abstract: The analog-digital converter (ADC) includes a modulator and a digital integrator. The modulator is configured to modulate an input signal and output a modulated signal. The digital integrator includes a plurality of accumulators serially connected to one another. The digital integrator is configured to integrate the modulated signal to output an integration result.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: January 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wun-Ki Jung, Seog Heon Ham, Dong Hun Lee, Kwi Sung Yoo, Min Ho Kwon
  • Publication number: 20120002093
    Abstract: A correlated double sampling circuit includes a delta-sigma modulator, a selection circuit, and an accumulation circuit. The delta-sigma modulator is configured to receive an input signal, delta-sigma modulate the input signal, and output a modulation signal. The selection circuit is configured to invert the modulation signal and selectively output one of the modulation signal and an inverted modulation signal in response to a selection signal corresponding to an operation phase. The accumulation circuit is configured to generate a first accumulation result by performing an accumulation process on one of the modulation signal and the inverted modulation signal in a first operation phase, and generate a second accumulation result by performing the accumulation process on the first accumulation result and the other one of the modulation signal and the inverted modulation signal in a second operation phase.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 5, 2012
    Inventors: Wun-Ki Jung, Seog Heon Ham, Dong Hun Lee, Kwi Sung Yoo, Min Ho Kwon
  • Publication number: 20110279718
    Abstract: An amplifier is provided. The amplifier includes a differential amplifier including a tail, a current mirror connected between output terminals of the differential amplifier and a power line receiving a supply voltage, and a first switching circuit for connecting and disconnecting one of the output terminals of the differential amplifier to and from the tail in response to a first switching signal.
    Type: Application
    Filed: March 29, 2011
    Publication date: November 17, 2011
    Inventors: Kwi Sung Yoo, Seog Heon Ham, Dong Hun Lee, Min Ho Kwon, Wun-Ki Jung
  • Patent number: 8059175
    Abstract: A method for operating an image capture device having a sensor with an array of first and second pixels includes capturing an image a plurality of times with the second pixels to produce a corresponding second image signal, the second pixels being white pixels, capturing the image a single time with the first pixels to produce a corresponding first image signal, inputting selecting signals to the sensor via a row driver to obtain the first and second image signals from the first and second pixels, respectively, and converting the first and second image signals to respective digital values via an analog-to-digital converter.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: November 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju-Seop Park, Gun-Hee Han, Seog-Heon Ham
  • Publication number: 20110266417
    Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.
    Type: Application
    Filed: July 15, 2011
    Publication date: November 3, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Myung LEE, Gun-Hee HAN, Seog-Heon HAM
  • Patent number: 7995123
    Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: August 9, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Myung Lee, Gun-Hee Han, Seog-Heon Ham
  • Patent number: 7985993
    Abstract: A complementary metal oxide semiconductor (CMOS) image sensor includes a photodiode, a switch and a comparator. The switch transfers a sensing signal to a sensing node from the photodiode. The comparator, which is directly connected to the sensing node, compares the sensing signal of the sensing node with a reference signal. The comparator outputs a signal corresponding to a voltage difference between the sensing signal and the reference signal.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: July 26, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Myung Lee, Dong-Soo Kim, Gun-Hee Han, Seog-Heon Ham
  • Patent number: 7978237
    Abstract: An apparatus for canceling a fixed pattern noise in a CMOS image sensor includes a storage device, a fixed pattern noise operation circuit, and a fixed pattern noise canceling circuit. The storage device stores first reference fixed pattern noises operated in a vertical blank section of an (n?1)th frame. The fixed pattern noise operation circuit calculates second reference fixed pattern noises based on the first reference fixed pattern noises stored in the storage device and blank fixed pattern noises output in a vertical blank section of an n-th frame and outputs the second reference fixed pattern noises to the storage device to update the first reference fixed pattern noises to the second reference fixed pattern noises.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: July 12, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myoung-Su Lee, Su-Hun Lim, Jin-Kyeong Heo, Tae-Chan Kim, Seog-Heon Ham, Yong-In Han
  • Patent number: 7916061
    Abstract: A method and apparatus are provided for sigma-delta (??) analog to digital conversion, the method including receiving an analog signal, sampling the received signal, comparing the sampled signal with a constant reference voltage, providing at least one high-order bit responsive to the constant reference comparison, comparing the sampled signal with a variable reference voltage, providing at least one low-order bit responsive to the variable reference comparison, and combining the at least one high-order bit with the at least one low-order bit; and the apparatus including a comparator, a first ADC portion supplying the comparator with a constant reference voltage for providing at least one high-order bit, and a second ADC portion supplying the comparator with a variable reference voltage for providing at least one low-order bit.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: March 29, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youngcheol Chae, In Hee Lee, Jimin Cheon, Gunhee Han, Seog Heon Ham
  • Publication number: 20110069191
    Abstract: A correlated double sampling (CDS) circuit is provided. The CDS circuit is configured to perform a CDS on a reset signal and an image signal during a CDS phase respectively. The CDS circuit includes a sampling circuit configured to output a difference between a correlated double sampled reset signal and a correlated double sampled image signal, and a feedback unit configured to feedback the difference output from the sampling circuit during a PGA phase to an input of the sampling circuit.
    Type: Application
    Filed: July 7, 2010
    Publication date: March 24, 2011
    Inventors: Wun-Ki Jung, Seog Heon Ham, Dong Hun Lee, Kwi Sung Yoo, Min Ho Kwon
  • Publication number: 20110069211
    Abstract: Example embodiments are directed to an analog-to-digital converter (ADC) that controls a gain by changing a system parameter, an image sensor including the ADC and a method of operating the ADC. The ADC includes a sigma-delta modulator which receives an input signal and a clock signal and sigma-delta modulates the input signal into a digital output signal based on the clock signal and an accumulation unit which accumulates the digital output signal at each cycle of the clock signal according to an analog-to-digital conversion time and outputs an accumulation result. A system parameter is varied during the analog-to-digital conversion time to control a gain of the ADC.
    Type: Application
    Filed: September 10, 2010
    Publication date: March 24, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Wun-Ki JUNG, Seog Heon HAM, Dong Hun LEE, Kwi Sung YOO, Min Ho KWON
  • Publication number: 20110050473
    Abstract: An analog-digital converter (ADC) includes a correlated double sampling (CDS) circuit configured to perform CDS on each of a reset signal and an image signal output from a pixel to generate a correlated double sampled reset signal and a correlated double sampled image signal, respectively. A delta sigma (??) ADC, also included in the ADC, is configured to output a difference between a first digital code that is generated by performing ?? analog-digital conversion on the correlated double sampled reset signal and a second digital code that is generated by performing ?? analog-digital conversion on the correlated double sampled image signal.
    Type: Application
    Filed: May 20, 2010
    Publication date: March 3, 2011
    Inventors: Wun-Ki Jung, Seog Heon Ham, Dong Hun Lee, Kwi Sung Yoo, Min Ho Kwon
  • Publication number: 20110043676
    Abstract: A CMOS image sensor includes a photodiode, a switch configured to transfer a signal sensed by the photodiode to a sensing node, and a comparator electrically and directly connected to the sensing node and configured to compare the sensed signal of the sensing node and a ramp signal. Reset offset of the comparator is maintained at a constant offset voltage level during an initialization mode.
    Type: Application
    Filed: July 1, 2010
    Publication date: February 24, 2011
    Applicants: SAMSUNG ELECTRONICS CO., LTD., INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Seung hyun LIM, Jeong hwan LEE, Kun hee CHO, Gun Hee HAN, Kwi Sung YOO, Seog heon HAM
  • Publication number: 20100265114
    Abstract: In one embodiment, an analog-to-digital converter (ADC) includes a comparator and a supply circuit. The comparator is configured to compare an input signal to a reference signal. The supply circuit is configured to supply the reference signal. The supply circuit is configured to provide different circuit configurations for supplying the reference signal during different stages of analog-to-digital conversion such that the reference signal is scaled in substantially a same manner during at least two of the stages.
    Type: Application
    Filed: April 19, 2010
    Publication date: October 21, 2010
    Inventors: Jeonghwan Lee, Gunhee Han, Kwi Sung Yoo, Seog Heon Ham
  • Patent number: 7800427
    Abstract: A switched capacitor circuit includes an amplifier, a charging unit, an offset unit, and an integrating unit. The charging unit is coupled between an input node and a first node, and is for accumulating charge corresponding to an input signal during a sampling mode. The offset unit is coupled between the first node and an input of the amplifier, and is for maintaining the first node to be a virtual ground during an integrating mode. The integrating unit is coupled between the first node and an output of the amplifier, and is for receiving charge from the charging unit during the integrating mode.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youngcheol Chae, Gunhee Han, Seog-Heon Ham
  • Publication number: 20100225794
    Abstract: In one embodiment, the ADC includes a modulator configured to generate a symbol sequence, an operand generator configured to generate operands, and a selector configured to selectively output at least one of (1) a reference value and (2) at least one of the operands based on the symbol sequence. The ADC further includes an accumulator configured to accumulate output from the selector.
    Type: Application
    Filed: February 22, 2010
    Publication date: September 9, 2010
    Inventors: Kwi Sung Yoo, Seog Heon Ham, Dong Hun Lee, Min Ho Kwon, Wun-Ki Jung
  • Publication number: 20100208114
    Abstract: A two-path sigma-delta analog-to-digital converter and an image sensor including the same are provided. The two-path sigma-delta analog-to-digital converter includes at least one integrator configured to integrate a first integrator input signal during a second half cycle of a clock signal and integrate a second integrator input signal during a first half cycle of the clock signal by using a single operational amplifier; a quantizer configured to quantize integrated signals from the at least one integrator and output a first digital signal and a second digital signal; and a feedback loop configured to feed back the first and second digital signals to an input of the at least one integrator. A first analog signal and a second analog signal respectively input from two input paths are respectively converted to the first and second digital signals using the single operational amplifier, thereby increasing power efficiency and reducing an area.
    Type: Application
    Filed: February 4, 2010
    Publication date: August 19, 2010
    Inventors: Min Ho Kwon, Seog Heon Ham, Dong Hun Lee, Kwi Sung Yoo, Wun-Ki Jung
  • Patent number: 7773018
    Abstract: A sigma-delta analog-to-digital converter may include a sigma-delta modulator and a decimation filter. The sigma-delta modulator may convert a first analog input signal into a first bit stream having a first pattern using sigma-delta modulation and convert a second analog input signal into a second bit stream having a second pattern using the sigma-delta modulation. The decimation filter may integrate the number of bits having a particular value in the first bit stream, output a first digital value, calculate a bitwise complement value of the first digital value, integrate the number of bits having the particular value in the second bit stream with the bitwise complement value of the first digital value as an initial value of a second digital value, and output the second digital value.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: August 10, 2010
    Assignees: Samsung Electronics Co., Ltd., Industry-Academic Cooperation Foundation Yonsei University
    Inventors: Youngcheol Chae, In Hee Lee, Gunhee Han, Seog Heon Ham
  • Publication number: 20100177220
    Abstract: An image sensor comprises a plurality of pixel units connected to a column line, a signal process circuit configured to process a signal output from the column line according to a switching operation, and a kick-back noise blocking circuit configured to reduce kick-back noise caused by the switching operation. Each of the pixel units includes a photoelectric conversion element. The kick-back noise blocking circuit is connected between the column line and the signal process circuit.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 15, 2010
    Inventors: Min Ho Kwon, Seog Heon Ham, Dong Hun Lee, Kwi Sung Yoo, Wun-Ki Jung