Patents by Inventor Hideaki Kuwabara
Hideaki Kuwabara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220283654Abstract: A novel electronic device is provided. Alternatively an electronic device of a novel embodiment is provided. An electronic device includes a support and a display portion. The support has a first curved surface. The display portion is provided over the support. The display portion has a top surface and a side surface in contact with at least one side of the top surface. The side surface has a second curved surface. The top surface includes a first display region. The side surface includes a second display region. The first display region and the second display region are continuously provided.Type: ApplicationFiled: February 23, 2022Publication date: September 8, 2022Inventors: Hideaki KUWABARA, Masaaki HIROKI
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Patent number: 11397451Abstract: A highly convenient electronic device used while being worn on a body is provided. The electronic device is an arm-worn electronic device including a display panel, a power storage device, a circuit, and a sealing structure. The display panel displays an image with power supplied from the power storage device. The circuit includes an antenna and charges the power storage device wirelessly. Inside the sealing structure, the display panel, the power storage device, and the circuit are provided. The sealing structure includes a portion that transmits visible light. The sealing structure can be worn on an arm or is connected to a structure body that can be worn on an arm.Type: GrantFiled: May 1, 2020Date of Patent: July 26, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yusuke Yoshitani, Hideaki Kuwabara, Natsuko Takase
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Publication number: 20220214789Abstract: A data processing device which includes a flexible position input portion for sensing proximity or a touch of an object such as a user's palm and finger. In the case where a first region of the flexible position input portion is held by a user for a certain period, supply of image signals to the first region is selectively stopped.Type: ApplicationFiled: March 23, 2022Publication date: July 7, 2022Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Hideaki KUWABARA, Koji DAIRIKI
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Publication number: 20220181359Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. Au oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.Type: ApplicationFiled: February 16, 2022Publication date: June 9, 2022Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
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Patent number: 11348949Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.Type: GrantFiled: August 20, 2020Date of Patent: May 31, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
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Patent number: 11294561Abstract: A data processing device which includes a flexible position input portion for sensing proximity or a touch of an object such as a user's palm and finger. In the case where a first region of the flexible position input portion is held by a user for a certain period, supply of image signals to the first region is selectively stopped.Type: GrantFiled: February 18, 2020Date of Patent: April 5, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hajime Kimura, Hideaki Kuwabara, Koji Dairiki
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Publication number: 20220091453Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.Type: ApplicationFiled: November 30, 2021Publication date: March 24, 2022Inventors: Shunpei YAMAZAKI, Yukie SUZUKI, Hideaki KUWABARA, Hajime KIMURA
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Publication number: 20220068977Abstract: An aperture ratio of a semiconductor device is improved. A driver circuit and a pixel are provided over one substrate, and a first thin film transistor in the driver circuit and a second thin film transistor in the pixel each include a gate electrode layer, a gate insulating layer over the gate electrode layer, an oxide semiconductor layer over the gate insulating layer, source and drain electrode layers over the oxide semiconductor layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer, and the source and drain electrode layers. The gate electrode layer, the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, and the oxide insulating layer of the second thin film transistor each have a light-transmitting property.Type: ApplicationFiled: October 28, 2021Publication date: March 3, 2022Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Hiroyuki MIYAKE, Hideaki KUWABARA, Tatsuya TAKAHASHI
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Patent number: 11262795Abstract: A novel electronic device is provided. Alternatively an electronic device of a novel embodiment is provided. An electronic device includes a support and a display portion. The support has a first curved surface. The display portion is provided over the support. The display portion has a top surface and a side surface in contact with at least one side of the top surface. The side surface has a second curved surface. The top surface includes a first display region. The side surface includes a second display region. The first display region and the second display region are continuously provided.Type: GrantFiled: July 2, 2018Date of Patent: March 1, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideaki Kuwabara, Masaaki Hiroki
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Publication number: 20220059809Abstract: As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in area, defects due to precision, bending, and the like of a mask used at the lime of evaporation have become issues. A partition including portions with different thicknesses over a pixel electrode (also referred to as a first electrode) in a display region and in the vicinity of a pixel electrode layer is formed, without increasing the number of steps, by using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film.Type: ApplicationFiled: November 4, 2021Publication date: February 24, 2022Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideaki Kuwabara, Hideto Ohnuma
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Publication number: 20220043314Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.Type: ApplicationFiled: August 26, 2021Publication date: February 10, 2022Inventors: Shunpei YAMAZAKI, Miyuki HOSOBA, Junichiro SAKATA, Hideaki KUWABARA
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Patent number: 11194207Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.Type: GrantFiled: June 26, 2020Date of Patent: December 7, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yukie Suzuki, Hideaki Kuwabara, Hajime Kimura
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Patent number: 11177289Abstract: An aperture ratio of a semiconductor device is improved. A driver circuit and a pixel are provided over one substrate, and a first thin film transistor in the driver circuit and a second thin film transistor in the pixel each include a gate electrode layer, a gate insulating layer over the gate electrode layer, an oxide semiconductor layer over the gate insulating layer, source and drain electrode layers over the oxide semiconductor layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer, and the source and drain electrode layers. The gate electrode layer, the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, and the oxide insulating layer of the second thin film transistor each have a light-transmitting property.Type: GrantFiled: October 24, 2019Date of Patent: November 16, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroyuki Miyake, Hideaki Kuwabara, Tatsuya Takahashi
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Patent number: 11171315Abstract: As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in area, defects due to precision, bending, and the like of a mask used at the time of evaporation have become issues. A partition including portions with different thicknesses over a pixel electrode (also referred to as a first electrode) in a display region and in the vicinity of a pixel electrode layer is formed, without increasing the number of steps, by using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film.Type: GrantFiled: February 1, 2019Date of Patent: November 9, 2021Inventors: Hideaki Kuwabara, Hideto Ohnuma
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Patent number: 11106101Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.Type: GrantFiled: May 6, 2020Date of Patent: August 31, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Miyuki Hosoba, Junichiro Sakata, Hideaki Kuwabara
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Patent number: 11107846Abstract: A technique is described in which a transistor formed using an oxide semiconductor film, a transistor formed using a polysilicon film, a transistor formed using an amorphous silicon film or the like, a transistor formed using an organic semiconductor film, a light-emitting element, or a passive element is separated from a glass substrate by light or heat. An oxide layer is formed over a light-transmitting substrate, a metal layer is selectively formed over the oxide layer, a resin layer is formed over the metal layer, an element layer is formed over the resin layer, a flexible film is fixed to the element layer, the resin layer and the metal layer are irradiated with light through the light-transmitting substrate, the light-transmitting substrate is separated, and a bottom surface of the metal layer is made bare.Type: GrantFiled: March 5, 2020Date of Patent: August 31, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideaki Kuwabara, Hiroki Adachi, Satoru Idojiri
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Publication number: 20210240221Abstract: A novel electronic device is provided. Alternatively an electronic device of a novel embodiment is provided. An electronic device includes a ring portion and a display portion. The display portion is flexible. The display portion has a top surface and a first side surface in contact with at least one side of the top surface. The first side surface has a curved surface. The top surface includes a first display region. The first side surface includes a second display region. The first display region and the second display region are continuously provided. The electronic device is mounted such that the ring portion is in contact with a user's finger.Type: ApplicationFiled: April 19, 2021Publication date: August 5, 2021Inventors: Hideaki KUWABARA, Masaaki HIROKI
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Patent number: 11009909Abstract: A novel electronic device is provided. Alternatively an electronic device of a novel embodiment is provided. An electronic device includes a ring portion and a display portion. The display portion is flexible. The display portion has a top surface and a first side surface in contact with at least one side of the top surface. The first side surface has a curved surface. The top surface includes a first display region. The first side surface includes a second display region. The first display region and the second display region are continuously provided. The electronic device is mounted such that the ring portion is in contact with a user's finger.Type: GrantFiled: September 24, 2018Date of Patent: May 18, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideaki Kuwabara, Masaaki Hiroki
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Publication number: 20210143281Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.Type: ApplicationFiled: September 2, 2020Publication date: May 13, 2021Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE, Kei TAKAHASHI, Kouhei TOYOTAKA, Masashi TSUBUKU, Kosei NODA, Hideaki KUWABARA
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Patent number: 10998512Abstract: A power saving system using a plurality of flexible display devices placed on various places is provided. A structure of a bendable portion in a display device is improved. Specifically, a wiring partly including a metal nanoparticle is used. Openings are formed in an insulating layer so that the wiring becomes substantially longer by meandering in cross section. When a plurality of openings are formed and aligned, a portion that is easy to bend is formed along the line where they are aligned. A plurality of display panels are used for one display portion. The flexible display portion can be provided on a surface, specifically, a curved surface of furniture such as a chair or a sofa.Type: GrantFiled: November 27, 2019Date of Patent: May 4, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hideaki Kuwabara