Patents by Inventor Hideaki Kuwabara

Hideaki Kuwabara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10558265
    Abstract: An input device having flexibility includes a display portion, a touch panel, a haptic element, a haptic controller, and a control portion. The touch panel is configured to acquire information on the size of a user's body part operating the input device and transmit the information to the control portion. The control portion is configured to receive the information, generate information on the positioning of a plurality of buttons, and transmit the information to the display portion. The display portion is configured to display the plurality of buttons on the basis of the received information. The haptic controller is configured to transmit information on a haptic effect to the haptic element.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: February 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Kasahara, Hideaki Kuwabara
  • Patent number: 10516118
    Abstract: A power saving system using a plurality of flexible display devices placed on various places is provided. A structure of a bendable portion in a display device is improved. Specifically, a wiring partly including a metal nanoparticle is used. Openings are formed in an insulating layer so that the wiring becomes substantially longer by meandering in cross section. When a plurality of openings are formed and aligned, a portion that is easy to bend is formed along the line where they are aligned. A plurality of display panels are used for one display portion. The flexible display portion can be provided on a surface, specifically, a curved surface of furniture such as a chair or a sofa.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: December 24, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hideaki Kuwabara
  • Publication number: 20190371831
    Abstract: To provide a semiconductor device in which a layer to be peeled is attached to a base having a curved surface, and a method of manufacturing the same, and more particularly, a display having a curved surface, and more specifically a light-emitting device having a light emitting element attached to a base with a curved surface. A layer to be peeled, which contains a light emitting element furnished to a substrate using a laminate of a first material layer which is a metallic layer or nitride layer, and a second material layer which is an oxide layer, is transferred onto a film, and then the film and the layer to be peeled are curved, to thereby produce a display having a curved surface.
    Type: Application
    Filed: June 18, 2019
    Publication date: December 5, 2019
    Inventors: Toru TAKAYAMA, Junya MARUYAMA, Yuugo GOTO, Hideaki KUWABARA, Shunpei YAMAZAKI
  • Patent number: 10461098
    Abstract: An aperture ratio of a semiconductor device is improved. A driver circuit and a pixel are provided over one substrate, and a first thin film transistor in the driver circuit and a second thin film transistor in the pixel each include a gate electrode layer, a gate insulating layer over the gate electrode layer, an oxide semiconductor layer over the gate insulating layer, source and drain electrode layers over the oxide semiconductor layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer, and the source and drain electrode layers. The gate electrode layer, the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, and the oxide insulating layer of the second thin film transistor each have a light-transmitting property.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: October 29, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroyuki Miyake, Hideaki Kuwabara, Tatsuya Takahashi
  • Patent number: 10454059
    Abstract: A FET is formed on a semiconductor substrate, a curved surface having a radius of curvature is formed on an upper end of an insulation, a portion of a first electrode is exposed corresponding to the curved surface to form an inclined surface, and a region defining a luminescent region is subjected to etching to expose the first electrode. Luminescence emitted from an organic chemical compound layer is reflected by the inclined surface of the first electrode to increase a total quantity of luminescence taken out in a certain direction.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: October 22, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Seo, Hideaki Kuwabara
  • Publication number: 20190265528
    Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.
    Type: Application
    Filed: May 14, 2019
    Publication date: August 29, 2019
    Inventors: Shunpei YAMAZAKI, Yukie SUZUKI, Hideaki KUWABARA, Hajime KIMURA
  • Patent number: 10396097
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: August 27, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • Patent number: 10338447
    Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: July 2, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yukie Suzuki, Hideaki Kuwabara, Hajime Kimura
  • Patent number: 10325709
    Abstract: There is provided a power transmission device to switch a coupled state and an uncoupled state between a first member and a second member which are arranged in a transmission path of a driving force to thereby control transmission of the driving force. The device includes a movable body having ferromagnetic property, a first magnetic path and a second magnetic path, and a permanent magnet. The device also includes a driving portion to excite the electromagnet in the forward direction and then increases an attraction force on a side on which a magnetic flux is increased or decreased.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: June 18, 2019
    Assignee: SINFONIA TECHNOLOGY CO., LTD.
    Inventor: Hideaki Kuwabara
  • Patent number: 10325940
    Abstract: To provide a semiconductor device in which a layer to be peeled is attached to a base having a curved surface, and a method of manufacturing the same, and more particularly, a display having a curved surface, and more specifically a light-emitting device having a light emitting element attached to a base with a curved surface. A layer to be peeled, which contains a light emitting element furnished to a substrate using a laminate of a first material layer which is a metallic layer or nitride layer, and a second material layer which is an oxide layer, is transferred onto a film, and then the film and the layer to be peeled are curved, to thereby produce a display having a curved surface.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: June 18, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Hideaki Kuwabara, Shunpei Yamazaki
  • Publication number: 20190179196
    Abstract: A semiconductor device including a large display portion with improved portability is provided. The display device includes a first display panel, a second display panel, and an adhesive layer. The area of the second display panel is larger than the area of the first display panel. The first display panel includes a first substrate, a second substrate, and a reflective liquid crystal element and a first transistor each positioned between the first substrate and the second substrate. The second display panel includes a first resin layer having flexibility, a second resin layer having flexibility, and a light-emitting element and a second transistor each positioned between the first resin layer and the second resin layer. The liquid crystal element has a function of reflecting light toward the second substrate side. The light-emitting element has a function of emitting light toward the second resin layer side.
    Type: Application
    Filed: August 3, 2017
    Publication date: June 13, 2019
    Inventors: Shingo EGUCHI, Hideaki KUWABARA, Kazune YOKOMIZO
  • Publication number: 20190165334
    Abstract: As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in area, defects due to precision, bending, and the like of a mask used at the time of evaporation have become issues. A partition including portions with different thicknesses over a pixel electrode (also referred to as a first electrode) in a display region and in the vicinity of a pixel electrode layer is formed, without increasing the number of steps, by using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film.
    Type: Application
    Filed: February 1, 2019
    Publication date: May 30, 2019
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki KUWABARA, Hideto OHNUMA
  • Patent number: 10257884
    Abstract: A device that warms a surface of a living body required to be warmed at an appropriate timing at any place indoors and outdoors or the sea without causing low temperature burns. A sheet having a heat generating function including a circuit capable of receiving electric power without contact over a sheet containing plastic or a fibrous body, a heat generating circuit, and a circuit that controls the temperature of the heat generating circuit is manufactured. The user with the sheet transmits the radio signal from the transmission device outdoors or indoors to heat the heat generating circuit on the sheet and the heat can be conducted to the skin of the user. Temperature can be automatically adjusted by the circuit for controlling the temperature of the heat generating circuit.
    Type: Grant
    Filed: September 9, 2008
    Date of Patent: April 9, 2019
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Hideaki Kuwabara
  • Publication number: 20190088785
    Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
    Type: Application
    Filed: September 5, 2018
    Publication date: March 21, 2019
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE, Kei TAKAHASHI, Kouhei TOYOTAKA, Masashi TSUBUKU, Kosei NODA, Hideaki KUWABARA
  • Patent number: 10229936
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: March 12, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • Patent number: 10199851
    Abstract: A secondary battery module capable of feeding power to a wearable device in a non-contact manner is provided. A power feeding system for an electronic device is provided. The power feeding system includes a secondary battery module and an electronic device. The secondary battery module includes a flexible secondary battery, a power sending portion for non-contact power transmission, a flexible thermoelectric power generating device, and a belt portion storing the flexible secondary battery and the flexible thermoelectric power generating device. The electronic device includes a power receiving portion for non-contact power transmission and is capable of power transmission from the power sending portion for non-contact power transmission which is included in the secondary battery module to the power receiving portion for non-contact power transmission which is included in the electronic device.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: February 5, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaaki Hiroki, Junpei Momo, Hideaki Kuwabara
  • Patent number: 10199612
    Abstract: As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in area, defects due to precision, bending, and the like of a mask used at the time of evaporation have become issues. A partition including portions with different thicknesses over a pixel electrode (also referred to as a first electrode) in a display region and in the vicinity of a pixel electrode layer is formed, without increasing the number of steps, by using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: February 5, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Kuwabara, Hideto Ohnuma
  • Publication number: 20190033913
    Abstract: A novel electronic device is provided. Alternatively an electronic device of a novel embodiment is provided. An electronic device includes a ring portion and a display portion. The display portion is flexible. The display portion has a top surface and a first side surface in contact with at least one side of the top surface. The first side surface has a curved surface. The top surface includes a first display region. The first side surface includes a second display region. The first display region and the second display region are continuously provided. The electronic device is mounted such that the ring portion is in contact with a user's finger.
    Type: Application
    Filed: September 24, 2018
    Publication date: January 31, 2019
    Inventors: Hideaki KUWABARA, Masaaki HIROKI
  • Publication number: 20190019895
    Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
    Type: Application
    Filed: September 5, 2018
    Publication date: January 17, 2019
    Inventors: Shunpei YAMAZAKI, Miyuki HOSOBA, Junichiro SAKATA, Hideaki KUWABARA
  • Patent number: 10170528
    Abstract: Provided is a novel display panel that is highly convenient or reliable. The display device has two display modes: a reflective display mode and a light-emitting display mode. In the light-emitting display mode, light display is performed by transmitting light from a light-emitting element overlapping with an opening in a pixel electrode of a reflective display element. A switching element of the reflective display element and a switching element electrically connected to the light-emitting element are formed over one substrate. They are each a transistor whose channel formation region is formed in a silicon-containing film, specifically a polysilicon film.
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: January 1, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hideaki Kuwabara