Abstract: According to one embodiment, a signal processing circuit includes a first voltage setting circuit that sets a reference voltage on an input side of an isolator, a variable gain amplifier circuit that amplifies an output signal of the isolator, a DC offset adjustment circuit that adjusts an offset of the variable gain amplifier circuit, a second voltage setting circuit that sets a reference voltage on an output side of the isolator, and a control circuit that controls the DC offset adjustment circuit in response to a result of comparison of an output voltage of the variable gain amplifier circuit with an output voltage of the second voltage setting circuit.

Abstract: A semiconductor device that normally-off drives a first transistor that normally-on drives, the semiconductor device includes a first circuitry, a second circuitry, and a first diode. The first circuitry that is connected with a power supply voltage and a ground voltage, detects the power supply voltage, and outputs a transition state of the power supply voltage. The second circuitry that is connected with the power supply voltage, the ground voltage, the first circuitry, and a second transistor, and outputs a drive voltage of a second transistor connected in series with the first transistor, based on an output of the first circuitry. The first diode having an anode connected with a drive terminal of the first transistor and a cathode connected with an output terminal of the second transistor.

Abstract: According to one embodiment, a degradation detection device includes a driving circuit that supplies a driving signal that controls on/off of an output transistor to the output transistor and an output circuit that compares a value of integral of an output current that is output by the output transistor in an off-state thereof over a predetermined period of time with a predetermined threshold when the output transistor is turned from an on-state thereof to an off-state thereof and outputs a signal that indicates a degradation state of the output transistor depending on a result of such comparison.

Abstract: According to an embodiment, a current detecting circuit includes: a normally-OFF type second switching element that is cascode-connected to a normally-ON type first switching element that includes a drain for outputting an output current; a normally-OFF type third switching element that is connected in parallel to the second switching element and whose drain is connected to a variable current source; and a comparison circuit that outputs a detection signal in accordance with a comparison result between a drain voltage of the second switching element and a drain voltage of the third switching element.

Abstract: According to one embodiment, a drive control circuit includes a first transistor that supplies a current to a gate of an output transistor in response to a drive signal, a second transistor that supplies a current to a capacitor in response to the drive signal, a comparison circuit that compares a gate voltage of the output transistor and a voltage of the capacitor, a control signal generation circuit that generates a control signal in response to an output signal of the comparison circuit and the drive signal, and a third transistor that supplies a current to a gate of the output transistor in response to the control signal.

Abstract: According to one aspect of embodiments, a drive circuit of a normally-ON transistor includes: a normally-OFF transistor that includes a main current path connected in serial to a main current path of the normally-ON transistor; and a buffer circuit that supplies, to a gate of the normally-ON transistor, a control signal for controlling turning ON and OFF of the normally-ON transistor, whose high-voltage side and low-voltage side are biased by a bias voltage supplied from a power source unit.

Abstract: According to one aspect of embodiments, a drive circuit of a normally-ON transistor includes: a normally-OFF transistor that includes a main current path connected in serial to a main current path of the normally-ON transistor; and a buffer circuit that supplies, to a gate of the normally-ON transistor, a control signal for controlling turning ON and OFF of the normally-ON transistor, whose high-voltage side and low-voltage side are biased by a bias voltage supplied from a power source unit.

Abstract: A current detection circuit includes normally-on-type and a first normally-off-type switching elements with main current paths that are connected in series, and a second normally-off-type switching element that has a source and a gate that are connected to a source and a gate of the first normally-off-type switching element and a drain that is connected to a constant current source, and executes a division process by using drain voltages of the two normally-off-type switching elements.

Abstract: According to one aspect of embodiments, a drive circuit of a normally-ON transistor includes: a normally-OFF transistor that includes a main current path connected in serial to a main current path of the normally-ON transistor; and a buffer circuit that supplies, to a gate of the normally-ON transistor, a control signal for controlling turning ON and OFF of the normally-ON transistor, whose high-voltage side and low-voltage side are biased by a bias voltage supplied from a power source unit.

Abstract: A current detection circuit includes normally-on-type and a first normally-off-type switching elements with main current paths that are connected in series, and a second normally-off-type switching element that has a source and a gate that are connected to a source and a gate of the first normally-off-type switching element and a drain that is connected to a constant current source, and executes a division process by using drain voltages of the two normally-off-type switching elements.

Abstract: A current detection circuit includes normally-on-type and a first normally-off-type switching elements with main current paths that are connected in series, and a second normally-off-type switching element that has a source and a gate that are connected to a source and a gate of the first normally-off-type switching element and a drain that is connected to a constant current source, and executes a division process by using drain voltages of the two normally-off-type switching elements.

Abstract: According to one embodiment, a semiconductor integrated circuit includes a normally-on type first switching element that has a source, a drain, and a gate, a normally-off type second switching element that has a drain that is connected to the source of the first switching element, a gate that is supplied with a driving signal, and a source, a resistor that is connected between the gate of the first switching element and the source of the second switching element, a first capacitor that is connected in parallel to the resistor, and a second capacitor between the gate and the source of the first switching element.

Abstract: According to one embodiment, a semiconductor integrated circuit includes a normally-on type first switching element that has a source, a drain, and a gate, a normally-off type second switching element that has a drain that is connected to the source of the first switching element, a gate that is supplied with a driving signal, and a source, a resistor that is connected between the gate of the first switching element and the source of the second switching element, a first capacitor that is connected in parallel to the resistor, and a second capacitor between the gate and the source of the first switching element.

Abstract: According to one embodiment, a current detecting circuit includes: a normally-ON type first switching element that includes a drain, a source, and a gate; a normally-OFF type second switching element including a drain that is connected to the source of the first switching element, a source that is connected to the gate of the first switching element, and a gate; and a differential amplification circuit that outputs a voltage according to a voltage between the drain and the source of the second switching element.

Abstract: According to one embodiment, a transmission system includes a transmitter and a receiver. The transmitter includes a modulator configured to modulate transmission data at a chip rate to generate a modulation signal, and one or a plurality of light sources configured to emit visible light according to the modulation signal. The receiver includes a light receiver having one or more lines of light receiving elements to receive light in a first range including the visible light; and a demodulator configured to demodulate image data generated according to the light received by the light receiver to generate reception data corresponding to the transmission data. A following equation is satisfied ff<fm where fm is the chip rate, and ff is a frame rate of the light receiver.

Abstract: According to one embodiment, a light receiver includes a light reception module, a multi-exposure area selector, a multi-exposure controller, and a readout module. The light reception module includes N lines, each of the N lines having a plurality of light receiving elements. The multi-exposure area selector is configured to select one or a plurality of single-exposure lines and one or a plurality of multi-exposure lines. The multi-exposure controller is configured to, per the unit time, perform an exposure on the single-exposure lines one time for a first exposure time; and a first exposure and a second exposure on the multi-exposure lines. The readout module is configured to read exposure amounts of the lines line by line. The multi-exposure controller is configured to start the second exposure on the multi-exposure lines before reading of the exposure amounts of all the single-exposure lines is completed.

Abstract: According to one embodiment, a transmission system includes a transmitter, and a receiver. The transmitter includes one or a plurality of light sources, a modulator, a first driver, a display, and a second driver. The one or a plurality of light sources is configured to emit a visible light whose light amount corresponds to a first drive signal. The modulator is configured to, according to transmission data to be transmitted from the transmitter to the receiver, modulate a first luminance signal indicative of an amount of the light the light source is configured to emit, to generate a second luminance signal. The first driver is configured to generate the first drive signal based on the second luminance signal. A mean of the second luminance signal during one frame in the input video signal is substantially equal to a value of the first luminance signal in the frame.

Abstract: According to an embodiment, a semiconductor integrated circuit includes an amplifier, an interference wave suppression unit, a coupler and a filter control circuit. The interference wave suppression unit includes a filter being controlled to be on or off. The filter is configured to suppress an interference wave component of an amplified signal to output the signal as an output signal when the filter is on. The coupler is configured to detect an input signal or the output signal. The filter control circuit controls the filter to be on when a signal level of a detection input signal or a detection output signal detected by the coupler is greater than or equal to a reference value, and controls the filter to be off when the signal level is smaller than the reference value, at arbitrary determination timing in a period of time between a transmission and a reception.

Abstract: The radio transmitting apparatus includes a first initial phase value setting circuit that sets, in the first modulator, an initial value of the phase of the first modulated signal, which is a value at the start of the modulation according to the first modulation scheme. The radio transmitting apparatus includes a second initial phase value setting circuit that sets, in the second modulator, the phase stored in the phase storing circuit as an initial value of the phase of the second modulated signal, which is a value at the start of the modulation according to the second modulation scheme. The radio transmitting apparatus includes a signal gathering circuit that selects and outputs the first modulated signal output from the first modulator and then selects and outputs the second modulated signal output from the second modulator.

Abstract: According to one embodiment, a transmission system includes a transmitter and a receiver. The transmitter includes a modulator configured to modulate transmission data at a chip rate to generate a modulation signal, and one or a plurality of light sources configured to emit visible light according to the modulation signal. The receiver includes a light receiver having one or more lines of light receiving elements to receive light in a first range including the visible light; and a demodulator configured to demodulate image data generated according to the light received by the light receiver to generate reception data corresponding to the transmission data. A following equation is satisfied ff<fm where fm is the chip rate, and ff is a frame rate of the light receiver.