Patents by Inventor Hideaki Sakaguchi

Hideaki Sakaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020062946
    Abstract: A heat radiation fin comprises a substrate having a high thermal conductivity and a plurality of heat radiation plates. The heat radiation plates are arranged upright on the substrate with predetermined intervals therebetween. Each of the heat radiation plates is formed of a heat-resistant resin containing carbon fibers.
    Type: Application
    Filed: January 10, 2002
    Publication date: May 30, 2002
    Inventors: Kei Murayama, Mitsutoshi Higashi, Hideaki Sakaguchi, Hiroko Koike
  • Publication number: 20020041037
    Abstract: A semiconductor device having a first electronic part and a second electronic part, the first electronic part being larger than the second electronic part in area and in the number of connection terminal pads including pad form electrode terminals, and external connection terminals or other connection terminals bonded to the connection terminal pads, wherein the first and second electronic parts are disposed one upon the other with respective pad forming surfaces facing each other and are electrically connected to each other by flip-chip bonding; and springy wire form connection terminals stand on, and are bonded to, the connection terminal pads of the first electronic part other than those electrically connected to the connection terminal pads of the second electronic part.
    Type: Application
    Filed: December 13, 2001
    Publication date: April 11, 2002
    Applicant: Shinko Electronic Industries Co., Ltd.
    Inventors: Tsuyoshi Kobayashi, Mitsutoshi Higashi, Hiroko Koike, Kei Murayama, Hideaki Sakaguchi
  • Publication number: 20010040152
    Abstract: A method for cutting a semiconductor wafer is provided. A mount tape is adhered to a back surface of the semiconductor wafer. The mount tape comprises a resin base and a mesh-like member made of a material harder than that of the resin base and embedded in the resin base. A beam-like liquid jet is ejected toward a front surface of the semiconductor wafer and, simultaneously, a laser beam is transmitted axially through said beam-like liquid jet, so that the semiconductor wafer is cut into individual pieces, by said laser beam, together with the resin base of the mount tape, while the mesh-like member is not cut, but remains in its connected state.
    Type: Application
    Filed: May 2, 2001
    Publication date: November 15, 2001
    Inventors: Mitsutoshi Higashi, Hideaki Sakaguchi
  • Publication number: 20010028108
    Abstract: A semiconductor device includes a semiconductor element having an electrode formation surface on which an electrode terminal and a re-wiring portion are formed. The re-wiring portion is electrically connected to the electrode terminal. An external terminal made of wire has a base end connected to the re-wiring portion and a distal end extending therefrom. An electrically insulating resin covers the electrode formation surface in such a manner that at least the distal end of the external terminal is exposed outside the insulating resin. During a fabricating process, the electrode formation surface is coated with an electrically insulating resin and then a part of the electrically insulating resin is removed from the distal end of the external connecting terminal to expose the same outside the insulating resin.
    Type: Application
    Filed: June 6, 2001
    Publication date: October 11, 2001
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Mitsutoshi Higashi, Hideaki Sakaguchi, Kazunari Imai, Masahiro Kyozuka, Mitsuharu Shimizu
  • Publication number: 20010009302
    Abstract: A semiconductor device comprises a substantially flat interconnection substrate having an interconnection pattern formed on a surface thereof. A semiconductor element is mounted on the substantially flat interconnection substrate so that an electrode terminal of the semiconductor element is electrically connected to the interconnection pattern. A heat radiation plate is formed in a form of a sheet having a concave portion so as to cover the semiconductor element and is bonded on the surface of the substantially flat interconnection substrate. An external connection terminal is formed on the other surface of the substantially flat interconnection substrate so as to penetrate through the substantially flat interconnection substrate and be electrically connected to the interconnection pattern. The heat radiation plate is formed of a heat-resistant resin containing carbon fibers.
    Type: Application
    Filed: January 12, 2001
    Publication date: July 26, 2001
    Inventors: Kei Murayama, Mitsutoshi Higashi, Hideaki Sakaguchi, Hiroko Koike
  • Patent number: 6259038
    Abstract: A semiconductor chip mounting circuit board includes a substrate, a wiring circuit formed on a substrate, a conducting pad electrically connected to an electrode of a semiconductor chip which is to be mounted on the substrate. An insulating resist layer is formed on the substrate to cover the wiring circuit and the resist layer has an opening to expose therein the conducting pad. A conducting bump is formed on the conducting pad exposed in the opening. A resist layer has a measuring opening which exposes a reference surface. A height of the conducting bump can be measured by an optical means using the measuring opening.
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: July 10, 2001
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hideaki Sakaguchi, Naoyuki Koizumi, Kenkichi Arai
  • Publication number: 20010006119
    Abstract: A circuit board for use in the production of semiconductor devices, in which the circuit board comprises two or more by-pass capacitors formed thereon, and each by-pass capacitor is constituted from a first electrode layer formed in the uppermost layer of the circuit board, a ferroelectric layer formed, from a ferroelectric material having a higher dielectric constant than the upper electrode layer, over the first electrode layer, and a second electrode layer formed over the ferroelectric layer, and a semiconductor device comprising the circuit board having mounted thereon a semiconductor element. A circuit board-providing article for use in the production of the circuit board, and a process for the production of the circuit board and the semiconductor device, are also disclosed.
    Type: Application
    Filed: December 22, 2000
    Publication date: July 5, 2001
    Inventors: Masayuki Sasaki, Hideaki Sakaguchi
  • Publication number: 20010004130
    Abstract: In a semiconductor device including an insulating core substrate, a plurality of layers of wiring patterns on the core substrate and insulating layers interposed between the wiring patterns, each adjacent pair of the wiring patterns being electrically connected through a conductor portion penetrating through the insulating layer interposed between them, each of the insulating layers is formed integrally, semiconductor chips thinner than one layer of the insulating layer are mounted into at least one of the insulating layers, and the semiconductor chips are electrically connected to one layer of the wiring pattern of one insulating layer adjacent on the side of the core substrate.
    Type: Application
    Filed: December 11, 2000
    Publication date: June 21, 2001
    Inventors: Mitsutoshi Higashi, Kei Murayama, Hideaki Sakaguchi, Hiroko Koike
  • Patent number: 5473619
    Abstract: An arbitrary input value is entered from an input circuit into a driving circuit, and the corresponding output value is detected by an output circuit, and the detected output value is stored in the memory circuit Other input value is fed into the driving circuit, and the detected value is similarly stored. In an arithmetic circuit, the relation between the two output values stored in the memory circuit and the arbitrary two input values fed in the driving circuit is determined, and approval or disapproval is judged by comparing with the criterion stored preliminarily in the control circuit.
    Type: Grant
    Filed: April 7, 1992
    Date of Patent: December 5, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hideaki Sakaguchi