Patents by Inventor Hideaki Shishido

Hideaki Shishido has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8368145
    Abstract: A semiconductor device has a structure including the first semiconductor region 103 which is provided in the first terminal portion 100 and includes the first n-type impurity region 106, the first resistance region 107 provided at an inner periphery portion of the first n-type impurity region 106 in a plane view, and the first p-type impurity region 108 provided at an inner periphery portion of the first resistance region 107 in the plane view, and the second semiconductor region 104 which is provided in the second terminal portion 101 and includes the second p-type impurity region 109, the second resistance region 110 provided at an inner periphery portion of the second p-type impurity region 109 in the plane view, and the second n-type impurity region 111 provided at an inner periphery portion of the second resistance region 110 in the plane view.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: February 5, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Osamu Fukuoka, Masahiko Hayakawa, Hideaki Shishido
  • Patent number: 8363365
    Abstract: The resistance of an integrated circuit against ESD (electrostatic discharge) is improved without disturbing improvement of the performance and reduction of size of the integrated circuit. A protection circuit is interposed between an input and output terminals. When ESD is generated, the input and output terminals are short-circuited by the protection circuit, so that overvoltage application to the circuit is prevented. The circuit is electrically connected to the input and output terminals by a connection wiring. The circuit has a plurality of electrical connection portions between the circuit and the connection wiring, and the connection wiring is formed such that the wiring resistance between the input or output terminal and each of the connection portions is the same. Accordingly, if ESD is generated, voltage application on only one of the connection portions is prevented, whereby the possibility that the circuit will be broken by ESD is decreased.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: January 29, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Osamu Fukuoka, Hideaki Shishido
  • Publication number: 20130021239
    Abstract: A display device includes a display panel including a plurality of pixels, a shutter panel including a driver circuit, a liquid crystal, and light-transmitting electrodes provided in a striped manner, and a positional data detector configured to detect a positional data of a viewer. The shutter panel is provided over a display surface side of the display panel, a width of one of the light-transmitting electrodes in the shutter panel is smaller than that of one of the plurality of pixels, and the driver circuit in the shutter panel is configured to selectively output signals for forming a parallax barrier to the light-transmitting electrodes. The parallax barrier is capable of changing its shape in accordance with the detected positional data.
    Type: Application
    Filed: July 10, 2012
    Publication date: January 24, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Jun KOYAMA, Hiroyuki MIYAKE, Hideaki SHISHIDO, Seiko INOUE, Kouhei TOYOTAKA, Koji KUSUNOKI, Hikaru HARADA, Makoto KANEYASU
  • Patent number: 8354724
    Abstract: The present invention relates to a semiconductor device which includes a photoelectric conversion layer; an amplifier circuit amplifying an output current of the photoelectric conversion layer and including two thin film transistors; a first terminal supplying a high-potential power supply voltage; a second terminal supplying a low-potential power supply voltage; an electrode electrically connecting the two thin film transistors and the photoelectric conversion layer; a first wiring electrically connecting the first terminal and a first thin film transistor which is one of the two thin film transistors; and a second wiring electrically connecting the second terminal and a second thin film transistor which is the other of the two thin film transistors. In the semiconductor device, the value of voltage drop of the first wiring and the second wiring are increased by bending the first wiring and the second wiring.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: January 15, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hideaki Shishido
  • Publication number: 20120211749
    Abstract: To improve the performance of a protection circuit including a diode formed using a semiconductor film. A protection circuit is inserted between two input/output terminals. The protection circuit includes a diode which is formed over an insulating surface and is formed using a semiconductor film. Contact holes for connecting an n-type impurity region and a p-type impurity region of the diode to a first conductive film in the protection circuit are distributed over the entire impurity regions. Further, contact holes for connecting the first conductive film and a second conductive film in the protection circuit are dispersively formed over the semiconductor film. By forming the contact holes in this manner, wiring resistance between the diode and a terminal can be reduced and the entire semiconductor film of the diode can be effectively serve as a rectifier element.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 23, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Osamu FUKUOKA, Masahiko HAYAKAWA, Hideaki SHISHIDO
  • Publication number: 20120194749
    Abstract: It is an object to provide a display device in which a problem of light leakage from a liquid crystal element in black display is reduced or overcome and the contrast is improved. It is another object to provide a pixel circuit having a function to control a lighting state of a backlight based on each pixel. These objects are achieved by turning off a light-emitting element in display of a black gray scale, and by providing a light-emitting element in each pixel and providing, in a pixel circuit, a function to individually control lighting and non-lighting of the light-emitting element depending on a gray scale to perform display. When a backlight is provided in each pixel, a light-emitting element that is a backlight is turned off when a black gray scale is displayed, whereby reduction in contrast due to light leakage from a liquid crystal element can be prevented.
    Type: Application
    Filed: April 10, 2012
    Publication date: August 2, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hajime KIMURA, Yasunori YOSHIDA, Hideaki SHISHIDO, Atsushi UMEZAKI, Makoto YANAGISAWA, Shunpei YAMAZAKI
  • Patent number: 8227741
    Abstract: An object is to provide a photoelectric conversion device which can correct a difference between a measured light intensity and an actual light intensity, which occurs when output current decreases due to the fact that a strong light is received, and outputs the corrected current. The photoelectric conversion device includes a photoelectric conversion element; a photocurrent output circuit for providing a first current corresponding to the amount of incident light on the photoelectric conversion element; a photocurrent correcting circuit which includes a corrective photoelectric conversion element for providing a second current, the corrective photoelectric conversion element including a light shield film for blocking part of light; a photocurrent adder circuit which includes a circuit for providing a fourth current; and an amplifier circuit including a circuit which amplifies a current corresponding to the sum of the first current and the fourth current and outputs the amplified current.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: July 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Hideaki Shishido
  • Publication number: 20120154456
    Abstract: A semiconductor device including a plurality of pixels over a substrate and a display medium including an electronic ink over the substrate, in which at least one pixel of the plurality of pixels comprises first and second subpixels each of which comprises a transistor that comprises an oxide semiconductor including indium, and in which one image of at least one of the plurality of pixels is displayed by a plurality of signals, is provided.
    Type: Application
    Filed: February 8, 2012
    Publication date: June 21, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hajime KIMURA, Hideaki SHISHIDO, Shunpei YAMAZAKI
  • Publication number: 20120132965
    Abstract: A plurality of transistors in which ratios of a channel length L to a channel width W, ?=W/L, are different from each other is provided in parallel as output side transistors 105a to 105c in a current mirror circuit 101 which amplifies a photocurrent of a photoelectric conversion device and an internal resistor is connected to each of the output side transistors 105a to 105c in series. The sum of currents which flow through the plurality of transistors and the internal resistor is output, whereby a transistor with large amount of ? can be driven in a linear range with low illuminance, and a transistor with small amount of ? can be driven in a linear range with high illuminance, so that applicable illuminance range of the photoelectric conversion device can be widened.
    Type: Application
    Filed: February 3, 2012
    Publication date: May 31, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hideaki Shishido, Atsushi Hirose
  • Patent number: 8174047
    Abstract: To improve the performance of a protection circuit including a diode formed using a semiconductor film. A protection circuit is inserted between two input/output terminals. The protection circuit includes a diode which is formed over an insulating surface and is formed using a semiconductor film. Contact holes for connecting an n-type impurity region and a p-type impurity region of the diode to a first conductive film in the protection circuit are distributed over the entire impurity regions. Further, contact holes for connecting the first conductive film and a second conductive film in the protection circuit are dispersively formed over the semiconductor film. By forming the contact holes in this manner wiring resistance between the diode and a terminal can be reduced and the entire semiconductor film of the diode can be effectively serve as a rectifier element.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: May 8, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Osamu Fukuoka, Masahiko Hayakawa, Hideaki Shishido
  • Patent number: 8159449
    Abstract: It is an object to provide a display device in which a problem of light leakage from a liquid crystal element in black display is reduced or overcome and the contrast is improved. It is another object to provide a pixel circuit having a function to control a lighting state of a backlight based on each pixel. These objects are achieved by turning off a light-emitting element in display of a black gray scale, and by providing a light-emitting element in each pixel and providing, in a pixel circuit, a function to individually control lighting and non-lighting of the light-emitting element depending on a gray scale to perform display. When a backlight is provided in each pixel, a light-emitting element that is a backlight is turned off when a black gray scale is displayed, whereby reduction in contrast due to light leakage from a liquid crystal element can be prevented.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: April 17, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yasunori Yoshida, Hideaki Shishido, Atsushi Umezaki, Makoto Yanagisawa, Shunpei Yamazaki
  • Patent number: 8154480
    Abstract: A plurality of transistors in which ratios of a channel length L to a channel width W, ?=W/L, are different from each other is provided in parallel as output side transistors 105a to 105c in a current mirror circuit 101 which amplifies a photocurrent of a photoelectric conversion device and an internal resistor is connected to each of the output side transistors 105a to 105c in series. The sum of currents which flow through the plurality of transistors and the internal resistor is output, whereby a transistor with large amount of ? can be driven in a linear range with low illuminance, and a transistor with small amount of ? can be driven in a linear range with high illuminance, so that applicable illuminance range of the photoelectric conversion device can be widened.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: April 10, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Shishido, Atsushi Hirose
  • Patent number: 8124922
    Abstract: Objects are to accumulate electric charge in a capacitor so that light intensity can be detected even when the amount of incident light is small, and to operate a photoelectric conversion device without increasing the number of elements such as a constant current source or a switch. The photoelectric conversion device includes a photoelectric conversion circuit, a capacitor, and a comparator for comparing a potential of one electrode of the capacitor with a second potential. The photoelectric conversion circuit includes a photoelectric conversion element and an amplifier circuit for amplifying an output current from the photoelectric conversion element In the capacitor, a first potential is supplied through a first switch, and charging or discharging is performed through a second switch in accordance with the current amplified by the amplifier circuit.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: February 28, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Yoshifumi Tanada, Hideaki Shishido, Seiko Amano, Makoto Yanagisawa
  • Patent number: 8115788
    Abstract: An object is to reduce a pseudo contour occurring in time gray scale method display. One pixel is divided into m subpixels (m is an integer of m?2), and the area of the (s+1)th subpixel (1?s?m?1) is twice the area of the s-th subpixel. Further, one frame is divided into n subframes (n is an integer of n?2), and a lighting period of the (p+1)th subframe (1?p?n?1) is 2m times longer than a lighting period of a p-th subframe. Then, at least one subframe of the n subframes is divided into a plurality of subpixels each having a lighting period shorter than that of the subframe so that the n subframes are increased to t subframes (t>n). In at least one subframe of the t subframes, lighting periods of the subframes in a lighting state are sequentially added by the m subpixels, so that a gray scale of the pixel is expressed.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: February 14, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Hideaki Shishido, Shunpei Yamazaki
  • Patent number: 8115160
    Abstract: A protection circuit and a photoelectric conversion device are provided, each of which includes a first wiring, a second wiring, a first switch, a second switch, a capacitor, and a comparing circuit configured to generate a signal corresponding to a potential of the first wiring and a potential of the second wiring, and supply the signal to the first switch and the second switch. The first wiring is electrically connected to a first terminal of the first switch, and the second wiring is electrically connected to a first terminal of the second switch. A second terminal of the first switch is electrically connected to a first electrode of the capacitor, and a second terminal of the second switch is electrically connected to a second electrode of the capacitor.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: February 14, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Yoshifumi Tanada, Hideaki Shishido
  • Patent number: 8106474
    Abstract: A wiring electrically connected to a terminal to which a high power supply potential is applied and a wiring electrically connected to a terminal to which a low power supply potential is applied are formed adjacent to each other and are formed so as to surround the integrated circuit. Thus, wiring resistance can be added between the terminals and the integrated circuit and capacitance can be added between the two wirings. Even if overvoltage is applied to the terminals due to ESD or the like, the energy of the overvoltage is consumed by the wiring resistance and the added capacitor, so that damage of the integrated circuit can be suppressed.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: January 31, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hideaki Shishido
  • Publication number: 20120001881
    Abstract: An object is to provide a driving method of a liquid crystal display device with a low power consumption and a high image quality. A pixel includes a liquid crystal element and a transistor which controls supply of an image signal to the liquid crystal element. The transistor includes, in a channel formation region, a semiconductor which has a wider band gap than a silicon semiconductor and has a lower intrinsic carrier density than silicon, and has an extremely low off-state current. In inversion driving of pixels, image signals having opposite polarities are input to a pair of signal lines between which a pixel electrode is disposed. By employing such a structure, the quality of the displayed image can be increased even in the absence of a capacitor in the pixel.
    Type: Application
    Filed: May 19, 2011
    Publication date: January 5, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hiroyuki MIYAKE, Hideaki SHISHIDO, Ryo ARASAWA
  • Patent number: 8054596
    Abstract: An element is protected without hampering an actual operation in the case where overvoltage that might damage the element is applied. A semiconductor device includes a first potential supply terminal 100; a second potential supply terminal 101; a protection circuit 107 which includes a voltage divider 102 electrically connected to the first potential supply terminal 100 and the second potential supply terminal 101, a control circuit 103, and a bypass circuit 106; and a functional circuit 108 which is electrically connected to the first potential supply terminal 100 and the second potential supply terminal 101 through the protection circuit 107.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Yoshifumi Tanada, Hideaki Shishido
  • Publication number: 20110269060
    Abstract: A photomask is provided, with which the roundness of a corner portion of a resist mask can be reduced in a photolithography step. Further, a method for manufacturing a semiconductor device with less variation is provided. A photomask includes an auxiliary pattern at a corner portion of a light-blocking portion, and (k+1) sides (k is a natural number of 3 or more) form k obtuse angles in the auxiliary pattern. Alternatively, a photomask includes an auxiliary pattern at a corner portion of a light-blocking portion, and the auxiliary pattern includes a zigzag curve.
    Type: Application
    Filed: April 26, 2011
    Publication date: November 3, 2011
    Inventors: Hideaki Shishido, Yuto Yakubo, Hirotada Oishi
  • Publication number: 20110216876
    Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.
    Type: Application
    Filed: February 28, 2011
    Publication date: September 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Seiko Amano, Kouhei Toyotaka, Hiroyuki Miyake, Aya Miyazaki, Hideaki Shishido, Koji Kusunoki