Patents by Inventor Hidehiko Iwasaki

Hidehiko Iwasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6877110
    Abstract: RAID information and physical position information of hard disk units are managed by a disk controller in a mapped fashion. When the physical position of the hard disk units is changed, the information mapping is retried. Further, the positional information of the hard disk units accommodated in a disk array system under the administration of the disk controller, is calculated so as to form n-dimensional coordinate system information, and the resulting information is stored in each of the hard disk units. When the hard disk units are inserted into the disk array system, the n-dimensional coordinate system information is read from each hard disk unit. If it is detected that there is difference from the current coordinate system information, then information before removal and that after the insertion are compared with each other and a data link is reconstructed.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: April 5, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Katsuyoshi Suzuki, Kenichi Takamoto, Kenji Muraoka, Hidehiko Iwasaki
  • Publication number: 20040168033
    Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.
    Type: Application
    Filed: March 2, 2004
    Publication date: August 26, 2004
    Inventors: Akemi Sanada, Toshio Nakano, Hidehiko Iwasaki, Masahiko Sato, Kenji Muraoka, Kenichi Takamoto, Masaaki Kobayashi
  • Patent number: 6742090
    Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: May 25, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Akemi Sanada, Toshio Nakano, Hidehiko Iwasaki, Masahiko Sato, Kenji Muraoka, Kenichi Takamoto, Masaaki Kobayashi
  • Patent number: 6728844
    Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: April 27, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Akemi Sanada, Toshio Nakano, Hidehiko Iwasaki, Masahiko Sato, Kenji Muraoka, Kenichi Takamoto, Masaaki Kobayashi
  • Publication number: 20040037034
    Abstract: A disk array device comprises: a hard disk drive module including a disk for recording information thereon and having one side that has a length substantially equal to the diameter of the disk; a battery module; an operation module; a fan module having at least one cooling fan; a controller module having a controller; a power supply module provided for supplying power to the modules; a circuit board to which the above-mentioned modules are connected via electrical connectors; and a substantially box-shaped chassis in which the modules and the circuit board are housed. A front surface and a rear surface of the chassis are opened in a rectangular shape. A length of one side of the opened front surface of the chassis is substantially the same length as the one side of the hard disk drive module.
    Type: Application
    Filed: June 13, 2003
    Publication date: February 26, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Katsuyoshi Suzuki, Masahiko Sato, Kenichi Tateyama, Naoto Matsunami, Koichi Kimura, Hidehiko Iwasaki, Kenichi Takamoto, Kenji Muraoka, Takamasa Ishikawa, Nobuhiro Yokoyama, Kiyotaka Takahashi, Yoshinori Nagaiwa
  • Patent number: 6609180
    Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: August 19, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Akemi Sanada, Toshio Nakano, Hidehiko Iwasaki, Masahiko Sato, Kenji Muraoka, Kenichi Takamoto, Masaaki Kobayashi
  • Patent number: 6581128
    Abstract: A storage system to be connected to a large-scale computer includes a plurality of host adaptors connected to a host device, a plurality of storage device for storing data from the host device, a plurality of disk adaptors connected to the storage devices, a plurality of caches for temporarily storing data transferred between the host adaptors and the disk adaptors, and two buses connected to the host disk adaptors, and the caches. The buses transfer data among the host and disk adaptors and the caches.
    Type: Grant
    Filed: August 22, 2001
    Date of Patent: June 17, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Tatuya Ninomiya, Hidefumi Masuzaki, Hiroyuki Kurosawa, Naoya Takahashi, Yasuo Inoue, Hidehiko Iwasaki, Masayuki Hoshino, Soichi Isono
  • Patent number: 6578100
    Abstract: A storage system to be connected to a large-scale computer includes a plurality of first logical units connected to a host device, a plurality of second logical units connected to a storage device, a plurality of cache memories, and a common bus wired between these logical units and memories. The plurality of first logical units, the plurality of second logical units, and the plurality of cache memories are all made in the form of modules. The modules are detachably mounted to the common bus disposed on a back plane. The storage device can be made up of a plurality of small-size storage units arranged in an array. Thus, the storage system realizes its scalability. Since the plurality of first logical units, the plurality of second logical units, and the plurality of cache memories are duplexed and the common bus is made in the form of 2 channels, the storage system can perform degrade operation.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: June 10, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Tatuya Ninomiya, Hidefumi Masuzaki, Hiroyuki Kurosawa, Naoya Takahashi, Yasuo Inoue, Hidehiko Iwasaki, Masayuki Hoshino, Soichi Isono
  • Patent number: 6535964
    Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: March 18, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Akemi Sanada, Toshio Nakano, Hidehiko Iwasaki, Masahiko Sato, Kenji Muraoka, Kenichi Takamoto, Masaaki Kobayashi
  • Patent number: 6523096
    Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: February 18, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Akemi Sanada, Toshio Nakano, Hidehiko Iwasaki, Masahiko Sato, Kenji Muraoka, Kenichi Takamoto, Masaaki Kobayashi
  • Patent number: 6507896
    Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: January 14, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Akemi Sanada, Toshio Nakano, Hidehiko Iwasaki, Masahiko Sato, Kenji Muraoka, Kenichi Takamoto, Masaaki Kobayashi
  • Patent number: 6496318
    Abstract: A method and system which prevents starting-up problems in plural magnetic disk storage devices included in a disk array system during restart following halt of the magnetic disk storage devices after long term operation. The disk array system includes the plural magnetic disk storage devices, a microprocessor unit (MPU) which controls the magnetic disk storage devices, a control memory, a parity calculator, and cache memory. The control memory contains a operation time control table in which a tolerable continuous operation time Ti and a halt time Ts are stored. Each of the magnetic disk storage devices is intentionally stopped individually for the halt time Ts at time interval of the tolerable continuous operation time Ti.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: December 17, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Tsutomu Sukigara, Hidehiko Iwasaki, Takashi Takenaka, Mitsuhiko Oguchi, Yuichi Otani
  • Publication number: 20020184439
    Abstract: For providing a storage control unit to be connected to a fiber channel, in which a new storage control unit is added onto the fiber channel network during on-line operation and succeeds control information of a logical unit from the storage control unit which has been existing before, so as to be in charge of a process request issued to that logical unit from a host computer thereafter, wherein a control memory being able to memorize the control information is provided in each of the storage control units 30 and 40, which information is necessary when succeeding or taking over the logical unit and is represented by such as construction information of a magnetic disk drive within a disk drive unit 20 and construction information of the logical unit, so on. The contents of the control memory within the storage control unit 30 is copied into the control memory of the storage control unit 40 when the new storage control unit 40 is added onto the fiber channel network.
    Type: Application
    Filed: July 10, 2002
    Publication date: December 5, 2002
    Inventors: Naoki Hino, Toshiya Nakano, Tetsuya Kishimoto, Hidehiko Iwasaki, Kenji Muraoka, Kenichi Takamoto
  • Patent number: 6484245
    Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: November 19, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Akemi Sanada, Toshio Nakano, Hidehiko Iwasaki, Masahiko Sato, Kenji Muraoka, Kenichi Takamoto, Masaaki Kobayashi
  • Patent number: 6480934
    Abstract: For providing a storage control unit to be connected to a fiber channel, in which a new storage control unit is added onto the fiber channel network during on-line operation and succeeds control information of a logical unit from the storage control unit which has been existing before, so as to be in charge of a process request issued to that logical unit from a host computer thereafter, wherein a control memory being able to memorize the control information is provided in each of the storage control units 30 and 40, which information is necessary when succeeding or taking over the logical unit and is represented by such as construction information of a magnetic disk drive within a disk drive unit 20 and construction information of the logical unit, so on. The contents of the control memory within the storage control unit 30 is copied into the control memory of the storage control unit 40 when the new storage control unit 40 is added onto the fiber channel network.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: November 12, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Hino, Toshiya Nakano, Tetsuya Kishimoto, Hidehiko Iwasaki, Kenji Muraoka, Kenichi Takamoto
  • Publication number: 20020083285
    Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.
    Type: Application
    Filed: February 20, 2002
    Publication date: June 27, 2002
    Inventors: Akemi Sanada, Toshio Nakano, Hidehiko Iwasaki, Masahiko Sato, Kenji Muraoka, Kenichi Takamoto, Masaaki Kobayashi
  • Patent number: 6412078
    Abstract: In an external storage, an I/O process is continued without any intervention of a user or a host system at failure of a controller. When a failure occurs in a controller, a host system recognizes the failure of the controller. Before the failure is notified to the user and application to stop the job, the substitutive controller reads the SCSI-ID possessed by an SCSI port of the failed controller from a shared memory, registers the SCSI-ID of the SCSI port to the SCSI port associated with the substitutive controller, and erases by a port address resetting facility of the substitutive controller the SCSI-ID possessed by an SCSI port of the failed controller.
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: June 25, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Akira Murotani, Toshio Nakano, Hidehiko Iwasaki, Kenji Muraoka
  • Publication number: 20020010843
    Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.
    Type: Application
    Filed: August 21, 2001
    Publication date: January 24, 2002
    Inventors: Akemi Sanada, Toshio Nakano, Hidehiko Iwasaki, Masahiko Sato, Kenji Muraoka, Kenichi Takamoto, Masaaki Kobayashi
  • Publication number: 20010056527
    Abstract: A storage system to be connected to a large-scale computer includes a plurality of host adaptors connected to a host device, a plurality of storage device for storing data from the host device, a plurality of disk adaptors connected to the storage devices, a plurality of caches for temporarily storing data transferred between the host adaptors and the disk adaptors, and two buses connected to the host disk adaptors, and the caches. The buses transfer data among the host and disk adaptors and the caches.
    Type: Application
    Filed: August 22, 2001
    Publication date: December 27, 2001
    Inventors: Tatuya Ninomiya, Hidefumi Masuzaki, Hiroyuki Kurosawa, Naoya Takahashi, Yasuo Inoue, Hidehiko Iwasaki, Masayuki Hoshino, Soichi Isono
  • Publication number: 20010054136
    Abstract: A storage system to be connected to a large-scale computer includes a plurality of host adaptors connected to a host device, a plurality of storage device for storing data from the host device, a plurality of disk adaptors connected to the storage devices, a plurality of caches for temporarily storing data transferred between the host adaptors and the disk adaptors, and two buses connected to the host disk adaptors, and the caches. The buses transfer data among the host and disk adaptors and the caches.
    Type: Application
    Filed: August 22, 2001
    Publication date: December 20, 2001
    Inventors: Tatuya Ninomiya, Hidefumi Masuzaki, Hiroyuki Kurosawa, Naoya Takahashi, Yasuo Inoue, Hidehiko Iwasaki, Masayuki Hoshino, Soichi Isono