Patents by Inventor Hidehiro Toyoda
Hidehiro Toyoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9521092Abstract: A transport system comprises 2 apparatuses. The first transport apparatus notifies, for each of first physical ports, to the second transport apparatus, a valid first lane count and identification information of the first physical port. The second transport apparatus is configured to: obtain, for each of second physical ports, a valid second lane count and identification information of the second physical port; associate, based on the valid second lane count and the identification information of the second physical port, and the valid first lane count and the identification information of the first physical port, the identification information of the first and second physical port; and transmit, when data including identification information of one of the first physical ports is transmitted, the data from the second physical port that is identified by the identification information associated with the identification information of the one of the first physical ports.Type: GrantFiled: September 5, 2014Date of Patent: December 13, 2016Assignee: Hitachi, Ltd.Inventors: Masashi Kono, Hidehiro Toyoda, Satoshi Tsutsumi
-
Patent number: 9521095Abstract: It is provided a transport apparatus including: a port information management unit for obtaining port information which includes a type first interfaces, a transport rate of first interfaces, and a physical lane count from the first interfaces into the transport apparatus, and for determining, based on the obtained port information, a virtual lane count into which the physical lanes from the first interfaces are converted; virtual lane creating units for setting as many virtual lanes as the determined virtual lane count; a lane information creating unit for creating, based on the port information, lane information which associates the first interfaces, the physical lane count, and identification information of virtual lanes in association with the physical lanes; and a multiplexing unit for multiplexing data that is transported along the virtual lanes, and for inserting the lane information in an invalid data field which is generated when the data is multiplexed.Type: GrantFiled: March 6, 2015Date of Patent: December 13, 2016Assignee: Hitachi, Ltd.Inventors: Masashi Kono, Satoshi Tsutsumi, Hidehiro Toyoda
-
Patent number: 9225424Abstract: In a PON system in which plural kinds of modulation schemes coexist, when uplink burst signals from respective ONUs are received, the receiving efficiency degrades as the number of the times of switching of the modulation scheme increases. In an optical access (PON) system supporting plural kinds of modulation schemes, an OLT allocates bandwidths for uplink signals, i.e., transmission timings each including a transmission start time and a transmission duration, to ONUs, respectively, such that the bandwidths allocated to plural ONUs for the same modulation scheme are as successive as possible. Based on the transmission timings allocated to the respective ONUs, the OLT switches the modulation scheme of a modulation-scheme variable burst-mode optical transmitter/receiver by control of a modulation scheme controller.Type: GrantFiled: October 29, 2013Date of Patent: December 29, 2015Assignee: Hitachi, Ltd.Inventors: Toshiyuki Odaka, Jun Sugawa, Hidehiro Toyoda
-
Patent number: 9160646Abstract: A transmitter of a data transmission system using n transmission lanes generates an error code such as an error detection code or an error correction code from transmitted data on x transmission lanes input to an error detection/correction code generating unit, and transmits the same to a lane number switching controlling unit. The lane number switching controlling unit distributes the transmitted data and the error code to at least some of the n transmission lanes as data strings based on lane information indicating a normal lane, a failure lane, or a lane with a sign of a failure received from a receiver. Further, markers including the lane information indicating a normal or failure lane and information to detect a failure of the n transmission lanes are generated and inserted into data strings transmitted on the n transmission lanes, so that communications are performed with the receiver.Type: GrantFiled: April 16, 2013Date of Patent: October 13, 2015Assignee: Hitachi, Ltd.Inventors: Masashi Kono, Hidehiro Toyoda
-
Patent number: 9154220Abstract: A highly reliable optical switching device and optical switching method ensure restoration of the failure in the large-capacity high density wiring of the multicore fiber with the general number of cores (7 cores, 19 cores and the like). An optical transmission system which transmits a supervisory control signal concerning a transmission path switching to one or more cores of a single or multiple multicore fibers, an active signal to one or more cores, and a standby signal to one or more cores includes optical switching devices connected to respective ends of the optical transmission system. Upon detection of the transmission failure of the active signal based on the signal transmission condition and information from the supervisory control signal, it is switched to the standby signal. The supervisory control signal is transmitted to the center core of the multicore fiber.Type: GrantFiled: February 20, 2014Date of Patent: October 6, 2015Assignee: HITACHI, LTD.Inventors: Toshiki Sugawara, Hidehiro Toyoda, Kenichi Tanaka
-
Publication number: 20150281129Abstract: It is provided a transport apparatus including: a port information management unit for obtaining port information which includes a type first interfaces, a transport rate of first interfaces, and a physical lane count from the first interfaces into the transport apparatus, and for determining, based on the obtained port information, a virtual lane count into which the physical lanes from the first interfaces are converted; virtual lane creating units for setting as many virtual lanes as the determined virtual lane count; a lane information creating unit for creating, based on the port information, lane information which associates the first interfaces, the physical lane count, and identification information of virtual lanes in association with the physical lanes; and a multiplexing unit for multiplexing data that is transported along the virtual lanes, and for inserting the lane information in an invalid data field which is generated when the data is multiplexed.Type: ApplicationFiled: March 6, 2015Publication date: October 1, 2015Inventors: Masashi Kono, Satoshi Tsutsumi, Hidehiro Toyoda
-
Patent number: 9143420Abstract: A receiver includes a data unit decomposer for receiving data units transmitted via a transmission channel and extracting user data including invalid data and valid data by removing management data from the received data units, and a plurality of rate estimators for receiving data forwarded by the data unit decomposer and outputting the data to different output interfaces. Each rate estimator selects valid data from the user data forwarded by the data unit decomposer, inputs the selected valid data to a FIFO unit, controls read frequency of the FIFO unit based on an amount of remaining data in the FIFO unit, and estimates a transmission data rate of an associated input interface in the transmitter based on at least one of a write cycle in writing the valid data to the FIFO unit and the amount of remaining data in the FIFO unit.Type: GrantFiled: December 13, 2013Date of Patent: September 22, 2015Assignee: Hitachi, Ltd.Inventors: Masashi Kono, Hidehiro Toyoda
-
Publication number: 20150085877Abstract: A transport system comprises 2 apparatuses. The first transport apparatus notifies, for each of first physical ports, to the second transport apparatus, a valid first lane count and identification information of the first physical port. The second transport apparatus is configured to: obtain, for each of second physical ports, a valid second lane count and identification information of the second physical port; associate, based on the valid second lane count and the identification information of the second physical port, and the valid first lane count and the identification information of the first physical port, the identification information of the first and second physical port; and transmit, when data including identification information of one of the first physical ports is transmitted, the data from the second physical port that is identified by the identification information associated with the identification information of the one of the first physical ports.Type: ApplicationFiled: September 5, 2014Publication date: March 26, 2015Inventors: Masashi KONO, Hidehiro TOYODA, Satoshi TSUTSUMI
-
Patent number: 8965206Abstract: An aspect of this invention is a network system including subscriber apparatuses and a station-side apparatus for communicating with the subscriber apparatuses. The station-side apparatus communicates with the subscriber apparatuses using wavelengths. The station-side apparatus determines a wavelength to be used by each of at least one subscriber apparatus of the subscriber apparatuses based on effective transmission rates used by the subscriber apparatuses in communications with the station-side apparatus.Type: GrantFiled: March 4, 2013Date of Patent: February 24, 2015Assignee: Hitachi, Ltd.Inventors: Jun Sugawa, Toshiyuki Odaka, Hidehiro Toyoda
-
Patent number: 8855148Abstract: Digital signals having respective pieces of frequency information different from each other are bundled, and transmitted at high speed. On receiving side, digital signals retaining the respective pieces of frequency information are recovered and separated. Transmitter apparatus divides pieces of transmission data that have the different pieces of frequency information and correspond to respective input channels into data blocks having a fixed length, as valid data, and subsequently multiplexes the data blocks corresponding to the respective input channels and outputs the multiplexed data to a transmission path. A receiver apparatus divides data string received into data flows and subsequently restores the transmission data, from the data blocks consecutive in each data flow and stores the restored data, and outputs transmission data corresponding to the respective data flows in synchronization with clocks generated for these data flows.Type: GrantFiled: August 15, 2012Date of Patent: October 7, 2014Assignee: Hitachi, Ltd.Inventors: Hidehiro Toyoda, Masashi Kono
-
Publication number: 20140294388Abstract: In a PON system in which plural kinds of modulation schemes coexist, when uplink burst signals from respective ONUs are received, the receiving efficiency degrades as the number of the times of switching of the modulation scheme increases. In an optical access (PON) system supporting plural kinds of modulation schemes, an OLT allocates bandwidths for uplink signals, i.e., transmission timings each including a transmission start time and a transmission duration, to ONUs, respectively, such that the bandwidths allocated to plural ONUs for the same modulation scheme are as successive as possible. Based on the transmission timings allocated to the respective ONUs, the OLT switches the modulation scheme of a modulation-scheme variable burst-mode optical transmitter/receiver by control of a modulation scheme controller.Type: ApplicationFiled: October 29, 2013Publication date: October 2, 2014Applicant: Hitachi, Ltd.Inventors: Toshiyuki ODAKA, Jun SUGAWA, Hidehiro TOYODA
-
Publication number: 20140293826Abstract: A receiver includes a data unit decomposer for receiving data units transmitted via a transmission channel and extracting user data including invalid data and valid data by removing management data from the received data units, and a plurality of rate estimators for receiving data forwarded by the data unit decomposer and outputting the data to different output interfaces. Each rate estimator selects valid data from the user data forwarded by the data unit decomposer, inputs the selected valid data to a FIFO unit, controls read frequency of the FIFO unit based on an amount of remaining data in the FIFO unit, and estimates a transmission data rate of an associated input interface in the transmitter based on at least one of a write cycle in writing the valid data to the FIFO unit and the amount of remaining data in the FIFO unit.Type: ApplicationFiled: December 13, 2013Publication date: October 2, 2014Applicant: Hitachi, Ltd.Inventors: Masashi KONO, Hidehiro TOYODA
-
Publication number: 20140241712Abstract: A highly reliable optical switching device and optical switching method ensure restoration of the failure in the large-capacity high density wiring of the multicore fiber with the general number of cores (7 cores, 19 cores and the like). An optical transmission system which transmits a supervisory control signal concerning a transmission path switching to one or more cores of a single or multiple multicore fibers, an active signal to one or more cores, and a standby signal to one or more cores includes optical switching devices connected to respective ends of the optical transmission system. Upon detection of the transmission failure of the active signal based on the signal transmission condition and information from the supervisory control signal, it is switched to the standby signal. The supervisory control signal is transmitted to the center core of the multicore fiber.Type: ApplicationFiled: February 20, 2014Publication date: August 28, 2014Applicant: Hitachi, Ltd.Inventors: Toshiki SUGAWARA, Hidehiro TOYODA, Kenichi TANAKA
-
Publication number: 20140161456Abstract: An aspect of this invention is a network system including subscriber apparatuses and a station-side apparatus for communicating with the subscriber apparatuses. The station-side apparatus communicates with the subscriber apparatuses using wavelengths. The station-side apparatus determines a wavelength to be used by each of at least one subscriber apparatus of the subscriber apparatuses based on effective transmission rates used by the subscriber apparatuses in communications with the station-side apparatus.Type: ApplicationFiled: March 4, 2013Publication date: June 12, 2014Applicant: Hitachi, Ltd.Inventors: Jun SUGAWA, Toshiyuki ODAKA, Hidehiro TOYODA
-
Publication number: 20130283108Abstract: A transmitter of a data transmission system using n transmission lanes generates an error code such as an error detection code or an error correction code from transmitted data on x transmission lanes input to an error detection/correction code generating unit, and transmits the same to a lane number switching controlling unit. The lane number switching controlling unit distributes the transmitted data and the error code to at least some of the n transmission lanes as data strings based on lane information indicating a normal lane, a failure lane, or a lane with a sign of a failure received from a receiver. Further, markers including the lane information indicating a normal or failure lane and information to detect a failure of the n transmission lanes are generated and inserted into data strings transmitted on the n transmission lanes, so that communications are performed with the receiver.Type: ApplicationFiled: April 16, 2013Publication date: October 24, 2013Applicant: HITACHI, LTD.Inventors: Masashi KONO, Hidehiro TOYODA
-
Patent number: 8498204Abstract: It is provided a data transmission system comprising a transmitter, a repeater and a receiver. The transmitter and the repeater are coupled through a first transmission path and the receiver and the repeater are coupled through a second transmission path. The transmitter, the repeater and the receiver have virtual lanes. The transmitter demultiplexes the transmission data into as many data streams as a number of useable virtual lanes based on useable lane information. The repeater monitors failures of the transmission lanes of the first transmission path and the virtual lanes. The receiver monitors failures of the transmission lanes of the second transmission path and the virtual lanes, selects the useable virtual lanes, sends to the transmitter the useable lane information, corrects a wrong order of the received data streams and a shift of reception point in the virtual lanes, and restores the demultiplexed data streams into the transmission data.Type: GrantFiled: March 3, 2010Date of Patent: July 30, 2013Assignee: Hitachi, Ltd.Inventors: Hidehiro Toyoda, Shinji Murai
-
Publication number: 20130064115Abstract: Digital signals having respective pieces of frequency information different from each other are bundled, and transmitted at high speed. On receiving side, digital signals retaining the respective pieces of frequency information are recovered and separated. Transmitter apparatus divides pieces of transmission data that have the different pieces of frequency information and correspond to respective input channels into data blocks having a fixed length, as valid data, and subsequently multiplexes the data blocks corresponding to the respective input channels and outputs the multiplexed data to a transmission path. A receiver apparatus divides data string received into data flows and subsequently restores the transmission data, from the data blocks consecutive in each data flow and stores the restored data, and outputs transmission data corresponding to the respective data flows in synchronization with clocks generated for these data flows.Type: ApplicationFiled: August 15, 2012Publication date: March 14, 2013Inventors: HIDEHIRO TOYODA, Masashi Kono
-
Patent number: 8281207Abstract: A transmitter communicates with a receiver and an error corrector corrects bit errors generated during data transmission. The transmitter has a scrambler unit that scrambles data so that a running disparity of 0 and 1 in the input data is substantially zero. A bit-string converting unit 15 that adds bit data for ensuring a maximum run length of a serial bit string of the scrambled data and converts control information to bit data of a fixed value. A synchronization timing generating unit 16 divides the transmitted data by a constant interval and converts the transmission data to a data block. A bit-string converting unit extracts a fixed-value bit pattern of the control data from the bit string of the data block, converts the bit pattern to the control information, and discriminates the data and the control information. A descrambler unit reconverts the data-scrambled data to the data before scrambling.Type: GrantFiled: November 17, 2006Date of Patent: October 2, 2012Assignee: Alaxala Networks CorporationInventors: Hidehiro Toyoda, Takayuki Muranaka, Takeshi Matsumoto, Naohisa Koie
-
Patent number: 8090269Abstract: A data transmission system comprising a transmitter and a receiver. The transmitter comprises a phase encoder for partitioning consecutive bit data to be input in data in units of X bits; and converting a 2x value indicated by the data of X bits in unique association with an (N/2?1)Y value of a Y symbol, and for confining use of signal points, from among the signal points of N-ary phase, only to a signal point P1 (at a phase angle 0) and N/2?2 signal points P(2n+2) (where 1?n<N/2?2). The receiver comprises a phase decoder for notifying an error detection when a signal point other than a signal point that are permitted to be used is received, and performing an error correction by changing the signal point to a signal point which has a smaller hamming distance.Type: GrantFiled: January 16, 2008Date of Patent: January 3, 2012Assignee: Hitachi, Ltd.Inventors: Hidehiro Toyoda, Kenro Sekine, Shinya Sasaki, Shinji Nishimura
-
Patent number: 8040776Abstract: In pulse width control equalization, attention is paid to the existence of the symmetry of anteroposterior signals and thereby the size of a table in which the adjustment amount of an edge position is stored is reduced to the power of one-half. Pattern jitters caused by inter-symbol interference are suppressed. The pulse time span of each symbol is adjusted to an optimum pulse width determined by a calculating formula or search in a table in response to a code sequence to be transmitted. In the configuration wherein a table is used, the table to store an edge position adjustment amount wherein the row of the exclusive OR of two symbols located at positions symmetrical to each other before and after a center symbol now ready to be sent in the code sequence is used as a search key is made.Type: GrantFiled: July 25, 2007Date of Patent: October 18, 2011Assignee: Hitachi, Ltd.Inventors: Koji Fukuda, Hidehiro Toyoda, Hiroki Yamashita