Abstract: An active matrix type display panel is a hold type display panel which has a plurality of pixels arranged in a matrix form, and holds and displays an electrical signal pixel by pixel for a predetermined time. A frame rate conversion circuit converts a video signal having a first vertical frequency (60 Hz) into a video signal having a second vertical frequency (120 Hz) which is m/n-fold (wherein m is an integer of 2 or more, n is an integer of 1 or more, and conditions of m>n are satisfied) of the first vertical frequency. A time base emphasizing circuit subjects an output from the frame rate conversion circuit to time base emphasis. A drive circuit displays the video signal having the second vertical frequency in a display panel.

Abstract: A Gaussian filter 2 having a first cutoff frequency extracts a low frequency component signal of a video signal. A subtracter 3 extracts a high frequency component signal by subtracting the low frequency component signal from the video signal. A low pass filter 5 having a second cutoff frequency higher than the first cutoff frequency extracts a lower high frequency component signal, which is a low-frequency-side signal of the high frequency component signal. A multiplier 6 generates a corrected component signal by multiplying the lower high frequency component signal by a predetermined gain G1. An adder 7 adds the corrected component signal to the video signal.

Abstract: A method of driving an image display apparatus having a display section having a plurality of pixels arranged in a matrix. Each of a plurality of frames of a digital video signal are converted into a plurality of subframes having different display periods each shorter than a one-frame period, in order to display the video signal at a plurality of gradation levels. The pixels in the display section are driven by turning on or off the subframes according to a first subframe pattern to give each of the gradation levels to pixels in odd columns and odd rows and pixels in even columns and even rows among the pixels in the display section and a second subframe pattern to give each of the gradation levels to pixels in odd columns and even rows and pixels in even columns and odd rows among the pixels in the display section.

Abstract: An image memory 10 delays an input video signal by one frame period and a motion vector detection circuit 20 detects a motion vector between frames of video signals. A pull-down determination circuit 22 determines whether or not a video signal is pull-down converted and a motion vector conversion circuit 21 generates control signals to control delay amounts in delay circuits 30 to 32 based on the motion vector and the determination result of pull-down conversion. The delay circuit compensates for the motion of a video signal based on the control signal to generate a motion-compensated video signal and time axis emphasis circuits 40, 41 emphasize the motion-compensated video signal in a time axis direction by another video signal to generate an emphasized video signal. A time series conversion memory 50 converts the frame rate of the emphasized video signal into a higher frame rate and outputs the emphasized video signal.

Abstract: A repetitive object detecting device includes data-retention and difference-calculation units, an adding unit, a horizontal direction accumulating unit and a small and large comparing unit. Each data-retention and difference-calculation unit carries out, with respect to a plurality of lines, a process for setting as reference pixel data pixel data located at an end of a plurality of pieces of pixel data, and calculating a difference between the reference pixel data and pixel data separated from the reference pixel data by k pixels (2?k?maximum number) to obtain difference data by each separated pixel number k. The adding unit adds the difference data in the plurality of lines by each separated pixel number k. The horizontal direction accumulating unit accumulates the added data by each separated pixel number k in a horizontal direction.

Abstract: An image display device includes a gain calculator, a multiplier and an overdrive unit. The gain calculator calculates a ratio “Gmax0/Gmax1” as gain, with respect to each segmented region of liquid crystal panel. The symbol “Gmax1” represents a maximum gradation in one frame period of an image signal to be supplied to each segmented region. The symbol “Gmax0” represents a maximum gradation to be determined depending on the number of bits in the image signal. The multiplier multiplies an image signal subjected to frame frequency conversion in a frame frequency conversion unit by the gain to generate an image signal subjected to the area control processing, with respect to each segmented region. The overdrive unit emphasizes the image signal subjected to the area control processing, using an image signal generated by delaying the image signal subjected to the area control processing for one frame period.

Abstract: A motion vector detection circuit detects a motion vector from a video signal and a one-frame delayed video signal. An interpolation video signal generation circuit uses this detected motion vector to generate an interpolation video signal which is interpolated between frames. Further, two time base emphasizing circuits respectively use a video signal of a preceding frame to perform time base emphasis with respect to the video signal and the generated interpolation video signal. The video signal and the interpolation video signal subjected to time base emphasis are written in a time-series conversion memory. Furthermore, alternately reading the interpolation video signal and the video signal in the mentioned order with a frequency which is double a write frequency can obtain an output video signal having a doubled frame frequency.

Abstract: A video signal is processed using dither coefficients. Dither coefficients pattern signals are generated. Each pattern signal carries positive and negative dither coefficients arranged in an (n×m) matrix where “n” and “m” being positive integers larger than zero, the sum total of the coefficients being zero. One of the pattern signal is selected for each predetermined unit of picture carried by the video signal. Or, it is selected according to locations of dither coefficients on pixels arranged on a display panel. Dither coefficients of the selected pattern signal are added to an input video signal, thus outputting a video signal to be supplied to the display panel. Instead of the dither coefficients pattern signals, dither pattern signals can be generated, each carrying positional data indicating locations of dither coefficients on the pixels on the display panel.

Abstract: An apparatus for displaying video signals includes an input source to receive video signals having different frame frequencies and provide an input video signal from among the received video signals, a frame frequency detector to detect, as a first frame frequency, the frame frequency of the input video signal, a determiner to determine a second frame frequency according to the first frame frequency and provide a frame frequency conversion rate, the second frame frequency being higher than the first frame frequency, an interpolation frame generator to generate interpolation frames according to the frame frequency conversion rate, and a frame frequency converter to convert the input video signal into a video signal having the second frame frequency by interpolating the generated interpolation frames between original frames of the input video signal.

Abstract: An active matrix type display panel is a hold type display panel which has a plurality of pixels arranged in a matrix form, and holds and displays an electrical signal pixel by pixel for a predetermined time. A frame rate conversion circuit converts a video signal having a first vertical frequency (60 Hz) into a video signal having a second vertical frequency (120 Hz) which is m/n-fold (wherein m is an integer of 2 or more, n is an integer of 1 or more, and conditions of m>n are satisfied) of the first vertical frequency. A time base emphasizing circuit subjects an output from the frame rate conversion circuit to time base emphasis. A drive circuit displays the video signal having the second vertical frequency in a display panel.

Abstract: The present invention provides a technique of a method for driving an image displaying apparatus to suppress animated picture pseudo-contour, flicker disturbance and pseudo-contour disturbance by making weighting of light emission within a field is made equal to or almost equal to each other at all gradations. According to this technique, when an image signal of multiple gradation is expressed by dividing one field duration into a plurality of subfields with different relative ratios of luminance, a given number of subfields among a plurality of subfields are divided into “2n” subfields (SF1a to SF8b) wherein “n” represents an arbitrary integral number. Then, “2n” subfield groups (SF1a to SF8a, SF1b to SF8b) are formed so that one group divided into “2n” subfield belong to the groups different from each other. Subfield groups (A and B) are symmetrically arranged with respect to the center of one field duration, and the subfields (SFna, SFnb) divided into “2n” subfields are symmetrically arranged.

Abstract: An active matrix type display panel is a hold type display panel which has a plurality of pixels arranged in a matrix form, and holds and displays an electrical signal pixel by pixel for a predetermined time. A frame rate conversion circuit converts a video signal having a first vertical frequency (60 Hz) into a video signal having a second vertical frequency (120 Hz) which is m/n-fold (wherein m is an integer of 2 or more, n is an integer of 1 or more, and conditions of m>n are satisfied) of the first vertical frequency. A time base emphasizing circuit subjects an output from the frame rate conversion circuit to time base emphasis. A drive circuit displays the video signal having the second vertical frequency in a display panel.

Abstract: A method of driving an image display apparatus having a display section having a plurality of pixels arranged in a matrix. Each of a plurality of frames of a digital video signal are converted into a plurality of subframes having different display periods each shorter than a one-frame period, in order to display the video signal at a plurality of gradation levels. The pixels in the display section are driven by turning on or off the subframes according to a first subframe pattern to give each of the gradation levels to pixels in odd columns and odd rows and pixels in even columns and even rows among the pixels in the display section and a second subframe pattern to give each of the gradation levels to pixels in odd columns and even rows and pixels in even columns and odd rows among the pixels in the display section.

Abstract: A motion vector detection circuit detects a motion vector from a video signal and a one-frame delayed video signal. An interpolation video signal generation circuit uses this detected motion vector to generate an interpolation video signal which is interpolated between frames. Further, two time base emphasizing circuits respectively use a video signal of a preceding frame to perform time base emphasis with respect to the video signal and the generated interpolation video signal. The video signal and the interpolation video signal subjected to time base emphasis are written in a time-series conversion memory. Furthermore, alternately reading the interpolation video signal and the video signal in the mentioned order with a frequency which is double a write frequency can obtain an output video signal having a doubled frame frequency.

Abstract: A video signal is processed using dither coefficients. Dither coefficients pattern signals are generated. Each pattern signal carries positive and negative dither coefficients arranged in an (n×m) matrix where “n” and “m” being positive integers larger than zero, the sum total of the coefficients being zero. One of the pattern signal is selected for each predetermined unit of picture carried by the video signal. Or, it is selected according to locations of dither coefficients on pixels arranged on a display panel. Dither coefficients of the selected pattern signal are added to an input video signal, thus outputting a video signal to be supplied to the display panel. Instead of the dither coefficients pattern signals, dither pattern signals can be generated, each carrying positional data indicating locations of dither coefficients on the pixels on the display panel.

Abstract: A video signal is processed using dither coefficients. Dither coefficients pattern signals are generated. Each pattern signal carries positive and negative dither coefficients arranged in an (n×m) matrix where “n” and “m” being positive integers larger than zero, the sum total of the coefficients being zero. One of the pattern signal is selected for each predetermined unit of picture carried by the video signal. Or, it is selected according to locations of dither coefficients on pixels arranged on a display panel. Dither coefficients of the selected pattern signal are added to an input video signal, thus outputting a video signal to be supplied to the display panel. Instead of the dither coefficients pattern signals, dither pattern signals can be generated, each carrying positional data indicating locations of dither coefficients on the pixels on the display panel.

Abstract: A video signal processing apparatus processes an input video signal for displaying an image based on the video signal. Detected is a gradation level of the input video signal. A color saturation level of the input video signal is depressed in a predetermined color saturation level range only when the detected gradation level is located in a predetermined gradation level range. A first input video signal having a first gradation level (or number of bits) is converted into a second video signal having a second gradation level (or number of bits) that is lower (or smaller) than first gradation level (or number of bits), for displaying an image based on the input video signal. Error data is generated in response to a data portion of the first input video signal. The data portion corresponds to a difference between the first and the second gradation levels (or number of bits).

Abstract: The present invention provides a technique of a method for driving an image displaying apparatus to suppress animated picture pseudo-contour, flicker disturbance and pseudo-contour disturbance by making weighting of light emission within a field is made equal to or almost equal to each other at all gradations. According to this technique, when an image signal of multiple gradation is expressed by dividing one field duration to a plurality of subfields with different relative ratios of luminance, a given number of subfields among a plurality of subfields are divided to “2n” subfields (SF1a to SF8b) wherein “n” represents an arbitrary integral number. Then, “2n” subfield groups (SF1a to SF8a, SF1b to SF8b) are formed so that one group divided to “2n” subfield belong to the groups different from each other. Subfield groups (A and B) are symmetrically arranged with respect to the center of one field duration, and the subfields (SFna, SFnb) divided to “2n” subfields are symmetrically arranged.

Abstract: An active matrix type display panel is a hold type display panel which has a plurality of pixels arranged in a matrix form, and holds and displays an electrical signal pixel by pixel for a predetermined time. A frame rate conversion circuit converts a video signal having a first vertical frequency (60 Hz) into a video signal having a second vertical frequency (120 Hz) which is m/n-fold (wherein m is an integer of 2 or more, n is an integer of 1 or more, and conditions of m>n are satisfied) of the first vertical frequency. A time base emphasizing circuit subjects an output from the frame rate conversion circuit to time base emphasis. A drive circuit displays the video signal having the second vertical frequency in a display panel.

Abstract: A data conversion section of a transmission side allocates 3-channel video data of two pixels constituted of three signals of a 4:4:4 format to data of a 4:2:2 format of three pixels to convert the video data into 2-channel video data. An encoder maps the converted video data in an effective image area defined by the 4:2:2 format, and transmits video data obtained by the mapping through a transmission line. A decoder of a reception side takes out the 2-channel video data from the transmitted video data. A data conversion section allocates the video data of three pixels to data of the 4:4:4 format of two pixels to restore the 3-channel video data constituted of the three signals of the 4:4:4 format.