Patents by Inventor Hideki Matsubara

Hideki Matsubara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12704617
    Abstract: The present disclosure provides a drive device. The drive device includes a burst generating circuit and a drive circuit. The burst generating circuit is configured to generate a burst signal. The drive circuit is configured to generate a pulse drive signal based on the burst signal and supply the pulse drive signal to a target-driving element. The pulse drive signal includes a first signal having a self-wave identification frequency and a second signal having a frequency other than the self-wave identification frequency.
    Type: Grant
    Filed: November 13, 2023
    Date of Patent: August 11, 2026
    Assignee: Rohm Co., Ltd.
    Inventor: Hideki Matsubara
  • Patent number: 12697641
    Abstract: A semiconductor device includes a driving circuit arranged to be capable of supplying a drive signal in an ultrasonic band to a piezoelectric element, a damping circuit having a resistance load and an inductive load, and a control circuit arranged to be capable of controlling the driving circuit and performing a reverberation reduction operation after stopping the supply of the drive signal to the piezoelectric element. In the reverberation reduction operation, the control circuit controls the driving circuit to supply the piezoelectric element with a damping signal having a phase different from that of the drive signal, and then enables the damping circuit to connect to the piezoelectric element.
    Type: Grant
    Filed: September 18, 2023
    Date of Patent: August 4, 2026
    Assignee: Rohm Co., Ltd.
    Inventors: Hideki Matsubara, Yoshiaki Kono, Ken Hashimoto
  • Patent number: 12689609
    Abstract: A communication system is configured to be capable of executing an address assignment process including: a first process for detecting presence/absence of an identification current input by means of an identification current detection unit when a constant current supply has generated an identification current output with a switch and a second transistor in an off state; and a second process for repeatedly executing the first process while, with respect to a slave among the slaves that has had the identification current input detected therein, stopping generation of the identification current output thereafter, and assigning an address to a single slave among the slaves that has not had the identification current input detected therein, and is also configured to be capable of executing the address assignment process while excluding a slave among the slaves that has had the address assigned thereto.
    Type: Grant
    Filed: January 22, 2024
    Date of Patent: July 21, 2026
    Assignee: Rohm Co., Ltd.
    Inventor: Hideki Matsubara
  • Publication number: 20240329240
    Abstract: The present disclosure provides a signal processing device. The signal processing device includes: a transmission signal generation unit, configured to generate a transmission signal for a transmitted wave of sound wave; a reception signal output unit, configured to output a received signal based on a received wave of sound wave; and a reflected wave detection unit. The reflected wave detection unit is configured to detect a first reflected wave of the transmitted wave that may be included in the received wave based on a first timing when an envelope detection signal, which is a signal obtained by envelope detection of an absolute value of the received signal during a reverberation period in which a reverberation of the transmitted wave remains, is lower than a first threshold value.
    Type: Application
    Filed: March 26, 2024
    Publication date: October 3, 2024
    Inventors: SHOGO TAKAMURA, HIDEKI MATSUBARA, TAKAHIRO TSUBOI
  • Publication number: 20240205187
    Abstract: A communication system is configured to be capable of executing an address assignment process including: a first process for detecting presence/absence of an identification current input by means of an identification current detection unit when a constant current supply has generated an identification current output with a switch and a second transistor in an off state; and a second process for repeatedly executing the first process while, with respect to a slave among the slaves that has had the identification current input detected therein, stopping generation of the identification current output thereafter, and assigning an address to a single slave among the slaves that has not had the identification current input detected therein, and is also configured to be capable of executing the address assignment process while excluding a slave among the slaves that has had the address assigned thereto.
    Type: Application
    Filed: January 22, 2024
    Publication date: June 20, 2024
    Inventor: Hideki MATSUBARA
  • Publication number: 20240159886
    Abstract: The present disclosure provides a drive device. The drive device includes a burst generating circuit and a drive circuit. The burst generating circuit is configured to generate a burst signal. The drive circuit is configured to generate a pulse drive signal based on the burst signal and supply the pulse drive signal to a target-driving element. The pulse drive signal includes a first signal having a self-wave identification frequency and a second signal having a frequency other than the self-wave identification frequency.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventor: HIDEKI MATSUBARA
  • Publication number: 20240001404
    Abstract: A semiconductor device includes a driving circuit arranged to be capable of supplying a drive signal in an ultrasonic band to a piezoelectric element, a damping circuit having a resistance load and an inductive load, and a control circuit arranged to be capable of controlling the driving circuit and performing a reverberation reduction operation after stopping the supply of the drive signal to the piezoelectric element. In the reverberation reduction operation, the control circuit controls the driving circuit to supply the piezoelectric element with a damping signal having a phase different from that of the drive signal, and then enables the damping circuit to connect to the piezoelectric element.
    Type: Application
    Filed: September 18, 2023
    Publication date: January 4, 2024
    Inventors: Hideki MATSUBARA, Yoshiaki KONO, Ken HASHIMOTO
  • Publication number: 20240004048
    Abstract: In a semiconductor device, a drive circuit is used to supply a drive signal in an ultrasonic band to a piezoelectric element, and thereafter through a brake operation, a damping signal having a phase different from the phase of the drive signal is supplied to the piezoelectric element. The drive circuit includes a full bridge circuit provided between a first line and a second line. In the brake operation, two switches on the side of the first line in the full bridge circuit are turned on or two switches on the side of the second line in the full bridge circuit are turned on.
    Type: Application
    Filed: September 18, 2023
    Publication date: January 4, 2024
    Inventor: Hideki MATSUBARA
  • Patent number: 10923297
    Abstract: A switch monitoring device includes a constant current source which supplies a current to an input line or extracts a current from the input line, a switch which connects the input line to a supply voltage or to a ground voltage, a comparator which compares a voltage on the input line with a reference voltage, a logic which receives an output voltage of the comparator, a base current source which generates a base current, and a bias current circuit which generates a bias current by adjusting the base current as a base in accordance with a current control signal from the logic and the output voltage of the comparator. The constant current source generates a current by adjusting the bias current as a base.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: February 16, 2021
    Assignee: Rohm Co., Ltd.
    Inventors: Hiroyoshi Ishida, Hideki Matsubara, Hiroki Yamakami
  • Publication number: 20190066938
    Abstract: A switch monitoring device includes a constant current source which supplies a current to an input line or extracts a current from the input line, a switch which connects the input line to a supply voltage or to a ground voltage, a comparator which compares a voltage on the input line with a reference voltage, a logic which receives an output voltage of the comparator, a base current source which generates a base current, and a bias current circuit which generates a bias current by adjusting the base current as a base in accordance with a current control signal from the logic and the output voltage of the comparator. The constant current source generates a current by adjusting the bias current as a base.
    Type: Application
    Filed: August 23, 2018
    Publication date: February 28, 2019
    Inventors: Hiroyoshi Ishida, Hideki Matsubara, Hiroki Yamakami
  • Patent number: 9543084
    Abstract: A switch state detection circuit according to the present invention comprises: a plurality of switch connection portions to each of which a switch is connected, a connection line to which any one of the switch connection portions is connected in a switchable manner, a detection portion that detects a state of the switch connected to the connection line based on a state of the connection line, and a connection control portion that switches successively each of the switch connection portions and connects it to the connection line, wherein the state of each switch is detected.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: January 10, 2017
    Assignee: Rohm Co., Ltd.
    Inventors: Tomoki Yamamoto, Hideki Matsubara, Satoru Kominami
  • Patent number: 9461460
    Abstract: A circuit control device for controlling power consumption of a plurality of circuit units includes a monitoring unit configured to monitor whether a detection temperature of each of the circuit units meets a predetermined overheat condition, and an overheat protection unit configured to execute an overheat protection operation when the overheat condition is met in any one of the circuit units, wherein the overheat protection operation is an operation to reduce power consumption of an overheat unit meeting the overheat condition, among the circuit units, and a neighbor unit disposed near the overheat unit.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: October 4, 2016
    Assignee: Rohm Co., Ltd.
    Inventors: Tomoki Yamamoto, Hideki Matsubara, Satoru Kominami
  • Publication number: 20150118830
    Abstract: The present method of manufacturing a GaN-based film includes the steps of preparing a composite substrate (10) including a support substrate (11) dissoluble in hydrofluoric acid and a single crystal film (13) arranged on a side of a main surface (11m) of the support substrate (11), a coefficient of thermal expansion in the main surface (11m) of the support substrate (11) being more than 0.8 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal, forming a GaN-based film (20) on a main surface (13m) of the single crystal film (13) arranged on the side of the main surface (11m) of the support substrate (11), and removing the support substrate (11) by dissolving the support substrate (11) in hydrofluoric acid. Thus, the method of manufacturing a GaN-based film capable of efficiently obtaining a GaN-based film having a large main surface area, less warpage, and good crystallinity, as well as a composite substrate used therefor are provided.
    Type: Application
    Filed: January 5, 2015
    Publication date: April 30, 2015
    Inventors: Issei SATOH, Yuki SEKI, Koji UEMATSU, Yoshiyuki YAMAMOTO, Hideki MATSUBARA, Shinsuke FUJIWARA, Masashi YOSHIMURA
  • Patent number: 8962365
    Abstract: The present method of manufacturing a GaN-based film includes the steps of preparing a composite substrate including a support substrate dissoluble in hydrofluoric acid and a single crystal film arranged on a side of a main surface of the support substrate, a coefficient of thermal expansion in the main surface of the support substrate being more than 0.8 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal, forming a GaN-based film on a main surface of the single crystal film arranged on the side of the main surface of the support substrate, and removing the support substrate by dissolving the support substrate in hydrofluoric acid. Thus, the method of manufacturing a GaN-based film capable of efficiently obtaining a GaN-based film having a large main surface area, less warpage, and good crystallinity, as well as a composite substrate used therefor are provided.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: February 24, 2015
    Assignee: Sumitomo Electric Industies, Ltd.
    Inventors: Issei Satoh, Yuki Seki, Koji Uematsu, Yoshiyuki Yamamoto, Hideki Matsubara, Shinsuke Fujiwara, Masashi Yoshimura
  • Publication number: 20140300208
    Abstract: A switch state detection circuit according to the present invention comprises: a plurality of switch connection portions to each of which a switch is connected, a connection line to which any one of the switch connection portions is connected in a switchable manner, a detection portion that detects a state of the switch connected to the connection line based on a state of the connection line, and a connection control portion that switches successively each of the switch connection portions and connects it to the connection line, wherein the state of each switch is detected.
    Type: Application
    Filed: April 8, 2014
    Publication date: October 9, 2014
    Applicant: Rohm Co., Ltd.
    Inventors: Tomoki Yamamoto, Hideki Matsubara, Satoru Kominami
  • Publication number: 20140293487
    Abstract: A circuit control device for controlling power consumption of a plurality of circuit units includes a monitoring unit configured to monitor whether a detection temperature of each of the circuit units meets a predetermined overheat condition, and an overheat protection unit configured to execute an overheat protection operation when the overheat condition is met in any one of the circuit units, wherein the overheat protection operation is an operation to reduce power consumption of an overheat unit meeting the overheat condition, among the circuit units, and a neighbor unit disposed near the overheat unit.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 2, 2014
    Applicant: Rohm Co., Ltd.
    Inventors: Tomoki YAMAMOTO, Hideki MATSUBARA, Satoru KOMINAMI
  • Patent number: 8697550
    Abstract: The present method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in a main surface is more than 0.8 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a side of the main surface of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage is provided.
    Type: Grant
    Filed: November 10, 2011
    Date of Patent: April 15, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Issei Satoh, Yuki Seki, Koji Uematsu, Yoshiyuki Yamamoto, Hideki Matsubara, Shinsuke Fujiwara, Masashi Yoshimura
  • Patent number: 8658517
    Abstract: The present method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in a main surface is more than 0.8 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a side of the main surface of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage is provided.
    Type: Grant
    Filed: November 10, 2011
    Date of Patent: February 25, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Issei Satoh, Yuki Seki, Koji Uematsu, Yoshiyuki Yamamoto, Hideki Matsubara, Shinsuke Fujiwara, Masashi Yoshimura
  • Patent number: 8633087
    Abstract: A method of manufacturing a GaN-based semiconductor device includes the steps of: preparing a composite substrate including: a support substrate having a thermal expansion coefficient at a ratio of not less than 0.8 and not more than 1.2 relative to a thermal expansion coefficient of GaN; and a GaN layer bonded to the support substrate, using an ion implantation separation method; growing at least one GaN-based semiconductor layer on the GaN layer of the composite substrate; and removing the support substrate of the composite substrate by dissolving the support substrate. Thus, the method of manufacturing a GaN-based semiconductor device is provided by which GaN-based semiconductor devices having excellent characteristics can be manufactured at a high yield ratio.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: January 21, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hideki Matsubara, Kuniaki Ishihara
  • Patent number: 8605769
    Abstract: A semiconductor laser device includes: a substrate having a principal plane; a photonic crystal layer having an epitaxial layer of gallium nitride formed on substrate in a direction in which principal plane extends and a low refractive index material having a refractive index lower than that of epitaxial layer; an n-type clad layer formed on substrate; a p-type clad layer formed on substrate; an active layer that is interposed between n-type clad layer and p-type clad layer and emits light when a carrier is injected thereinto; and a GaN layer that covers a region directly on photonic crystal layer. Thus, the semiconductor laser device can be manufactured without fusion.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: December 10, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Susumu Yoshimoto, Hideki Matsubara, Hirohisa Saitou, Takashi Misaki, Fumitake Nakanishi, Hiroki Mori