Abstract: A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. The first conductor is provided with a first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator provided therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator provided therebetween. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.

Abstract: A semiconductor device that has reduced power consumption and is capable of non-destructive reading is provided. The semiconductor device includes a first circuit including a first transistor and a first FTJ element, and a second circuit including a second transistor and a second FTJ element. A first terminal of the first transistor is electrically connected to an output terminal of the first FTJ element, and a first terminal of the second transistor is electrically connected to an input terminal of the second FTJ element. A second terminal of the first transistor and a second terminal of the second transistor are electrically connected to a read circuit. In a data writing method, a voltage is applied between the input terminal and the output terminal of each of the first FTJ element and the second FTJ element to polarize the first FTJ element and the second FTJ element.

Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.

Abstract: A semiconductor device having favorable display quality is provided. The semiconductor device is provided with a display portion, a line-of-sight sensor portion, a control portion, and an arithmetic portion. The line-of-sight sensor portion has a function of obtaining first information showing a direction of a user's line of sight. The arithmetic portion has a function of determining a first region including a gaze point of the user on the display portion with use of the first information and a function of increasing a definition of an image displayed on the first region. Light emitted from the display portion may be used to obtain the first information showing the direction of the line of sight.

Abstract: A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. The first conductor is provided with a first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator provided therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator provided therebetween. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.

Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.

Abstract: A highly reliable memory device is provided. Of an information bit and a check bit forming a hamming code, the information bit having a larger bit length than the check bit is stored in a first memory portion, and the check bit is stored in the second memory portion. The hamming code is divided and stored in a plurality of memory portions, whereby occurrence of a soft error is suppressed. The first memory portion that needs a large memory capacity is formed using a Si transistor, and the second memory portion is formed using an OS transistor. A combination of memory scribing and bit interleaving achieves a highly reliable memory device.

Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.

Abstract: A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. A first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween are provided in the first conductor. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.

Abstract: A semiconductor device having favorable display quality is provided. The semiconductor device is provided with a display portion, a line-of-sight sensor portion, a control portion, and an arithmetic portion. The line-of-sight sensor portion has a function of obtaining first information showing a direction of a user's line of sight. The arithmetic portion has a function of determining a first region including a gaze point of the user on the display portion with use of the first information and a function of increasing a definition of an image displayed on the first region. Light emitted from the display portion may be used to obtain the first information showing the direction of the line of sight.

Abstract: It is an object of the present invention to apply a sufficient electrical field to a liquid crystal material in a horizontal electrical field liquid crystal display device typified by an FFS type. In a horizontal electrical field liquid crystal display, an electrical field is applied to a liquid crystal material right above a common electrode and a pixel electrode using plural pairs of electrodes rather than one pair of electrodes. One pair of electrodes includes a comb-shaped common electrode and a comb-shaped pixel electrode. Another pair of electrodes includes a common electrode provided in a pixel portion and the comb-shaped pixel electrode.

Abstract: A novel memory device is provided. A plurality of memory cells each including two vertical transistors are connected in series. One of the two transistors functions as a transistor for writing data, and the other functions as a transistor for reading the data that has been written to the memory cell. Data written to the memory cell is retained in a gate of the reading transistor. A transistor with low off-state current is used as the writing transistor.

Abstract: It is an object of the present invention to apply a sufficient electrical field to a liquid crystal material in a horizontal electrical field liquid crystal display device typified by an FFS type. In a horizontal electrical field liquid crystal display, an electrical field is applied to a liquid crystal material right above a common electrode and a pixel electrode using plural pairs of electrodes rather than one pair of electrodes. One pair of electrodes includes a comb-shaped common electrode and a comb-shaped pixel electrode. Another pair of electrodes includes a common electrode provided in a pixel portion and the comb-shaped pixel electrode.

Abstract: A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. A first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween are provided in the first conductor. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.

Abstract: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.

Abstract: Provided is a novel light-emitting element. The light-emitting element includes an anode, an EL layer over the anode, and a cathode over the EL layer; a first layer is adjacent to a side surface of the EL layer, and a first portion is adjacent to the side surface of the first layer. The EL layer and the first portion are adjacent to each other with the first layer therebetween. A refractive index of the first portion is lower than a refractive index of the first layer. An angle ? between a bottom surface and the side surface of the EL layer is larger than 90°.

Abstract: A novel semiconductor device is provided. In reservoir computing using an input layer, a reservoir layer, and an output layer, variation in threshold voltage between transistors is used as a weight used for product arithmetic processing. Two transistors are provided in one product arithmetic circuit and data u is supplied to gates of the two transistors. Drain current of each of the transistors is determined by the data u and the threshold voltage of the transistor. The difference between the drain currents corresponds to a product arithmetic result. The difference between the drain currents is converted into voltage to be output. A plurality of product arithmetic circuits are connected in parallel to form a product-sum arithmetic circuit.

Abstract: It is an object of the present invention to apply a sufficient electrical field to a liquid crystal material in a horizontal electrical field liquid crystal display device typified by an FFS type. In a horizontal electrical field liquid crystal display, an electrical field is applied to a liquid crystal material right above a common electrode and a pixel electrode using plural pairs of electrodes rather than one pair of electrodes. One pair of electrodes includes a comb-shaped common electrode and a comb-shaped pixel electrode. Another pair of electrodes includes a common electrode provided in a pixel portion and the comb-shaped pixel electrode.

Abstract: A method for fabricating a novel display device is provided. The method for fabricating the display device includes a step of forming an anode, a first EL layer, a first cathode, and a first layer in this order; a step of forming a first resist mask over the first layer; a step of selectively removing parts of the anode, the first EL layer, the first cathode, and the first layer; a step of removing part of the first resist mask; a step of selectively removing other parts of the first EL layer, the first cathode, and the first layer; and a step of removing the first resist mask. The first resist mask is formed using a multi-tone mask.

Abstract: A semiconductor device having favorable display quality is provided. The semiconductor device is provided with a display portion, a line-of-sight sensor portion, a control portion, and an arithmetic portion. The line-of-sight sensor portion has a function of obtaining first information showing a direction of a user's line of sight. The arithmetic portion has a function of determining a first region including a gaze point of the user on the display portion with use of the first information and a function of increasing a definition of an image displayed on the first region. Light emitted from the display portion may be used to obtain the first information showing the direction of the line of sight.