Patents by Inventor Hideki Yamanaka
Hideki Yamanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060206680Abstract: When receiving a request for a write, write data is added by identifier information for confirming the normality of the data and then written to a storage apparatus, with the identifier information being added to format information, of a writing track, which is recorded in a track format table. And when receiving a request for a read, the requester is notified of a data abnormality if identifier information of data read from a storage apparatus does not identify with that of format information, of the reading track, which is recorded in the track format table.Type: ApplicationFiled: September 29, 2005Publication date: September 14, 2006Applicant: Fujitsu LimitedInventors: Hideki Yamanaka, Shigeru Akiyama, Satoshi Hayashi, Takashi Okuno
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Publication number: 20060179215Abstract: In the present invention, for each set of blocks [#(0) to #(N?1)] storing update data, a history block [#(N)] storing an update state value, for example, a generation, time or check code, showing an update state is provided, constituting a set of management data as a check object. When writing update data on a disk, a new update state value is calculated for the same set of management data and stored in memory as update state confirmation value. The new update state value is also set as write data in the history block in the same set of management data, and the entire of the set of management data including update data and update state value are written onto a disk. The history block is read and disk write omissions are detected by comparing the update state value and the update state confirmation value stored in memory.Type: ApplicationFiled: May 18, 2005Publication date: August 10, 2006Applicant: FUJITSU LIMITEDInventors: Shinya Mochizuki, Hideo Takahashi, Mikio Ito, Hidejiro Daikokuya, Kazuhiko Ikeuchi, Hideki Yamanaka, Katsuhiko Nagashima, Akihito Kobayashi, Koji Uchida, Shinichi Nishizono
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Publication number: 20060179217Abstract: In the present invention, for each set of blocks [#(0) to #(N-1)] storing update data, a history block [#(N)] storing an update state value, for example, a generation, time or check code, showing an update state is provided, constituting a set of management data as a check object. When writing update data on a disk, a new update state value is calculated for the same set of management data and stored in memory as update state confirmation value. The new update state value is also set as write data in the history block in the same set of management data, and the entire of the set of management data including update data and update state value are written onto a disk. The history block is read and disk write omissions are detected by comparing the update state value and the update state confirmation value stored in memory.Type: ApplicationFiled: February 7, 2006Publication date: August 10, 2006Applicant: FUJITSU LIMITEDInventors: Mikio Ito, Hideo Takahashi, Shinya Mochizuki, Hidejiro Daikokuya, Kazuhiko Ikeuchi, Hideki Yamanaka, Katsuhiko Nagashima, Akihito Kobayashi, Koji Uchida, Shinichi Nishizono
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Publication number: 20060131553Abstract: The present invention has been made in order to manufacture a silicon semiconductor substrate used for a semiconductor integrated circuit device, higher in carrier mobility, especially in electron mobility, which is a carrier of an n-type FET, on a {100} plane as a main surface, and provides a silicon semiconductor substrate and a method for manufacturing the same, wherein the conventional RCA cleaning is employed without the use of special cleaning and the surface of the substrate is planarized at an atomic level to thereby decrease the surface roughness thereof without the use of the radical oxidation. The present invention provides a silicon semiconductor substrate comprising: a {110} plane or a plane inclined from a {110} plane as a main surface of the substrate; and steps arranged at an atomic level along a <110> orientation on the main surface.Type: ApplicationFiled: January 29, 2004Publication date: June 22, 2006Inventors: Hideki Yamanaka, Kiyoshi Demizu, Tadahiro Ohmi, Akinobu Teramoto, Shigetoshi Sugawa
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Publication number: 20050201546Abstract: In a work skill estimating device, an item information receiving unit receives, as item information, duration information of each dealing sequence in a customer call. A dealing duration estimating unit estimates a dealing duration of an item based on the item information received. A work skill estimating unit estimates an operator's work skill based on the dealing duration estimated. A skill map creating unit creates a skill map to comprehend the operator's work skill estimated.Type: ApplicationFiled: July 14, 2004Publication date: September 15, 2005Inventors: Takashi Yanase, Hideki Yamanaka, Isao Namba
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Publication number: 20040037415Abstract: Information such as status of each operator that is information about whether the operator is engaged in processing a transaction or he is standby, how long it will take the operator to complete the transaction he is processing at this time, and when the operator started processing the transaction is stored. If a plurality of the operators are standby when a transaction is received, one operator is selected from among the standby operators as an operator to process the transaction. If no operator is standby, it is estimated when each operator is going to be standby and one operator is selected, from among the operators who are going to be standby in not more than a predetermined time, as the operator to process the transaction.Type: ApplicationFiled: June 30, 2003Publication date: February 26, 2004Applicant: Fujitsu LimitedInventor: Hideki Yamanaka
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Patent number: 6482260Abstract: There is disclosed a method for producing a silicon single crystal in accordance with the Czochralski method wherein a crystal is pulled with controlling a temperature in a furnace so that &Dgr;G may be 0 or a negative value, where &Dgr;G is a difference between the temperature gradient Gc (°C./mm) at the center of a crystal and the temperature gradient Ge (°C./mm) at the circumferential portion of the crystal, namely &Dgr;G=(Ge−Gc), wherein G is a temperature gradient in the vicinity of a solid-liquid interface of a crystal from the melting point of silicon to 1400° C.Type: GrantFiled: November 30, 2000Date of Patent: November 19, 2002Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masahiro Sakurada, Hideki Yamanaka, Tomohiko Ohta
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Patent number: 6378083Abstract: A watch dog timer capable of detecting a runaway state of a system including a CPU and DMAC has a watch dog timer and a count clock controller. The watch dog timer counts the number of clock and stores a count result, and transmits a watch dog time out signal to other devices in the system if the number of clocks is over a predetermined value. The count clock controller receives the clock and transmits the clock to the watch dog timer, and halts the transmission of the clock to the watch dog timer when the CPU transmits a bus permission signal to the DMAC.Type: GrantFiled: July 26, 1996Date of Patent: April 23, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Hideki Yamanaka, Seiji Hinata
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Patent number: 6364947Abstract: In method for manufacturing a silicon single crystal in accordance with a Czochralski method, during the growth of the silicon single crystal, pulling is performed such that a solid-liquid interface in the crystal, excluding a peripheral 5 mm-width portion, exists within a range of an average vertical position of the solid-liquid interface ±5 mm. There is also disclosed a method for manufacturing a silicon single crystal in accordance with the Czochralski method, wherein during the growth of a silicon single crystal, a furnace temperature is controlled such that a temperature gradient difference &Dgr;G (=Ge−Gc) is not greater than 5° C./cm, where Ge is a temperature gradient (° C./cm) at a peripheral portion of the crystal, and Gc is a temperature gradient (° C./cm) at a central portion of the crystal, both in an in-crystal descending temperature zone between 1420° C. and 1350° C. or between a melting point of silicon and 1400° C.Type: GrantFiled: September 14, 2000Date of Patent: April 2, 2002Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Makoto Iida, Eiichi Iino, Masanori Kimura, Shozo Muraoka, Hideki Yamanaka
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Publication number: 20010016878Abstract: An application protocol of a connection between a server and a client is converted into a multiplexing protocol having a huge communication window. The resultant connection is repeated. Since an agent relaying device receives data from the server using a large buffer, a throughput assigned by the server to the connection is increased.Type: ApplicationFiled: January 3, 2001Publication date: August 23, 2001Inventor: Hideki Yamanaka
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Publication number: 20010000093Abstract: There is disclosed a method for producing a silicon single crystal in accordance with the Czochralski method wherein a crystal is pulled with controlling a temperature in a furnace so that &Dgr;G may be 0 or a negative value, where &Dgr;G is a difference between the temperature gradient Gc (° C./mm) at the center of a crystal and the temperature gradient Ge (° C./mm) at the circumferential portion of the crystal, namely &Dgr;G=(Ge−Gc), wherein G is a temperature gradient in the vicinity of a solid-liquid interface of a crystal from the melting point of silicon to 1400° C.Type: ApplicationFiled: November 30, 2000Publication date: April 5, 2001Applicant: Shin-Etsu Handotai Co., Ltd.,Inventors: Masahiro Sakurada, Hideki Yamanaka, Tomohiko Ohta
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Patent number: 6190452Abstract: There is disclosed a method for producing a silicon single crystal in accordance with the Czochralski method wherein a crystal is pulled with controlling a temperature in a furnace so that &Dgr;G may be 0 or a negative value, where &Dgr;G is a difference between the temperature gradient Gc (° C./mm) at the center of a crystal and the temperature gradient Ge (° C./mm) at the circumferential portion of the crystal, namely &Dgr;G=(Ge−Gc), wherein G is a temperature gradient in the vicinity of a solid-liquid interface of a crystal from the melting point of silicon to 1400° C.Type: GrantFiled: June 8, 1999Date of Patent: February 20, 2001Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masahiro Sakurada, Hideki Yamanaka, Tomohiko Ohta
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Patent number: 6174364Abstract: A method for producing a silicon monocrystal according to Czochralski method characterized in growing crystal with controlling a pulling rate between a transition pulling rate Pc at which there is caused a transition from a region where excess vacancies are present, but grown-in defect is not present to a region where excess interstitial silicon atoms are present, but an agglomerate thereof is not present, and a transition pulling rate Pi from a region where excess interstitial silicon atoms are present, but an agglomerate thereof is not present to a region where an agglomerate of interstitial silicon atoms is present. There are provided a method for producing a silicon monocrystal having no defect through the whole area of the wafer and having high quality wherein a deviation of amount of precipitated oxygen is small by pulling a crystal with controlling a pulling rate P as a general and interoperable valuable, and the silicon monocrystal produced thereby.Type: GrantFiled: January 15, 1999Date of Patent: January 16, 2001Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Hideki Yamanaka, Masahiro Sakurada, Shinichi Horie
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Patent number: 6159438Abstract: In method for manufacturing a silicon single crystal in accordance with a Czochralski method, during the growth of the silicon single crystal, pulling is performed such that a solid-liquid interface in the crystal, excluding a peripheral 5 mm-width portion, exists within a range of an average vertical position of the solid-liquid interface.+-. 5 mm. There is also disclosed a method for manufacturing a silicon single crystal in accordance with the Czochralski method, wherein during the growth of a silicon single crystal, a furnace temperature is controlled such that a temperature gradient difference .DELTA.G (=Ge-Gc) is not greater than 5.degree. C./cm, where Ge is a temperature gradient (.degree. C./cm) at a peripheral portion of the crystal, and Gc is a temperature gradient (.degree. C./cm) at a central portion of the crystal, both in an in-crystal descending temperature zone between 1420.degree. C. and 1350.degree. C. or between a melting point of silicon and 1400.degree. C.Type: GrantFiled: July 22, 1999Date of Patent: December 12, 2000Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Makoto Iida, Eiichi Iino, Masanori Kimura, Shozo Muraoka, Hideki Yamanaka
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Patent number: 6151135Abstract: A first image is formed with at least a first color included in a first coloring system and corresponding to first color signal data converted from second signal data corresponding to at least a second color included in a second coloring system and related to an original image. At least a color modification parameter corresponding to a difference between the first color and a third color related to the original image. The color modification parameter is optimized to calculate a first area to be modified and a first amount to be modified with respect to the original image. A second image is formed using the second color signal data on the basis of the first area and amount to be modified and another first image already formed. Next, a third image is formed using the first color signal data, the third image corresponding to the second color. And, the second and third images are synthesized to form the first image.Type: GrantFiled: March 19, 1998Date of Patent: November 21, 2000Assignee: Victor Company of Japan, Ltd.Inventors: Kenji Tanaka, Asako Kato, Hideki Yamanaka, Naoki Nishiyama
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Patent number: 5968264Abstract: In method for manufacturing a silicon single crystal in accordance with a Czochralski method, during the growth of the silicon single crystal, pulling is performed such that a solid-liquid interface in the crystal, excluding a peripheral 5 mm-width portion, exists within a range of an average vertical position of the solid-liquid interface .+-.5 mm. There is also disclosed a method for manufacturing a silicon single crystal in accordance with the Czochralski method, wherein during the growth of a silicon single crystal, a furnace temperature is controlled such that a temperature gradient difference .DELTA.G (=Ge-Gc) is not greater than 5.degree. C./cm, where Ge is a temperature gradient (.degree.C./cm) at a peripheral portion of the crystal, and Gc is a temperature gradient (.degree.C./cm) at a central portion of the crystal, both in an in-crystal descending temperature zone between 1420.degree. C. and 1350.degree. C. or between a melting point of silicon and 1400.degree. C.Type: GrantFiled: July 2, 1998Date of Patent: October 19, 1999Assignee: Shin-etsu Handotai Co., Ltd.Inventors: Makoto Iida, Eiichi Iino, Masanori Kimura, Shozo Muraoka, Hideki Yamanaka
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Patent number: 5729072Abstract: In a stator for an electric motor, insulating members are formed on laminated iron cores divided for each pole-tooth unit in the direction of the output shaft and windings are applied perpendicularly to the pole-tooth portions in a high-density alignment. After a predetermined number of the laminated iron cores are combined so as to form a cylindrical configuration, they are welded at the outer end portions of the dividing surfaces in the direction of lamination so as to construct an integral structure stator with rigidity, thereby enabling high densification of the windings (conductor space factor of 70%) and space-savings in the winding end portions. Further, as any joint portions between the pole-tooth portions are not necessary, reduction (5 to 10%) in motor efficiency due to such joint portions can be prevented, and, as any integrally forming by resinous members is not necessary, inter-winding short-circuiting is not caused. Welding may be replaced by adhesive bonding.Type: GrantFiled: September 20, 1993Date of Patent: March 17, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Mikio Hirano, Seiji Kikuchi, Manabu Takeuchi, Hiroshi Kawazoe, Kouzi Fukuda, Takashi Akiyama, Koichi Nakatsukasa, Hideki Yamanaka, Kazunori Morita
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Patent number: 5614923Abstract: An improved drive apparatus for a LC display screen is provided. The inventioned drive apparatus includes a programmable time setting means for changing drive currents in accordance with the size of the LC display screen. Depending upon the size of the LC display screen, it is necessary to change the drive current for charging up the display as promptly as possible at an initial stage of operation. The inventioned drive apparatus includes at least one time setting register means for programmably pre-setting a time according to the size of the display screen and a circuit selection means for providing a low resistor selection signal and a high resistor selection signal in accordance with the pre-set time of the time setting means.Type: GrantFiled: July 13, 1994Date of Patent: March 25, 1997Assignee: Kabushiki Kaisha ToshibaInventors: Tatsushi Gotou, Kazuyuki Murase, Hideki Yamanaka
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Patent number: 5446430Abstract: A dielectric resonator of a folded strip line type structure in which an electrode is formed on the outer circumferential portion of a cutout-carrying U-shaped dielectric substrate exclusive of the upper and lower surfaces thereof and either one of two end surfaces at the opened portion of the cutout. An island electrode formed in the vicinity of a non-electrode-carrying end surface out of the two end surfaces at the opened portion of the cutout is used as an input-output coupling electrode. The inner wall surface of the cutout can be formed wavily, and a separate dielectric member can be fitted into the cutout.Type: GrantFiled: July 12, 1993Date of Patent: August 29, 1995Assignee: Fuji Electrochemical Co., Ltd.Inventors: Hideki Yamanaka, Teruto Sugano, Masanobu Mitarai