Patents by Inventor Hidenori Yamaguchi
Hidenori Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220122931Abstract: A semiconductor device includes a first layer including a plurality of wirings arranged in line and space layout and a second layer including a pad electrically connected to at least one of the wirings, wherein the wirings and the pads are patterned by different lithographic processes.Type: ApplicationFiled: October 19, 2020Publication date: April 21, 2022Applicant: MICRON TECHNOLOGY, INC.Inventors: Hidenori Yamaguchi, Shunsuke Asanao, Katsumi Koge, Shigeharu Nishimura
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Publication number: 20220059346Abstract: A method including forming an insulating film over first, second, third and fourth regions of a semiconductor substrate; forming a polyimide film on the insulating film; and patterning the polyimide film with a lithography method using a photomask including at least a first region of a first transmittance rate, a second region of a second transmittance rate, a third region. having a shading material, and a fourth region, wherein the first, second, third and fourth regions of the photomask correspond to the first, second, third and fourth regions of the semiconductor substrate, respectively.Type: ApplicationFiled: August 24, 2020Publication date: February 24, 2022Applicant: MICRON TECHNOLOGY, INC.Inventors: Hidenori Yamaguchi, Keizo Kawakita, Wataru Hoshino, Shigeru Sugioka, Toshiyuki Maenosono
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Publication number: 20210391279Abstract: A semiconductor device includes a semiconductor substrate; and a multilevel wiring structure on the semiconductor substrate, the multilevel wiring structure including at least an intermediate metal layer over the semiconductor substrate and an uppermost metal layer over the intermediate metal layer, and the multilevel wiring structure being divided into a main circuit portion and a scribe portion surrounding the main circuit portion; wherein the scribe portion of the multilevel wiring layer includes at least a metal pad exposed in the intermediate metal layer.Type: ApplicationFiled: June 15, 2020Publication date: December 16, 2021Applicant: MICRON TECHNOLOGY, INC.Inventors: Shigeru Sugioka, Keizo Kawakita, Hidenori Yamaguchi, Bang Ning Hsu
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Publication number: 20210375778Abstract: A semiconductor device includes a semiconductor substrate; a first insulating film and a second insulating film provided above the semiconductor substrate; a low-k film provided between the first insulating film and the second insulating film; an element formation region in which elements included in an electric circuit are formed in the semiconductor substrate; a scribe region provided around the element formation region; a cut portion provided on the outer periphery of the scribe region; and a groove formed between the cut portion and the element formation region, wherein the groove penetrates through the low-k film.Type: ApplicationFiled: May 27, 2020Publication date: December 2, 2021Applicant: MICRON TECHNOLOGY, INC.Inventors: Shigeru Sugioka, Hidenori Yamaguchi, Noriaki Fujiki, Keizo Kawakita
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Publication number: 20210364911Abstract: A semiconductor device includes a semiconductor substrate having a semiconductor substrate having a main surface including a first portion; a redistribution layer provided over the first portion of the main surface of the semiconductor substrate; an insulating layer covering the first portion of the main surface of the semiconductor substrate and the redistribution layer; and a first polyimide film covering the insulating layer; wherein the polyimide film has a substantially flat upper surface.Type: ApplicationFiled: May 19, 2020Publication date: November 25, 2021Applicant: MICRON TECHNOLOGY, INC.Inventors: Hidenori Yamaguchi, Keizo Kawakita, Shigeru Sugioka
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Publication number: 20210351133Abstract: A semiconductor device includes a main circuit region; and a scribe region surrounding the main circuit region; wherein the main circuit region and the scribe region comprises first and second insulating films and a low-k film formed therebetween; and wherein the low-k film of the scribe region includes a plurality of cavities lining along a border between. the main circuit region and the scribe region.Type: ApplicationFiled: May 11, 2020Publication date: November 11, 2021Applicant: MICRON TECHNOLOGY, INC.Inventors: Shigeru Sugioka, Hidenori Yamaguchi, Noriaki Fujiki, Keizo Kawakita, Raj K. Bansal
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Publication number: 20210085332Abstract: A system and method for sheathing and resheathing a delivery catheter for embolic device are disclosed. An embodiment is directed to an embolic device delivery system that includes a delivery catheter having an embolic device coupler, a locking tube disposed about the delivery catheter, a protective sheath, and a sheath outer component disposed about the protective sheath configured to unsheathe and resheathe the delivery catheter, and smooth transferring of the embolic device into a microcatheter. In one embodiment, the coupler may be an elongated shape having a loop portion for engaging the coil toward the distal end of the delivery catheter. The loop portion of the coupler may be an elastic material or a shape-memory alloy, such as Nitinol or nickel titanium, such that the loop portion is bendable at various angles. Together, the delivery catheter and coupler may be inserted into an artery and carry an embolic device to an aneurysm for placement near an aneurysm.Type: ApplicationFiled: September 20, 2019Publication date: March 25, 2021Inventors: SITH KHOUNE, Hidenori Yamaguchi
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Publication number: 20180000438Abstract: An X-ray diagnostic apparatus according to an embodiment includes an X-ray tube, an X-ray detector, an arm holding the X-ray tube and processing circuitry. The processing circuitry obtains body thickness information of a subject in an acquisition direction of an X-ray image at an arm position different from an arm position at a start of acquiring X-ray images. The processing circuitry sets, based on the body thickness information of the subject, acquisition condition at the start of acquiring the X-ray images. The processing circuitry starts acquiring of the X-ray images with the set acquisition condition. The processing circuitry acquires the X-ray images sequentially by rotating the arm while iteratively,setting the acquisition condition by feedback control.Type: ApplicationFiled: June 29, 2017Publication date: January 4, 2018Applicant: Toshiba Medical Systems CorporationInventors: Shingo ABE, Hisato TAKEMOTO, Kazuhiro TANIYAMA, Hidenori YAMAGUCHI
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Publication number: 20130020721Abstract: A semiconductor device includes a semiconductor substrate, a through silicon via that penetrates through the semiconductor substrate in a thickness direction thereof, a first insulating region, a second insulating region formed below the first principal surface of the semiconductor substrate, and an isolation region made of an insulating material buried in a second trench formed below the first principal surface of the semiconductor substrate. The first insulating region is made of an insulating material buried in a first groove that surrounds the through silicon via and penetrates through the semiconductor substrate from a first principal surface thereof to a second principal surface thereof. The second insulating region is deeper than the second trench and shallower than the first trench.Type: ApplicationFiled: July 16, 2012Publication date: January 24, 2013Applicant: ELPIDA MEMORY, INC.Inventors: Yutaka NAKAE, Nobuyuki NAKAMURA, Tomohiko INOKUCHI, Hidenori YAMAGUCHI
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Publication number: 20100247770Abstract: Described are novel methods for applying a coating liquid, forming a coated film, forming a pattern by using the same, and manufacturing a semiconductor device. A coating liquid is applied onto a substrate using a method including forming a puddle of a mixture liquid containing a coating liquid and a diluting liquid on the substrate and spreading the mixture liquid over the surface of the substrate, forming a coated film. Alternatively, a coating liquid is applied onto a substrate using a method including dispensing a diluting liquid on a substrate to cover the entire surface of the substrate with the diluting liquid, dispensing a coating liquid on the diluting liquid forming an area where the mixture liquid containing the coating liquid and the diluting liquid is present, and spreading the mixture liquid over the surface of the substrate to apply the coating liquid on the substrate, forming a coated film.Type: ApplicationFiled: March 11, 2010Publication date: September 30, 2010Applicant: ELPIDA MEMORY, INC.Inventors: Yosuke SAITO, Hidenori YAMAGUCHI
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Patent number: 7549543Abstract: In a cylindrical sieve, a first frame 7 is provided with a first ring plate 7a arranged in a radial direction and a ring plate 7b extended inward in an axial direction X of the sieve from an inner end of the first ring plate 7a. The ring plate 7b has an inwardly warped end. A ring projection 2a is fit in a ring-shaped cavity K1 defined by a ring recess 10a and the first frame 7. The ring plate 7b presses the ring projection 2a outward in the radial direction to prevent the ring projection 2a from being slipped off the matching recess. Through holes 7c (counter bores) are formed in the first frame 7 along the axial direction X. Four of the through holes 7c are used to fasten the rods 6 and receive the Phillips head screws 6f seated therein, and the remaining through holes 7c receives Phillips head screws 20 (see FIG. 1) seated therein for reinforced linkage of the first frame 7 with the holder frame 11.Type: GrantFiled: January 17, 2008Date of Patent: June 23, 2009Assignee: Tsukasa Industry Co., Ltd.Inventors: Fumio Kato, Yoshio Sakakibara, Hidenori Yamaguchi
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Patent number: 7410064Abstract: In a cylindrical sieve, a first frame 7 is provided with a first ring plate 7a arranged in a radial direction and a ring plate 7b extended inward in an axial direction X of the sieve from an inner end of the first ring plate 7a. The ring plate 7b has an inwardly warped end. A ring projection 2a is fit in a ring-shaped cavity K1 defined by a ring recess 10a and the first frame 7. The ring plate 7b presses the ring projection 2a outward in the radial direction to prevent the ring projection 2a from being slipped off the matching recess. Through holes 7c (counter bores) are formed in the first frame 7 along the axial direction X. Four of the through holes 7c are used to fasten the rods 6 and receive the Phillips head screws 6f seated therein, and the remaining through holes 7c receives Phillips head screws 20 (see FIG. 1) seated therein for reinforced linkage of the first frame 7 with the holder frame 11.Type: GrantFiled: December 24, 2003Date of Patent: August 12, 2008Assignee: Tsukasa Industry Co., Ltd.Inventors: Fumio Kato, Yoshio Sakakibara, Hidenori Yamaguchi
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Publication number: 20080116120Abstract: In a cylindrical sieve, a first frame 7 is provided with a first ring plate 7a arranged in a radial direction and a ring plate 7b extended inward in an axial direction X of the sieve from an inner end of the first ring plate 7a. The ring plate 7b has an inwardly warped end. A ring projection 2a is fit in a ring-shaped cavity K1 defined by a ring recess 10a and the first frame 7. The ring plate 7b presses the ring projection 2a outward in the radial direction to prevent the ring projection 2a from being slipped off the matching recess. Through holes 7c (counter bores) are formed in the first frame 7 along the axial direction X. Four of the through holes 7c are used to fasten the rods 6 and receive the Phillips head screws 6f seated therein, and the remaining through holes 7c receives Phillips head screws 20 (see FIG. 1) seated therein for reinforced linkage of the first frame 7 with the holder frame 11.Type: ApplicationFiled: January 17, 2008Publication date: May 22, 2008Inventors: Fumio Kato, Yoshio Sakakibara, Hidenori Yamaguchi
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Publication number: 20080106716Abstract: A photomask used in step-and-scan reduced projection exposure is provided with a substrate and a pattern formation area formed on the substrate. The pattern formation area has an unequal aspect dimensions and is a long rectangular shape in a scan direction. A first pattern width in the scan direction of the pattern formation area is greater than a lens width of a reduced projection optical system, and a second pattern width in the direction orthogonal to the scan direction of the pattern formation area is equal to or less than the lens width of the reduce projection optical system. The photomask further has a mask size indicator formed in a periphery area of the substrate. The mask size indicator indicates information related to aspect dimensions of the pattern formation area.Type: ApplicationFiled: October 5, 2007Publication date: May 8, 2008Applicant: ELPIDA MEMORY, INC.Inventor: Hidenori Yamaguchi
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Publication number: 20080036986Abstract: The photomask 10 comprises a substrate 11, a shot region 12 positioned on the substrate 11, mask patterns 13 formed within the shot region 12, and mask magnification information 14x formed in the outside exposure area (recto area) 14 of the shot region 12. The entire shot region 12 including the mask patterns 13 is elongated in the scanning direction (Y direction) indicated by the arrow. The mask magnifications of the mask pattern 13 are set to a magnitude of 4 in the X direction and a magnitude of 8 in the Y direction, for example. When the step-and-scan exposure technique is carried out using such a photomask in which the mask magnifications in the X and Y directions are different, a high-definition wafer having an equivalent longitudinal and transverse ratio can be transferred.Type: ApplicationFiled: December 19, 2006Publication date: February 14, 2008Applicant: ELPIDA MEMORY, INC.Inventor: Hidenori Yamaguchi
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Publication number: 20070194466Abstract: Fine projection patterns are added to each side of a base mark pattern of an overlay measurement mark. Thus, film separation in the overlay measurement mark can be prevented.Type: ApplicationFiled: February 8, 2007Publication date: August 23, 2007Applicant: ELPIDA MEMORY, INC.Inventor: Hidenori Yamaguchi
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Publication number: 20060102527Abstract: In a cylindrical sieve, a first frame 7 is provided with a first ring plate 7a arranged in a radial direction and a ring plate 7b extended inward in an axial direction X of the sieve from an inner end of the first ring plate 7a. The ring plate 7b has an inwardly warped end. A ring projection 2a is fit in a ring-shaped cavity K1 defined by a ring recess 10a and the first frame 7. The ring plate 7b presses the ring projection 2a inward in the radial direction to prevent the ring projection 2a from being slipped off the matching recess. Through holes 7c (counter bores) are formed in the first frame 7 along the axial direction X. Four of the through holes 7c are used to fasten the rods 6 and receive the Phillips head screws 6f seated therein, and the remaining through holes 7c receives Phillips head screws 20 (see FIG. 1) seated therein for reinforced linkage of the first frame 7 with the holder frame 11.Type: ApplicationFiled: December 24, 2003Publication date: May 18, 2006Inventors: Fumio Kato, Yoshio Sakakibara, Hidenori Yamaguchi
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Patent number: 5324550Abstract: In forming a resist pattern by forming a resist film containing an acid generator on a spin on glass film or a silicon resin film and subsequent exposure of light, an inhomogeneous distribution of an acid in the resist film caused by the spin on glass film or the silicon resin film is remedied by adding an acid generator beforehand into the spin on glass film or the silicon resin film or by using an organic polymer containing an acid generator. As a result, a profile defect in a cross section of the resist pattern caused by inhomogeneous acid distribution is prevented and the resist pattern has a rectangular cross-sectional shape.Type: GrantFiled: August 12, 1992Date of Patent: June 28, 1994Assignee: Hitachi, Ltd.Inventors: Hidenori Yamaguchi, Fumio Murai, Norio Hasegawa, Toshio Sakamizu, Hiroshi Shiraishi
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Patent number: 5209813Abstract: A lithographic method and a lithographic apparatus ar disclosed in which the height of a silicon wafer making up an object of lithography is accurately measured. A lithographic apparatus such as an electron beam apparatus having a height-measuring instrument built therein is effectively used for forming a pattern on the order of submicrons.Type: GrantFiled: October 24, 1991Date of Patent: May 11, 1993Assignee: Hitachi, Ltd.Inventors: Yoshitada Oshida, Genya Matsuoka, Teruo Iwasaki, Toshio Kaneko, Hiroyuki Takahashi, Hiroyoshi Ando, Hidenori Yamaguchi, Katsuhiro Kawasaki
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Patent number: D490396Type: GrantFiled: March 6, 2003Date of Patent: May 25, 2004Assignee: Aiphone Co., Ltd.Inventors: Hidenori Yamaguchi, Toshio Hotta