Patents by Inventor Hideo Fujiwara

Hideo Fujiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080197647
    Abstract: A vehicle front portion structure having a storage portion for facilitating maintenance for a vehicle front portion includes a first storage portion that includes a bottom portion extending in the longitudinal direction of a vehicle body, left and right walls extending upwardly from the bottom portion, a ceiling portion connecting the left and right walls and a back wall closing the respective backs of the bottom portion, left and right walls and ceiling portion. The first storage portion is provided with a maintenance opening formed to be spanned among the back wall, a left wall continuous with the back wall and the bottom portion continuous with the back wall, and with the lid body which covers the maintenance opening in an attachable and detachable manner. A key cylinder arrangement structure for a vehicle is provided that can significantly enhance operability of a key cylinder while preventing tampering or theft.
    Type: Application
    Filed: February 15, 2008
    Publication date: August 21, 2008
    Inventors: Junichi SAKAMOTO, Sadamichi Enjo, Hideo Fujiwara
  • Patent number: 7303719
    Abstract: A disk-shape resin molded article such as a gear comprises a rim, a boss, a web having a disk configuration for connecting the rim and the boss, and gear teeth formed on the rim. The molded article is produced by an injection-compression molding process which comprises injecting a molten resin into a cavity of a metal mold, and pressing a web site and at least one site selected from the group consisting of a boss site and a rim site in a thickness direction. The cavity may have a capacity larger than the solidified products by contraction amount of the injected molten resin.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: December 4, 2007
    Assignee: Tigers Polymer Corporation
    Inventors: Kiyofumi Hiroi, Hideo Fujiwara, Hidehisa Matsuo, Yasuhiro Yao
  • Publication number: 20070124518
    Abstract: A driver circuit in a high-speed serial communications system changes an input data signal into a differential signal. A first output terminal is connected to a predetermined power supply voltage through a first pullup resistance circuit and to a grounding voltage through a first pulldown resistance circuit. A second output terminal is connected to the predetermined power supply voltage through a second pull-up resistance circuit and to the grounding voltage through a second pulldown resistance circuit. Resistances of the first and second pull-up resistance circuits and resistances of the first and second pulldown resistance circuits are changed according to the input data signal.
    Type: Application
    Filed: July 28, 2006
    Publication date: May 31, 2007
    Inventor: Hideo Fujiwara
  • Publication number: 20070097742
    Abstract: A toggle-MRAM device is disclosed that uses an SAF composite and lowers the operating field substantially with a wide operating field margin and high thermal stability using specific magnetic parameters. Consequently, this device enhances the performance of MRAM's, especially in its large operating field margin and high thermal stability characteristics with a low current.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 3, 2007
    Inventors: Hideo Fujiwara, Sheng-Yuan Wang
  • Publication number: 20050002126
    Abstract: A CPP spin-valve element formed on a substrate including a free layer structure including at least one ferromagnetic layer and a pinned layer structure including at least one ferromagnetic layer. The free layer is magnetically softer than the pinned layer. A thin non-magnetic spacer layer structure configured to separate the free layer and the pinned layer is provided in order to prevent a magnetic coupling between the free and pinned layer structures, and to allow an electric current to go there through. At least two current-confining (CC) layer structures including at least two parts having significantly different current conductivities are incorporated therein.
    Type: Application
    Filed: July 3, 2003
    Publication date: January 6, 2005
    Applicants: THE UNIVERSITY OF ALABAMA, FUJITSU LIMITED
    Inventors: Hideo Fujiwara, Keiichi Nagasaka, Tong Zhao, William Bulter, Julian Velev, Amrit Bandyopadhyay
  • Patent number: 6781905
    Abstract: A pair of serial data signals having reciprocal signal levels are detected when a voltage of one of the serial data signals becomes larger than a voltage of the other serial data signal that is provided with an offset by a differential amplification circuit included in a signal detection circuit unit. A differential amplification circuit unit provides an offset for one of different predetermined constant voltages supplied thereto, and outputs signals by performing a differential amplification to the different constant voltages. An offset control circuit unit controls the offset provided by the differential amplification circuit unit so that voltages of the signals output by the differential amplification circuit unit coincide, and correspondingly controls the offset provided by the differential amplification circuit included in the signal detection circuit unit.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: August 24, 2004
    Assignee: Ricoh Company, Ltd.
    Inventor: Hideo Fujiwara
  • Publication number: 20040150138
    Abstract: A disk-shape resin molded article such as a gear comprises a rim, a boss, a web having a disk configuration for connecting the rim and the boss, and gear teeth formed on the rim. The molded article is produced by an injection-compression molding process which comprises injecting a molten resin into a cavity of a metal mold, and pressing a web site and at least one site selected from the group consisting of a boss site and a rim site in a thickness direction. The cavity may have a capacity larger than the solidified products by contraction amount of the injected molten resin.
    Type: Application
    Filed: January 16, 2004
    Publication date: August 5, 2004
    Applicant: Tigers Polymer Corporation
    Inventors: Kiyofumi Hiroi, Hideo Fujiwara, Hidehisa Matsuo, Yasuhiro Yao
  • Patent number: 6735730
    Abstract: A test controller 4 has a test plan generating unit 11 for generating a test plan of a data path 2 which is formed to have a fixed control testability in which a test plan constituted by three phases, that is, the propagation of a test vector to a data input, the execution of a test and the propagation of an output response is present for each test object module. Thus, an integrated circuit is capable of supplying a test plan as a time series of a control signal to a control input of a data path, shortening a test execution time and generating the test plan at the normal operation speed of the circuit, thereby carrying out a test at an actual operation speed and an integrated circuit designing method.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: May 11, 2004
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Hideo Fujiwara, Toshimitsu Masuzawa, Satoshi Ohtake
  • Publication number: 20030179016
    Abstract: A pair of serial data signals having reciprocal signal levels are detected when a voltage of one of the serial data signals becomes larger than a voltage of the other serial data signal that is provided with an offset by a differential amplification circuit included in a signal detection circuit unit. A differential amplification circuit unit provides an offset for one of different predetermined constant voltages supplied thereto, and outputs signals by performing a differential amplification to the different constant voltages. An offset control circuit unit controls the offset provided by the differential amplification circuit unit so that voltages of the signals output by the differential amplification circuit unit coincide, and correspondingly controls the offset provided by the differential amplification circuit included in the signal detection circuit unit.
    Type: Application
    Filed: February 19, 2003
    Publication date: September 25, 2003
    Applicant: Ricoh Company, Ltd.
    Inventor: Hideo Fujiwara
  • Patent number: 6560077
    Abstract: A spin-valve device of a CPP structure which has a high resistance, and which generates a high output signal with low current. The CPP spin-valve device including a spin-valve element having a substrate and a layered structure formed on the substrate. The layered structure includes a first thin film layer of ferromagnetic material, a second thin film layer of ferromagnetic material, and a thin non-magnetic layer structure separating the first and second layers. One of the first and second thin film layers is defined as a free layer and the other layer is defined as a pinned layer, where the free layer has a direction of magnetization that is easier to change than a direction of magnetization of the pinned layer by application of a magnetic field. The non-magnetic layer structure includes a conducting part and insulating part, with the conduction part having an area that is smaller than an area of the free layer.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: May 6, 2003
    Assignee: The University of Alabama
    Inventors: Hideo Fujiwara, Gary J. Mankey
  • Publication number: 20020054461
    Abstract: A spin-valve device of a CPP structure which has a high resistance, and which generates a high output signal with a low current. The CPP spin-valve device including a spin-valve element having a substrate and a layered structure formed on the substrate. The layered structure includes a first thin film layer of ferromagnetic material, a second thin film layer of ferromagnetic material, and a thin non-magnetic layer structure separating the first and second layers. One of the first and second thin film layers is defined as a free layer and the other layers is defined as a pinned layer, where the free layer has a direction of magnetization that is easier to change than a direction of magnetization of the pinned layer by application of a magnetic field. The non-magnetic layer structure includes a conducting part and insulating part, with the conducting part having an area that is smaller than an area of the free layer.
    Type: Application
    Filed: January 10, 2000
    Publication date: May 9, 2002
    Inventors: Hideo Fujiwara, Gary J. Mankey
  • Publication number: 20020051860
    Abstract: A disk-shape resin molded article such as a gear comprises a rim, a boss, a web having a disk configuration for connecting the rim and the boss, and gear teeth formed on the rim. The molded article is produced by an injection-compression molding process which comprises injecting a molten resin into a cavity of a metal mold, and pressing a web site and at least one site selected from the group consisting of a boss site and a rim site in a thickness direction. The cavity may have a capacity larger than the solidified products by contraction amount of the injected molten resin.
    Type: Application
    Filed: October 26, 2001
    Publication date: May 2, 2002
    Inventors: Kiyofumi Hiroi, Hideo Fujiwara, Hidehisa Matsuo, Yasuhiro Yao
  • Patent number: 6334200
    Abstract: Apparatus for testing integrated circuits containing a controller or other sequential circuit at actual operating speed while minimizing the length of the test sequence and achieving high fault coverage are provided. The states of a state register are assumed controllable and observable, and a set of test patterns is obtained for a combinational circuit not containing said state register. An invalid-state generation logic circuit is added for generating invalid states, which are states contained in the generated test patterns but cannot be set by a normal transition from the reset state. A multiplexer is added for selecting the output of a next-state generation logic circuit or the invalid-state generation logic circuit for input to the state register based on a state transition mode selection signal. Signals corresponding to pseudo-primary outputs during test generation are made observable, and the multiplexer output signal is externally detectable as a state output signal.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: December 25, 2001
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Hideo Fujiwara, Toshimitsu Masuzawa, Satoshi Ohtake
  • Patent number: 6292915
    Abstract: The invention provides a method of design for testability at RTL which can guarantee high fault coverage and a method of test sequence generation for easily generating test sequences for an RTL circuit which is designed to be easily testable by the method of design for testability. In the RTL circuit, scannable registers are selected so that the RTL circuit can attain an easily testable circuit structure such as an acyclic structure. This RTL circuit is timeframe expanded on the basis of a predetermined evaluation function and logically synthesized, so as to generate a timeframe expanded combinational circuit, that is, a gate level timeframe expanded circuit, as a circuit for test sequence generation.
    Type: Grant
    Filed: January 21, 1998
    Date of Patent: September 18, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshinori Hosokawa, Tomoo Inoue, Hideo Fujiwara
  • Patent number: 5965286
    Abstract: A magneto-optical recording medium having a thin film, with suitable thermal conductivity, laminated on a magneto-optical film having excellent durability to repeated recording, reproducing and erasing comprising one layer or a multi-layer of thin film containing at least a magneto-optical recording film and carried on a transparent substrate, a ferromagnetic reflection film having a reflectance to a reproduction beam of 70% or higher and a thermal conductivity at a normal temperature from 0.05 to 2.0 W/cm.deg laminated on the backside of the magneto-optical recording film viewed from the transparent substrate side and, optionally, a heat control layer having a thermal conductivity at a normal temperature of 0.1 to 2.0 W/cm.deg laminated on the backside of the magneto-optical film.
    Type: Grant
    Filed: February 3, 1997
    Date of Patent: October 12, 1999
    Assignee: Hitachi Maxell, Ltd.
    Inventors: Satoru Ohnuki, Katsusuke Shimazaki, Norio Ohta, Hideo Fujiwara, Masafumi Yoshihiro, Noriyuki Ogihara, Yukinori Yamada
  • Patent number: 5783320
    Abstract: Disclosed is a magneto-optical recording medium which comprises a transparent substrate and, provided on the substrate, a magneto-optical recording film comprising a perpendicular magnetic film based on rare earth metal-transition metal and an auxiliary magnetic film having spontaneous magnetization which exerts, between itself and the magneto-optical recording film, an exchange coupling force on each other and in which the auxiliary magnetic film used is a magnetic film which readily rotates its magnetization direction toward the external magnetic field in the neighborhood of the Curie temperature of the magneto-optical recording film and has a squareness ratio of not more than 1 in the neighborhood of the Curie temperature, and a process for producing the magneto-optical recording medium.
    Type: Grant
    Filed: January 10, 1997
    Date of Patent: July 21, 1998
    Assignee: Hitachi Maxell, Ltd.
    Inventors: Katsusuke Shimazaki, Satoru Ohnuki, Masatoshi Hashimoto, Yoshinori Shirai, Norio Ohta, Hideo Fujiwara, Masafumi Yoshihiro, Yukinori Yamada, Eiji Koyama, Hitoshi Furusho
  • Patent number: 5737273
    Abstract: A state control portion causes a sense amplifier portion to be at an active state and for causing the sense amplifier to be at an inactive state. A feedback portion causes the control device to causing the sense amplifier portion to be in the inactive state when a path is formed between a power source and a ground in the sense amplifier. A latch portion holds an output of the sense amplifier output when the path is formed. The state control portion comprises a first transistor acting as a switching device. The feedback portion produces a control signal using an output of the sense amplifier portion and a clock signal obtained from a detection circuit, and supplies the control signal to the first transistor. A second transistor for precharging is connected between the first transistor and the power source.
    Type: Grant
    Filed: April 5, 1996
    Date of Patent: April 7, 1998
    Assignee: Ricoh Company, Ltd.
    Inventors: Hideo Fujiwara, Seiji Yamanaka, Toshihisa Nagata, Hiizu Okubo
  • Patent number: 5729499
    Abstract: A state control portion causes a sense amplifier portion to be at an active state and for causing the sense amplifier to be at an inactive state. A feedback portion causes the control device to causing the sense amplifier portion to be in the inactive state when a path is formed between a power source and a ground in the sense amplifier. A latch portion holds an output of the sense amplifier output when the path is formed. The state control portion comprises a first transistor acting as a switching device. The feedback portion produces a control signal using an output of the sense amplifier portion and a clock signal obtained from a detection circuit, and supplies the control signal to the first transistor. A second transistor for precharging is connected between the first transistor and the power source.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: March 17, 1998
    Assignee: Ricoh Company, Ltd.
    Inventors: Hideo Fujiwara, Seiji Yamanaka, Toshihisa Nagata, Hiizu Okubo
  • Patent number: 5648885
    Abstract: A spin-valve read head of the giant magnetoresistive type in a data storage system has at least one magnetic thin film layer comprising a plurality of magnetic thinner film layers of ferromagnetic material with the same crystal plane orientation from one magnetic thinner film to another, and an interface between adjacent magnetic thinner films having a discontinuity in single-crystal epitaxial growth. Each magnetic thinner film layer is composed of an alloy including each of Fe, Ni and Co and has a weight ratio of Co:Fe equal to 90:10. The crystal has a crystal structure that is face centered cubic and a crystal plane orientation (111) that is highly ordered. The interfaces may be layers of Ni or Cu. The layers all exhibit a condition of magnetic orientation and annealed structure resulting from being annealed and cooled in a magnetic field sufficiently to have an anisotropic energy of the first magnetic thin film layer in an equilibrium state that is smaller than an identical structure before annealing.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: July 15, 1997
    Assignees: Hitachi, Ltd., Victor Company of Japan, Ltd., University of Alabama
    Inventors: Koichi Nishioka, Hideo Fujiwara, Takayuki Iseki
  • Patent number: 5639547
    Abstract: A magnetic lamination including at least a first magnetic film, a second magnetic film and, a third magnetic film, a first intervening intermediate film intervening between the first and second magnetic films, and a second intervening intermediate film intervening between the second and third magnetic films, wherein the respective magnetic films each comprise a magnetically soft film, the first and second intervening films differ in thickness, and one of the first and second intervening films can have a zero thickness and further, the intervening intermediate film can include a transition metal and a substance which is likely to form a heterogeneous mixture with the transition metal.
    Type: Grant
    Filed: April 9, 1993
    Date of Patent: June 17, 1997
    Assignees: Hitachi Maxell, Ltd., Hitachi Ltd.
    Inventors: Katsuya Mitsuoka, Yutaka Sugita, Hideo Fujiwara