Patents by Inventor Hideo Kido

Hideo Kido has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12047699
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: July 23, 2024
    Assignee: Sony Group Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Publication number: 20240047504
    Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; a plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
    Type: Application
    Filed: September 14, 2023
    Publication date: February 8, 2024
    Applicant: SONY GROUP CORPORATION
    Inventors: Taiichiro WATANABE, Akihiro YAMADA, Hideo KIDO, Hiromasa SAITO, Keiji MABUCHI, Yuko OHGISHI
  • Publication number: 20240006457
    Abstract: The present technology relates to a solid-state imaging device and an electronic device capable of improving a saturation characteristic. A photo diode is formed on a substrate, and a floating diffusion accumulates a signal charge read from the photo diode. A plurality of vertical gate electrodes is formed from a surface of the substrate in a depth direction in a region between the photo diode and the floating diffusion, and an overflow path is formed in a region interposed between a plurality of vertical gate electrodes. The present technology may be applied to a CMOS image sensor.
    Type: Application
    Filed: September 15, 2023
    Publication date: January 4, 2024
    Applicant: SONY GROUP CORPORATION
    Inventor: Hideo KIDO
  • Patent number: 11863892
    Abstract: An imaging unit having a superior phase-difference detection characteristic is provided. The imaging unit includes two or more image-plane phase-difference detection pixels each including a semiconductor layer, a photoelectric converter, a charge holding section, a first light-blocking film, and a second light-blocking film. The semiconductor layer includes a front surface and a back surface on an opposite side to the front surface. The photoelectric converter is provided in the semiconductor layer, and is configured to generate electric charge corresponding to a light reception amount by photoelectric conversion. The charge holding section is provided between the front surface and the photoelectric converter in the semiconductor layer, and is configured to hold the electric charge. The first light-blocking film is positioned between the photoelectric converter and the charge holding section, and has an opening through which the electric charge is allowed to pass.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: January 2, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideo Kido, Takashi Machida
  • Patent number: 11817473
    Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: November 14, 2023
    Assignee: SONY GROUP CORPORATION
    Inventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
  • Patent number: 11798962
    Abstract: The present technology relates to a solid-state imaging device and an electronic device that can expand a dynamic range in a pixel having a high-sensitivity pixel and a low-sensitivity pixel. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is arranged in a two-dimensional manner, in which the pixel includes a first photoelectric conversion unit and a second photoelectric conversion unit having lower sensitivity than the first photoelectric conversion unit, and a size of the second photoelectric conversion unit in an optical axis direction in which light enters is smaller than a size of the first photoelectric conversion unit in the optical axis direction. The present technology can be applied to a backside-illumination CMOS image sensor, for example.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: October 24, 2023
    Assignee: SONY CORPORATION
    Inventors: Hideo Kido, Masahiro Tada, Takahiro Toyoshima, Yasushi Tateshita, Hikaru Iwata
  • Patent number: 11791366
    Abstract: The present technology relates to a solid-state imaging device and an electronic device capable of improving a saturation characteristic. A photo diode is formed on a substrate, and a floating diffusion accumulates a signal charge read from the photo diode. A plurality of vertical gate electrodes is formed from a surface of the substrate in a depth direction in a region between the photo diode and the floating diffusion, and an overflow path is formed in a region interposed between a plurality of vertical gate electrodes. The present technology may be applied to a CMOS image sensor.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: October 17, 2023
    Assignee: SONY GROUP CORPORATION
    Inventor: Hideo Kido
  • Publication number: 20230269500
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Application
    Filed: January 4, 2023
    Publication date: August 24, 2023
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Publication number: 20230254608
    Abstract: Provided is an imaging device capable of suppressing deterioration in characteristics. The imaging device includes a first substrate portion and a second substrate portion on one surface side of the first substrate portion. The first substrate portion includes a sensor pixel, a first interlayer insulating film, and a first electrode portion. The second substrate portion includes a readout circuit, a second interlayer insulating film, and a second electrode portion. The first electrode portion and the second electrode portion are directly joined to each other. The second semiconductor substrate includes a first element region in which an amplification transistor is provided, a second element region in which another element is provided, and a through region through which the second semiconductor substrate passes in the thickness direction. The first element region and the second element region are isolated by the through region.
    Type: Application
    Filed: May 17, 2021
    Publication date: August 10, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kyosuke YAMADA, Atsuhiko YAMAMOTO, Takashi MACHIDA, Hideo KIDO, Ryo FUKUI, Yu SHIIHARA
  • Patent number: 11595610
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: February 28, 2023
    Assignee: Sony Group Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Publication number: 20220415961
    Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
    Type: Application
    Filed: September 2, 2022
    Publication date: December 29, 2022
    Applicant: Sony Group Corporation
    Inventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
  • Publication number: 20220415945
    Abstract: A solid-state imaging device includes a light-receiving surface, a plurality of pixels each including a photoelectric conversion section that photoelectrically converts light incident through the light-receiving surface, and a separation section that electrically and optically separates each photoelectric conversion section. Each of the pixels includes a charge-holding section that holds charges transferred from the photoelectric conversion section, a transfer transistor that includes a vertical gate electrode reaching the photoelectric conversion section, and transfers charges from the photoelectric conversion section to the charge-holding section, and a light-blocking section disposed in a layer between the photoelectric conversion section and the charge-holding section. A plurality of the vertical gate electrodes are electrically coupled together in a plurality of first pixels adjacent to each other among the plurality of pixels.
    Type: Application
    Filed: November 17, 2020
    Publication date: December 29, 2022
    Inventors: YUSUKE MATSUMURA, TAKASHI MACHIDA, HIDEO KIDO, RYO FUKUI, YU SHIIHARA
  • Patent number: 11489001
    Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: November 1, 2022
    Assignee: SONY CORPORATION
    Inventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
  • Publication number: 20220328546
    Abstract: A solid-state imaging device includes: a first photodiode made up of a first first-electroconductive-type semiconductor region formed on a first principal face side of a semiconductor substrate, and a first second-electroconductive-type semiconductor region formed within the semiconductor substrate adjacent to the first first-electroconductive-type semiconductor region; a second photodiode made up of a second first-electroconductive-type semiconductor region formed on a second principal face side of the semiconductor substrate, and a second second-electroconductive-type semiconductor region formed within the semiconductor substrate adjacent to the second first-electroconductive-type semiconductor region; and a gate electrode formed on the first principal face side of the semiconductor substrate; with impurity concentration of a connection face between the second first-electroconductive-type semiconductor region and the second second-electroconductive-type semiconductor region being equal to or greater than im
    Type: Application
    Filed: March 25, 2022
    Publication date: October 13, 2022
    Inventors: HIDEO KIDO, TAKAYUKI ENOMOTO, HIDEAKI TOGASHI
  • Publication number: 20220303489
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Application
    Filed: June 7, 2022
    Publication date: September 22, 2022
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 11394914
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: July 19, 2022
    Assignee: Sony Group Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 11343452
    Abstract: A solid-state imaging device includes a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels including a plurality of photoelectric conversion units, a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, and a plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: May 24, 2022
    Assignee: SONY CORPORATION
    Inventors: Hiroaki Ishiwata, Hideo Kido, Norihiro Kubo, Tetsuya Uchida
  • Patent number: 11343451
    Abstract: A solid-state imaging device includes a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels including a plurality of photoelectric conversion units, a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, and a plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: May 24, 2022
    Assignee: SONY CORPORATION
    Inventors: Hiroaki Ishiwata, Hideo Kido, Norihiro Kubo, Tetsuya Uchida
  • Publication number: 20220150428
    Abstract: An imaging unit having a superior phase-difference detection characteristic is provided. The imaging unit includes two or more image-plane phase-difference detection pixels each including a semiconductor layer, a photoelectric converter, a charge holding section, a first light-blocking film, and a second light-blocking film. The semiconductor layer includes a front surface and a back surface on an opposite side to the front surface. The photoelectric converter is provided in the semiconductor layer, and is configured to generate electric charge corresponding to a light reception amount by photoelectric conversion. The charge holding section is provided between the front surface and the photoelectric converter in the semiconductor layer, and is configured to hold the electric charge. The first light-blocking film is positioned between the photoelectric converter and the charge holding section, and has an opening through which the electric charge is allowed to pass.
    Type: Application
    Filed: March 11, 2020
    Publication date: May 12, 2022
    Inventors: HIDEO KIDO, TAKASHI MACHIDA
  • Patent number: 11315968
    Abstract: A solid-state imaging device includes: a first photodiode made up of a first first-electroconductive-type semiconductor region formed on a first principal face side of a semiconductor substrate, and a first second-electroconductive-type semiconductor region formed within the semiconductor substrate adjacent to the first first-electroconductive-type semiconductor region; a second photodiode made up of a second first-electroconductive-type semiconductor region formed on a second principal face side of the semiconductor substrate, and a second second-electroconductive-type semiconductor region formed within the semiconductor substrate adjacent to the second first-electroconductive-type semiconductor region; and a gate electrode formed on the first principal face side of the semiconductor substrate; with impurity concentration of a connection face between the second first-electroconductive-type semiconductor region and the second second-electroconductive-type semiconductor region being equal to or greater than im
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: April 26, 2022
    Assignee: SONY CORPORATION
    Inventors: Hideo Kido, Takayuki Enomoto, Hideaki Togashi