Patents by Inventor Hideo Nakagoshi
Hideo Nakagoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240138066Abstract: An upper circuit board body has a first upper main surface and a first lower main surface. A lower circuit board body has a second upper main surface and a second lower main surface. A lower circuit board first mounting electrode and one or more lower circuit board second mounting electrodes are disposed on the second upper main surface. A first component is mounted on the one or more lower circuit board second mounting electrodes. A first conductor member is mounted on the lower circuit board first mounting electrode and is disposed on the left of the first component. A second conductor member is disposed on the first lower main surface, is connected to the upper end of the first conductor member, and overlaps at least a part of the first component as viewed in the downward direction.Type: ApplicationFiled: October 9, 2023Publication date: April 25, 2024Inventors: Yoshihito OTSUBO, Hideo NAKAGOSHI, Hiroki YOSHIMORI
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Publication number: 20230335451Abstract: An electronic component package includes: a resin portion having a first surface; one or more electronic components each having a plurality of external electrodes; and a plurality of extraction electrodes electrically connected to the plurality of external electrodes. Only each of the plurality of extraction electrodes is exposed from the resin portion on the first surface. The plurality of external electrodes are covered with the resin portion.Type: ApplicationFiled: June 12, 2023Publication date: October 19, 2023Inventors: Takamitsu NAKAMURA, Hideo NAKAGOSHI, Kensuke OTAKE, Hiroki YOSHIMORI
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Publication number: 20230309230Abstract: The present disclosure is directed to an electronic component module including: a substrate; an electronic component mounted on the substrate; and a sub-module mounted on the substrate, the sub-module including a wiring board, a first electronic component disposed on one of two main surfaces of the wiring board, a second electronic component disposed on the other of the two main surfaces of the wiring board, and a first sealing member that covers the wiring board, the first electronic component, and the second electronic component.Type: ApplicationFiled: April 11, 2023Publication date: September 28, 2023Inventors: Tsuyoshi TAKAKURA, Yoshihito OTSUBO, Tadashi NOMURA, Hideo NAKAGOSHI
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Publication number: 20230230907Abstract: A substrate structure comprises a substrate having a first surface, a first electrode disposed on the first surface, a bump connected to the first electrode, and a protective member that covers the first surface and covers a portion of the bump. The protective member has an opening. The bump includes a portion exposed through the opening. The bump includes a first portion that is connected to the first electrode, and a second portion that is located farther from the first electrode than the first portion and is connected to the first portion. The bump has a constriction at a boundary between the first portion and the second portion. When viewed in a direction perpendicular to the first surface, a maximum diameter of the second portion is smaller than a maximum diameter of the first portion.Type: ApplicationFiled: March 23, 2023Publication date: July 20, 2023Inventors: Tsuyoshi TAKAKURA, Ryoichi KITA, Hideo NAKAGOSHI, Hiroki YOSHIMORI, Tadashi NOMURA, Yoshihito OTSUBO
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Patent number: 10861683Abstract: A vacuum device includes a processing target placement unit that is arranged inside a vacuum chamber and a vacuum evacuation unit that is connected to the vacuum chamber. The processing target placement unit has one main surface on which processing targets are placed and a side surface that is connected to the one main surface. The processing target placement unit is provided with a plurality of grooves that have openings at the one main surface. When the processing target placement unit is viewed from the one main surface side thereof, the smallest width of the opening of each groove in the one main surface is equal to or less than half the smallest width of the processing target.Type: GrantFiled: February 8, 2017Date of Patent: December 8, 2020Assignee: Murata Manufacturing Co., Ltd.Inventors: Issei Yamamoto, Atsushi Shimizu, Yoichi Takagi, Hideo Nakagoshi, Toru Komatsu, Hideki Shinkai, Tetsuya Oda
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Patent number: 10559535Abstract: The present disclosure improves the adhesive strength of a shield film in a high-frequency module that includes a shield film that shields components from unwanted electromagnetic waves from the outside. A high-frequency module is provided with: a sealing body that includes a multilayer wiring substrate, components that are mounted on an upper surface of the multilayer wiring substrate, and a sealing resin layer that is stacked on the upper surface of the multilayer wiring substrate and covers the components; and a shield film that covers a surface of the sealing resin layer. A side surface of the sealing body has curved surface portions formed so as to have a curved surface shape, and the curved surface portions are roughened with a plurality of grooves.Type: GrantFiled: February 9, 2018Date of Patent: February 11, 2020Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Yoshihito Otsubo, Yoshihisa Masuda, Hideo Nakagoshi, Yuta Morimoto, Norio Sakai, Yoriyuki Matsumoto, Hiroaki Tsuchida
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Patent number: 10256195Abstract: A module includes a wiring board, a plurality of components mounted on an upper surface of the wiring board, a sealing resin layer which seals the components provided on the upper surface of the wiring board, and a shield layer provided so as to cover a surface of the sealing resin layer. The shield layer includes an adhesion layer which is stacked on the surface of the sealing resin layer and includes a first adhesion film composed of a metal selected from the group consisting of Ti, Cr, Ni, TiCr, TiAl, NiAl, CrAl, and CrNiAl, a conductive layer which is stacked on the adhesion layer, and a protective layer which is stacked on the conductive layer and includes a protective film composed of a nitride, oxide, or oxynitride of a metal selected from the group consisting of Ti, Cr, Ni, TiCr, TiAl, NiAl, CrAl, and CrNiAl.Type: GrantFiled: December 19, 2017Date of Patent: April 9, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Issei Yamamoto, Atsushi Shimizu, Yoichi Takagi, Hideo Nakagoshi
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Publication number: 20180166394Abstract: The present disclosure improves the adhesive strength of a shield film in a high-frequency module that includes a shield film that shields components from unwanted electromagnetic waves from the outside. A high-frequency module is provided with: a sealing body that includes a multilayer wiring substrate, components that are mounted on an upper surface of the multilayer wiring substrate, and a sealing resin layer that is stacked on the upper surface of the multilayer wiring substrate and covers the components; and a shield film that covers a surface of the sealing resin layer. A side surface of the sealing body has curved surface portions formed so as to have a curved surface shape, and the curved surface portions are roughened with a plurality of grooves.Type: ApplicationFiled: February 9, 2018Publication date: June 14, 2018Inventors: Yoshihito OTSUBO, Yoshihisa MASUDA, Hideo NAKAGOSHI, Yuta MORIMOTO, Norio SAKAI, Yoriyuki MATSUMOTO, Hiroaki TSUCHIDA
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Publication number: 20180108618Abstract: A module includes a wiring board, a plurality of components mounted on an upper surface of the wiring board, a sealing resin layer which seals the components provided on the upper surface of the wiring board, and a shield layer provided so as to cover a surface of the sealing resin layer. The shield layer includes an adhesion layer which is stacked on the surface of the sealing resin layer and includes a first adhesion film composed of a metal selected from the group consisting of Ti, Cr, Ni, TiCr, TiAl, NiAl, CrAl, and CrNiAl, a conductive layer which is stacked on the adhesion layer, and a protective layer which is stacked on the conductive layer and includes a protective film composed of a nitride, oxide, or oxynitride of a metal selected from the group consisting of Ti, Cr, Ni, TiCr, TiAl, NiAl, CrAl, and CrNiAl.Type: ApplicationFiled: December 19, 2017Publication date: April 19, 2018Inventors: Issei Yamamoto, Atsushi Shimizu, Yoichi Takagi, Hideo Nakagoshi
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Publication number: 20170250061Abstract: A vacuum device includes a processing target placement unit that is arranged inside a vacuum chamber and a vacuum evacuation unit that is connected to the vacuum chamber. The processing target placement unit has one main surface on which processing targets are placed and a side surface that is connected to the one main surface. The processing target placement unit is provided with a plurality of grooves that have openings at the one main surface. When the processing target placement unit is viewed from the one main surface side thereof, the smallest width of the opening of each groove in the one main surface is equal to or less than half the smallest width of the processing target.Type: ApplicationFiled: February 8, 2017Publication date: August 31, 2017Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Issei YAMAMOTO, Atsushi SHIMIZU, Yoichi TAKAGI, Hideo NAKAGOSHI, Toru KOMATSU, Hideki SHINKAI, Tetsuya ODA
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Patent number: 9414513Abstract: A plating layer of a Cu-M-based alloy (M represents Ni and/or Mn) is formed on an end surface of a connection terminal member at an exposed side, the Cu-M-based alloy being capable of generating an intermetallic compound with an Sn-based low-melting-point metal contained in a bonding material forming a bonding portion and having a lattice constant different from that of the intermetallic compound by 50% or more. In the reflow process, even if the bonding material is about to flow out by re-melting thereof, since the bonding material is brought into contact with the Cu-M-based plating layer, a high-melting-point alloy of the intermetallic compound is formed so as to block the interface between the connection terminal member and the resin layer.Type: GrantFiled: December 19, 2014Date of Patent: August 9, 2016Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Hideo Nakagoshi, Yoichi Takagi, Nobuaki Ogawa, Hidekiyo Takaoka, Kosuke Nakono, Akihiko Kamada, Masaaki Mizushiro
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Patent number: 9276194Abstract: A bonding method that provides excellent conductivity and bonding between a piezoelectric body and a metal plate includes a metal plate and an electrode of a piezoelectric body bonded to one another with an electrically conductive adhesive so as to provide electrical conductivity, the electrically conductive adhesive includes carbon black with a nano-level average particle size, and has a paste form included in a solventless or solvent-based resin so that the carbon black forms an aggregate with an average particle size of about 1 ?m to about 50 ?m. The electrically conductive adhesive is applied between the metal plate and the electrode of the piezoelectric body, and the metal plate and the piezoelectric body are subjected to heating and pressurization so that the carbon black aggregate is deformed, thereby hardening the electrically conductive adhesive.Type: GrantFiled: June 19, 2013Date of Patent: March 1, 2016Assignee: Murata Manufacturing Co., Ltd.Inventors: Hiroki Kitayama, Hideo Nakagoshi, Kiyoshi Kurihara
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Patent number: 9113571Abstract: In a bond portion between an electrical conductive land and a connection terminal member, an intermetallic compound producing region in which at least a Cu—Sn-based, an M-Sn-based (M indicates Ni and/or Mn), and a Cu-M-Sn-based intermetallic compound are produced is arranged so as to be present at a connection terminal member side. In this intermetallic compound producing region, when a cross section of the bond portion is equally defined into 10 boxes in a longitudinal direction and a lateral direction to define 100 boxes in total, a ratio of the number of boxes in each of which at least two types of intermetallic compounds having different constituent elements are present to the total number of boxes other than boxes in each of which only a Sn-based metal component is present is about 70% or more.Type: GrantFiled: June 18, 2013Date of Patent: August 18, 2015Assignee: Murata Manufacturing Co., Ltd.Inventors: Hideo Nakagoshi, Yoichi Takagi, Nobuaki Ogawa, Hidekiyo Takaoka, Kosuke Nakano
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Publication number: 20150103495Abstract: A plating layer of a Cu—M-based alloy (M represents Ni and/or Mn) is formed on an end surface of a connection terminal member at an exposed side, the Cu—M-based alloy being capable of generating an intermetallic compound with an Sn-based low-melting-point metal contained in a bonding material forming a bonding portion and having a lattice constant different from that of the intermetallic compound by 50% or more. In the reflow process, even if the bonding material is about to flow out by re-melting thereof, since the bonding material is brought into contact with the Cu—M-based plating layer, a high-melting-point alloy of the intermetallic compound is formed so as to block the interface between the connection terminal member and the resin layer.Type: ApplicationFiled: December 19, 2014Publication date: April 16, 2015Inventors: Hideo Nakagoshi, Yoichi Takagi, Nobuaki Ogawa, Hidekiyo Takaoka, Kosuke Nakono, Akihiko Kamada, Masaaki Mizushiro
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Patent number: 8726494Abstract: An elastic material, in which at least the surface thereof is adhesive and conductive, is provided on a plate, and while a substrate constituting a component of an electronic part is held on the surface of the elastic material by the adhesiveness of the elastic material, an element such as a semiconductor chip is mounted at a fixed location on the substrate.Type: GrantFiled: October 6, 2009Date of Patent: May 20, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Akio Katsube, Hideo Nakagoshi, Hidemasa Kawai
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Publication number: 20130343023Abstract: In a bond portion between an electrical conductive land and a connection terminal member, an intermetallic compound producing region in which at least a Cu—Sn-based, an M-Sn-based (M indicates Ni and/or Mn), and a Cu-M-Sn-based intermetallic compound are produced is arranged so as to be present at a connection terminal member side. In this intermetallic compound producing region, when a cross section of the bond portion is equally defined into 10 boxes in a longitudinal direction and a lateral direction to define 100 boxes in total, a ratio of the number of boxes in each of which at least two types of intermetallic compounds having different constituent elements are present to the total number of boxes other than boxes in each of which only a Sn-based metal component is present is about 70% or more.Type: ApplicationFiled: June 18, 2013Publication date: December 26, 2013Inventors: Hideo NAKAGOSHI, Yoichi TAKAGI, Nobuaki OGAWA, Hidekiyo TAKAOKA, Kosuke NAKANO
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Publication number: 20130276977Abstract: A bonding structure that provides excellent conductivity and bonding between a piezoelectric body and a metal plate includes a metal plate and an electrode of a piezoelectric body bonded to one another with an electrically conductive adhesive so as to provide electrical conductivity, the electrically conductive adhesive includes carbon black with a nano-level average particle size, and has a paste form included in a solventless or solvent-based resin so that the carbon black forms an aggregate with an average particle size of about 1 ?m to about 50 ?m. The electrically conductive adhesive is applied between the metal plate and the electrode of the piezoelectric body, and the metal plate and the piezoelectric body are subjected to heating and pressurization so that the carbon black aggregate is deformed, thereby hardening the electrically conductive adhesive.Type: ApplicationFiled: June 19, 2013Publication date: October 24, 2013Inventors: Hiroki KITAYAMA, Hideo NAKAGOSHI, Kiyoshi KURIHARA
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Patent number: 8492959Abstract: A bonding structure that provides excellent conductivity and bonding between a piezoelectric body and a metal plate includes a metal plate and an electrode of a piezoelectric body bonded to one another with an electrically conductive adhesive so as to provide electrical conductivity, the electrically conductive adhesive includes carbon black with a nano-level average particle size, and has a paste form included in a solventless or solvent-based resin so that the carbon black forms an aggregate with an average particle size of about 1 ?m to about 50 ?m. The electrically conductive adhesive is applied between the metal plate and the electrode of the piezoelectric body, and the metal plate and the piezoelectric body are subjected to heating and pressurization so that the carbon black aggregate is deformed, thereby hardening the electrically conductive adhesive.Type: GrantFiled: December 27, 2011Date of Patent: July 23, 2013Assignee: Murata Manufacturing Co., Ltd.Inventors: Hiroki Kitayama, Hideo Nakagoshi, Kiyoshi Kurihara
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Publication number: 20120091863Abstract: A bonding structure that provides excellent conductivity and bonding between a piezoelectric body and a metal plate includes a metal plate and an electrode of a piezoelectric body bonded to one another with an electrically conductive adhesive so as to provide electrical conductivity, the electrically conductive adhesive includes carbon black with a nano-level average particle size, and has a paste form included in a solventless or solvent-based resin so that the carbon black forms an aggregate with an average particle size of about 1 ?m to about 50 ?m. The electrically conductive adhesive is applied between the metal plate and the electrode of the piezoelectric body, and the metal plate and the piezoelectric body are subjected to heating and pressurization so that the carbon black aggregate is deformed, thereby hardening the electrically conductive adhesive.Type: ApplicationFiled: December 27, 2011Publication date: April 19, 2012Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Hiroki Kitayama, Hideo Nakagoshi, Kiyoshi Kurihara
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Semiconductor device, electronic component module, and method for manufacturing semiconductor device
Patent number: 7928559Abstract: A semiconductor element is provided with a heat dissipating path defined by a non-through hole in a first principal surface and that is filled with a conductive material. The semiconductor element is bonded to a heat sink with the conductive material disposed therebetween. Solder can be used as the conductive material, for example. By introducing molten solder into the non-through hole while having solder disposed between the semiconductor element and the heat sink, the heat dissipating path is provided and the heat sink is bonded to the semiconductor element.Type: GrantFiled: November 25, 2008Date of Patent: April 19, 2011Assignee: Murata Manufacturing Co., Ltd.Inventor: Hideo Nakagoshi