Patents by Inventor Hideo Takagi

Hideo Takagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070273364
    Abstract: A lens position detecting device 200 has a position detecting magnet 202, a magnetic force detecting sensor 204, a positional information generating means 206, etc. The position detecting magnet 202 is mounted on a rear surface of a lens holder frame 1460. The magnetic force detecting sensor 204 serves to generate a detected signal having a magnitude depending on the intensity of a magnetic force generated from the magnetic poles of the position detecting magnet 202. The magnetic force detecting sensor 204 is disposed on a straight line that passes through the position detecting magnet 202 parallel to the optical axis. The magnetic force detecting sensor 204 outputs a detected signal having a voltage corresponding (proportional) to the intensity of the magnetic force. An amplifying circuit 208 of a positional information generating means 206 amplifies the detected signal Ss from the magnetic force detecting sensor 204.
    Type: Application
    Filed: August 18, 2005
    Publication date: November 29, 2007
    Inventors: Tomoya Takei, Toshifumi Takaoka, Hideo Takagi, Yoshikazu Ito, Masanori Hayashi, Tomohiro Yasui, Hideki Yamaoka, Kentaro Tashita
  • Publication number: 20070262374
    Abstract: After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.
    Type: Application
    Filed: July 23, 2007
    Publication date: November 15, 2007
    Applicant: SPANSION LLC
    Inventors: Masahiko Higashi, Manabu Nakamura, Kentaro Sera, Hiroyuki Nansei, Yukihiro Utsuno, Hideo Takagi, Tatsuya Kajita
  • Publication number: 20070187833
    Abstract: Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent element in the process of erasing charges stored in a charge storage part. An oxide coating film is formed on the surface of the metal interconnection at the bonding pad part, and ultraviolet rays are irradiated onto the oxide coating film for erasing of charges from the floating gate.
    Type: Application
    Filed: April 10, 2007
    Publication date: August 16, 2007
    Applicant: Fujitsu Amd Semiconductor Limited
    Inventors: Tatsuya Hashimoto, Toshiyuki Maenosono, Taji Togawa, Takayuki Enda, Hideo Takagi
  • Patent number: 7253046
    Abstract: After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: August 7, 2007
    Assignee: Spansion LLC.
    Inventors: Masahiko Higashi, Manabu Nakamura, Kentaro Sera, Hiroyuki Nansei, Yukihiro Utsuno, Hideo Takagi, Tatsuya Kajita
  • Publication number: 20060228899
    Abstract: After a lower silicon oxide film is formed on a silicon region, a silicon film is formed on the lower silicon oxide film by, for example, a thermal CVD method. Subsequently, the silicon film is completely nitrided by a plasma nitriding method to be replaced by a silicon nitride film. Subsequently, a surface layer of the silicon nitride film is oxidized by a plasma oxidizing method to be replaced by an upper silicon oxide film. An ONO film as a multilayered insulating film composed of the lower silicon oxide film, the silicon nitride film, and the upper silicon oxide film is formed.
    Type: Application
    Filed: May 26, 2006
    Publication date: October 12, 2006
    Applicant: FUJITSU AMD SEMICONDUCTOR LIMITED
    Inventors: Hiroyuki Nansei, Manabu Nakamura, Kentaro Sera, Masahiko Higashi, Yukihiro Utsuno, Hideo Takagi, Tatsuya Kajita
  • Publication number: 20060205731
    Abstract: The present invention relates to an aminopyridine compound represented by the following general formula (I) or a salt thereof and an Syk inhibitor containing the compound or a salt thereof as an active ingredient. Here, X1, X2, X3, Z, Y1, Y2 represent a carbon atom or a nitrogen atom, R, R1, R5, R6 represent a hydrogen atom, an alkyl group, etc., and R7 represents a hydrogen atom, a halogen atom, a nitro group, a cyano group, —CpH2(p-1)(Ra1)(Ra2)—O—Ra3, —C(?O)—Rd1, a 5- or 6-membered saturated heterocyclic group, an aromatic heterocyclic group, —N(Rh1)(Rh2), etc. The aminopyridine compound of the present invention has not only high Syk inhibitory activity but also properties to selectively inhibit Syk.
    Type: Application
    Filed: February 28, 2006
    Publication date: September 14, 2006
    Applicant: JAPAN TOBACCO INC.
    Inventors: Yoshitoshi Kodama, Satoru Noji, Katsuaki Imamura, Ryo Mizojiri, Kenta Aoki, Hideo Takagi, Yuichi Naka, Goro Ito, Kiyotaka Shinoda, Akihito Fujiwara, Kazunori Kurihara, Masaru Tanaka
  • Patent number: 7098147
    Abstract: After a lower silicon oxide film is formed on a silicon region, a silicon film is formed on the lower silicon oxide film by, for example, a thermal CVD method. Subsequently, the silicon film is completely nitrided by a plasma nitriding method to be replaced by a silicon nitride film. Subsequently, a surface layer of the silicon nitride film is oxidized by a plasma oxidizing method to be replaced by an upper silicon oxide film. An ONO film as a multilayered insulating film composed of the lower silicon oxide film, the silicon nitride film, and the upper silicon oxide film is formed.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: August 29, 2006
    Assignee: Fujitsu Amd Semiconductor Limited
    Inventors: Hiroyuki Nansei, Manabu Nakamura, Kentaro Sera, Masahiko Higashi, Yukihiro Utsuno, Hideo Takagi, Tatsuya Kajita
  • Publication number: 20060145242
    Abstract: A silicon nitride film for storing electric charge is formed on a semiconductor substrate while placing a tunnel oxide film in between, and the silicon nitride film is then subjected to hydrogen plasma treatment so as to effectively erase unnecessary charge stored therein during various process steps in fabrication of the semiconductor memory device, to thereby stabilize the threshold voltage (Vth) of the semiconductor memory device.
    Type: Application
    Filed: March 7, 2006
    Publication date: July 6, 2006
    Applicant: FASL LLC
    Inventors: Hideo Takagi, Takayuki Enda, Miyuki Umetsu, Tsukasa Takamatsu
  • Patent number: 7037780
    Abstract: A silicon nitride film for storing electric charge is formed on a semiconductor substrate while placing a tunnel oxide film in between, and the silicon nitride film is then subjected to hydrogen plasma treatment so as to effectively erase unnecessary charge stored therein during various process steps in fabrication of the semiconductor memory device, to thereby stabilize the threshold voltage (Vth) of the semiconductor memory device.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: May 2, 2006
    Assignee: FASL LLC
    Inventors: Hideo Takagi, Takayuki Enda, Miyuki Umetsu, Tsukasa Takamatsu
  • Publication number: 20050224866
    Abstract: After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.
    Type: Application
    Filed: February 25, 2005
    Publication date: October 13, 2005
    Applicant: FASL LLC
    Inventors: Masahiko Higashi, Manabu Nakamura, Kentaro Sera, Hiroyuki Nansei, Yukihiro Utsuno, Hideo Takagi, Tatsuya Kajita
  • Publication number: 20050212035
    Abstract: Tunnel insulating films (3) are formed in element regions demarcated by element isolation insulating films (2). Thereafter, for each memory cell, a floating gate (4) is formed, and an ONO film (5) and a control gate (6) are further formed. Next, a plasma insulating film (7) is formed on surfaces of stacked gates. The plasma insulating film is immune to plane orientation of a base film. Therefore, the entire plasma insulating film (7) has a substantially uniform thickness, and consequently, even if the maximum thickness thereof is not as large as that of a thermal oxide film, hydrogen entrance is prevented when the interlayer insulating film is thereafter formed, and electron leakage is also prevented. The reduction in thickness of this insulating film makes it possible to reduce birds' beaks, and efficiency in erase/write of data can be enhanced.
    Type: Application
    Filed: February 25, 2005
    Publication date: September 29, 2005
    Applicant: FUJITSU AMD SEMICONDUCTOR LIMITED
    Inventors: Yukihiro Utsuno, Manabu Nakamura, Kentaro Sera, Masahiko Higashi, Hiroyuki Nansei, Hideo Takagi, Tatsuya Kajita
  • Publication number: 20050212074
    Abstract: A trench (4) is formed in a semiconductor substrate (1), and then a plasma oxynitride film (5) is formed on a side wall surface and a bottom surface of the trench (4) at a temperature of approximately 300° C. to 650° C. At such a temperature, no outward diffusion of impurities from the semiconductor substrate (1) occurs. Therefore, any problems such as formation of a parasitic transistor hardly occur even when ions of impurities are not implanted thereafter. After the plasma oxynitride film (5) is formed, it is thermally oxidized, and a portion where the outermost surface of the semiconductor substrate (1) meets the wall surface of the trench (4) is turned into a curved surface. As a result, the outermost surface of the semiconductor substrate (1) and the wall surface of the trench (4) meet each other while forming a curved surface, and hence a parasitic transistor is hardly formed at this portion. Consequently, formation of a hump is prevented, thereby achieving favorable characteristics.
    Type: Application
    Filed: February 25, 2005
    Publication date: September 29, 2005
    Applicant: FUJITSU AMD SEMICONDUCTOR LIMITED
    Inventors: Kentaro Sera, Hiroyuki Nansei, Manabu Nakamura, Masahiko Higashi, Yukihiro Utsuno, Hideo Takagi, Tatsuya Kajita
  • Publication number: 20050006672
    Abstract: Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent element in the process of erasing charges stored in a charge storage part. An oxide coating film is formed on the surface of the metal interconnection at the bonding pad part, and ultraviolet rays are irradiated onto the oxide coating film for erasing of charges from the floating gate.
    Type: Application
    Filed: August 12, 2004
    Publication date: January 13, 2005
    Applicant: Fujitsu AMD Semiconductor Limited
    Inventors: Tatsuya Hashimoto, Toshiyuki Maenosono, Taiji Togawa, Takayuki Enda, Hideo Takagi
  • Patent number: 6794248
    Abstract: Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent element in the process of erasing charges stored in a charge storage part. An oxide coating film is formed on the surface of the metal interconnection at the bonding pad part, and ultraviolet rays are irradiated onto the oxide coating film for erasing of charges from the floating gate.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: September 21, 2004
    Assignee: Fujitsu Amd Semiconductor Limited
    Inventors: Tatsuya Hashimoto, Toshiyuki Maenosono, Taiji Togawa, Takayuki Enda, Hideo Takagi
  • Patent number: 6766234
    Abstract: An occupant restraint system comprises a seat belt tension application device; a longitudinal acceleration detector; a lateral acceleration detector; and a control device that controls the tension applied by the seat belt tension application device based upon a longitudinal acceleration detection value and a lateral acceleration detection value and the control device engages the seat belt tension application device to apply the tension to the seat belt if a point on the map determined in conformance to the longitudinal acceleration detection value and the lateral acceleration detection value obtained as the vehicle decelerates is outside a range enclosed by the operation decision-making threshold line and the other axis.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: July 20, 2004
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Hideo Takagi, Hiromichi Ikumo
  • Publication number: 20040110390
    Abstract: A silicon nitride film for storing electric charge is formed on a semiconductor substrate while placing a tunnel oxide film in between, and the silicon nitride film is then subjected to hydrogen plasma treatment so as to effectively erase unnecessary charge stored therein during various process steps in fabrication of the semiconductor memory device, to thereby stabilize the threshold voltage (Vth) of the semiconductor memory device.
    Type: Application
    Filed: November 18, 2003
    Publication date: June 10, 2004
    Applicant: FASL LLC
    Inventors: Hideo Takagi, Takayuki Enda, Miyuki Umetsu, Tsukasa Takamatsu
  • Publication number: 20040082198
    Abstract: A chemical oxide film formed on a semiconductor substrate is formed by wet cleaning using a strongly acidic solution so that the adhesion of impurities to the chemical oxide film can be reduced between a wet cleaning process and an insulation film forming process. This makes it possible to prevent insulation degradation of a gate insulation film when the gate insulation film embracing the chemical oxide film is formed in the insulation film forming process in which low-temperature processing is conducted.
    Type: Application
    Filed: September 11, 2003
    Publication date: April 29, 2004
    Inventors: Manabu Nakamura, Hiroyuki Nansei, Kentaro Sera, Masahiko Higashi, Yukihiro Utsuno, Hideo Takagi, Tatsuya Kajita
  • Publication number: 20040043638
    Abstract: After a lower silicon oxide film is formed on a silicon region, a silicon film is formed on the lower silicon oxide film by, for example, a thermal CVD method. Subsequently, the silicon film is completely nitrided by a plasma nitriding method to be replaced by a silicon nitride film. Subsequently, a surface layer of the silicon nitride film is oxidized by a plasma oxidizing method to be replaced by an upper silicon oxide film. An ONO film as a multilayered insulating film composed of the lower silicon oxide film, the silicon nitride film, and the upper silicon oxide film is formed.
    Type: Application
    Filed: August 20, 2003
    Publication date: March 4, 2004
    Applicant: FUJITSU AMD SEMICONDUCTOR LIMITED
    Inventors: Hiroyuki Nansei, Manabu Nakamura, Kentaro Sera, Masahiko Higashi, Yukihiro Utsuno, Hideo Takagi, Tatsuya Kajita
  • Patent number: 6666292
    Abstract: A rear end collision sensor is designed to detect the possibility of a rear end collision of a vehicle in advance. Upon detection, a controller drives a seat belt system to restrain the head of a seat occupant toward a headrest of the seat or to straighten the spine of the seat occupant to protect the neck against impending impact.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: December 23, 2003
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Hideo Takagi, Chinmoy Pal
  • Publication number: 20030162354
    Abstract: Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent element in the process of erasing charges stored in a charge storage part. An oxide coating film is formed on the surface of the metal interconnection at the bonding pad part, and ultraviolet rays are irradiated onto the oxide coating film for erasing of charges from the floating gate.
    Type: Application
    Filed: October 25, 2002
    Publication date: August 28, 2003
    Applicant: FUJITSU AMD SEMICONDUCTOR LIMITED
    Inventors: Tatsuya Hashimoto, Toshiyuki Maenosono, Taiji Togawa, Takayuki Enda, Hideo Takagi