Abstract: Disclosed are a highly reliable circuit board and a method of stably manufacturing the circuit board, wherein an insulator made from a specific organic insulating material is provided under a highly stressed conductor for preventing occurrence of cracks in the insulator. In addition, a method of correcting a wiring of a ceramic board is additionally adopted. The circuit board includes a thick film wiring board 1 having a first conductor pattern 2 and a thin film layer laminated on the first conductor pattern 2.

Abstract: A metalization structure having a first conductor layer on the surface of an underlying layer and, further, a second conductor layer connected conductively with the first conductor layer in which a polyimide insulative film of low thermal expansion coefficient is present between at least an end of a pattern of the second conductor layer and the first conductor layer, for stably obtaining a metalization structure of high reliability and free from the worry of peeling of the conductor portion from a substrate or occurrence of cracking to the underlying layer.

Abstract: The present invention provides the wiring structure having a wiring layer and insulation layer and the method of manufacturing the same, wherein at least a part of the wiring of said wiring layer comprises copper, and said insulation layer comprises the polyimide obtained by heating the polyimide precursor composition containing the polyimide precursor having the repeating unit which can be represented by the following general formula (Chemical formula 15). ##STR1## (In this formula, R.sup.1 is at least one type of quadrivalent organic group selected from among the Chemical formulae 16, while R.sup.2 is a bivalent organic group containing aromatic ring).

Abstract: A circuit board is manufactured by a method having the steps of depositing a metal pattern on a ceramic board, depositing a thin layer of a high polymer material on the ceramic board formed with the metal pattern, depositing a protective layer of a high polymer material on the thin layer of the high polymer material, and directing a laser beam toward and onto the protective layer and the thin layer deposited on a plating region of the metal pattern and a cutting region of the ceramic board thereby selectively removing part of those layers. The laser beam has a wavelength range of from 150 nm to 400 nm, an energy density range of from 0.5 J/cm.sup.2 to 5.0 J/cm.sup.2, and a pulse width range of from 100 ps to 1 .mu.s.

Abstract: A multilayer wiring substrate having high reliability can be produced in good productivity by subjecting metal wiring layers to stabilization treatment on the surface with a metal such as Cr, Mo or the like or an aqueous solution of water glass so as to prevent generation of hillocks or whiskers and to improve chemical resistance.

Abstract: A thick and thin film hybrid multilayer wiring substrate includes an adjustment layer provided between a thick film circuit and a thin film circuit in order to adjust positions of the thick film circuit and the thin film circuit with high integration and large area of the thick and thin film hybrid substrate. The adjustment layer is formed using a direct printing process in accordance with dispersion of the shape of the thick film circuit substrate to absorb the dispersion of the substrate. Further, in order to absorb dispersion of contraction of the thick film substrate due to sintering, a position of a mark provided on the substrate is detected by an electron beam and thereafter a connection pattern is formed to be connected to a regular pattern.

Abstract: In a pin grid array type multi-chip module structure comprised of a ceramic multi-layer wiring board having the top surface on which a plurality of semiconductor devices are carried, divisional board areas each having the same size are respectively allotted to individual semiconductor devices of the same type. Within respective divisional board areas, the positional relation between the array arrangement of connecting pads on the top surface for connection to the semiconductor devices and the array arrangement of I/O pins on the bottom surface of the board is so determined as to be constant. Metallized patterns inside the board which are to be connected power supply I/O pins and ground I/O pins are made constant for respective divisional board areas allotted to individual semiconductor devices of the same type.