Patents by Inventor Hideto Miyake

Hideto Miyake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7399687
    Abstract: The present invention relates to a method for producing an epitaxial substrate having a III-V group compound semiconductor crystal represented by the general formula InxGayAlzN (wherein, x+y+z=1, 0?x?1, 0?y?1, 0?z?1) having reduced dislocation density, comprising a first step of covering with a mask made of a different material from the III-V group compound semiconductor so that only portions around points of the crystal constitute openings by using a III-V group compound semiconductor crystal having a plurality of projection shapes and a second step of growing the III-V group compound semiconductor crystal laterally by using the III-V group compound semiconductor crystal at the opening as a seed crystal. According to the present invention, an epitaxial substrate having a III-V group compound semiconductor crystal having low dislocation density and little warp is obtained.
    Type: Grant
    Filed: March 4, 2004
    Date of Patent: July 15, 2008
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kazumasa Hiramatsu, Hideto Miyake, Shinya Bohyama, Takayoshi Maeda, Yoshinobu Ono
  • Publication number: 20060172512
    Abstract: The present invention relates to a method for producing an epitaxial substrate having a III-V group compound semiconductor crystal represented by the general formula InxGayAlzN (wherein, x+y+z=1, 0?x?1, 0?y?1, 0?z?1) having reduced dislocation density, comprising a first step of covering with a mask made of a different material from the III-V group compound semiconductor so that only portions around points of the crystal constitute openings by using a III-V group compound semiconductor crystal having a plurality of projection shapes and a second step of growing the III-V group compound semiconductor crystal laterally by using the III-V group compound semiconductor crystal at the opening as a seed crystal. According to the present invention, an epitaxial substrate having a III-V group compound semiconductor crystal having low dislocation density and little warp is obtained.
    Type: Application
    Filed: March 4, 2004
    Publication date: August 3, 2006
    Inventors: Kazumasa Hiramatsu, Hideto Miyake, Shinya Bohyama, Takayoshi Maeda, Yoshinobu Ono
  • Patent number: 6946308
    Abstract: When a crystal layer of III-V Group nitride compound semiconductor is formed, a nitride compound semiconductor layer is first overlaid on a substrate to form a base layer and a III-V Group nitride compound semiconductor represented by the general formula InxGayAlzN (where 0?x?1, 0?y?1, 0?z?1, x+y+z=1) is epitaxially grown on the base layer by hydride vapor phase epitaxy at a deposition pressure of not lower than 800 Torr. By making the deposition pressure not lower than 800 Torr, the crystallinity of the III-V Group nitride compound semiconductor can be markedly improved and its defect density reduced.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: September 20, 2005
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kazumasa Hiramatsu, Hideto Miyake, Shinya Bohyama, Takayoshi Maeda, Yasushi Iyechika
  • Patent number: 6844574
    Abstract: Provided is a III-V compound semiconductor having a layer formed from a first III-V compound semiconductor expressed by the general formula InuGavAlwN (where 0?u?1, 0?v?1, 0?w?1, u+v+w=1), a pattern formed on the layer from a material different not only from the first III-V compound semiconductor but also from a second III-V compound semiconductor hereinafter described, and a layer formed on the first III-V compound semiconductor and the pattern from the second III-V compound semiconductor expressed by the general formula InxGayAlzN (where 0?x?1, 0?y?1, 0?x?1, x+y+z=1), wherein the full width at half maximum of the (0004) reflection X-ray rocking curve of the second III-V compound semiconductor is 700 seconds or less regardless of the direction of X-ray incidence. In the III-V compound semiconductor, which is a high quality semiconductor, the occurrence of low angle grain boundaries is suppressed.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: January 18, 2005
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kazumasa Hiramatsu, Hideto Miyake, Takayoshi Maeda, Yasushi Iyechika
  • Publication number: 20040157358
    Abstract: A group III nitride semiconductor film involving few lattice defects and having a large thickness, and a process for making the film are disclosed. Dry-etching is conducted while a quartz substrate and a group III nitride semiconductor are placed on the top of a lower electrode. Nano-pillars (50) are formed on the top of the group III nitride semiconductor (101). Another group III nitride semiconductor film (51) is deposited on the nano-pillars (50).
    Type: Application
    Filed: April 1, 2004
    Publication date: August 12, 2004
    Inventors: Kazumasa Hiramatsu, Hideto Miyake, Harumasa Yoshida, Tatsuhiro Urushido, Yusuke Terada
  • Patent number: 6756246
    Abstract: A method for fabricating a GaN-based III-V Group compound semiconductor is provided that utilizes a regrowth method based on the HVPE method to form a second III-V Group compound semiconductor layer having a flat surface on a first III-V Group compound semiconductor layer formed with a mask layer. The method uses a mixed carrier gas of hydrogen gas and nitrogen gas to control formation of a facet group including at least the {33-62} facet by the regrowth, and conducting the regrowth until a plane parallel to the surface of the first III-V Group compound semiconductor layer is once annihilated, thereby fabricating a III-V Group compound semiconductor having low dislocation density.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: June 29, 2004
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kazumasa Hiramatsu, Hideto Miyake, Shinya Bohyama, Takayoshi Maeda, Yasushi Iyechika
  • Publication number: 20030211710
    Abstract: When a crystal layer of III-V Group nitride compound semiconductor is formed, a nitride compound semiconductor layer is first overlaid on a substrate to form a base layer and a III-V Group nitride compound semiconductor represented by the general formula InxGayAlzN (where 0≦x≦1, 0≦y≦1, 0≦z≦1, x+y+z=1) is epitaxially grown on the base layer by hydride vapor phase epitaxy at a deposition pressure of not lower than 800 Torr. By making the deposition pressure not lower than 800 Torr, the crystallinity of the III-V Group nitride compound semiconductor can be markedly improved and its defect density reduced.
    Type: Application
    Filed: March 26, 2003
    Publication date: November 13, 2003
    Inventors: Kazumasa Hiramatsu, Hideto Miyake, Shinya Bohyama, Takayoshi Maeda, Yasushi Iyechika
  • Publication number: 20030045017
    Abstract: A method for fabricating a GaN-based III-V Group compound semiconductor is provided that utilizes a regrowth method based on the HVPE method to form a second III-V Group compound semiconductor layer having a flat surface on a first III-V Group compound semiconductor layer formed with a mask layer. The method uses a mixed carrier gas of hydrogen gas and nitrogen gas to control formation of a facet group including at least the {33-62} facet by the regrowth, and conducting the regrowth until a plane parallel to the surface of the first III-V Group compound semiconductor layer is once annihilated, thereby fabricating a III-V Group compound semiconductor having low dislocation density.
    Type: Application
    Filed: March 26, 2002
    Publication date: March 6, 2003
    Inventors: Kazumasa Hiramatsu, Hideto Miyake, Shinya Bohyama, Takayoshi Maeda, Yasushi Iyechika
  • Patent number: 6503610
    Abstract: Provided is a method of producing a group III-V compound semiconductor having a low dislocation density without increasing the thickness of a re-grown layer, the method includes a re-growing process using a mask pattern, and threading dislocations in the re-grown layer are terminated by the voids formed on the pattern.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: January 7, 2003
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kazumasa Hiramatsu, Hideto Miyake, Takayoshi Maeda, Yasushi Iyechika
  • Publication number: 20010031385
    Abstract: Provided is a method of producing a group III-V compound semiconductor having a low dislocation density without increasing the thickness of a re-grown layer, the method includes a re-growing process using a mask pattern, and threading dislocations in the re-grown layer are terminated by the voids formed on the pattern.
    Type: Application
    Filed: March 23, 2001
    Publication date: October 18, 2001
    Inventors: Kazumasa Hiramatsu, Hideto Miyake, Takayoshi Maeda, Yasushi Iyechika