Patents by Inventor Hidetoshi Oishi
Hidetoshi Oishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240113120Abstract: A complementary transistor is constituted of a first transistor TR1 and a second transistor TR2, active regions 32, 42 of the respective transistors are formed by layering first A layers 33, 43 and the first B layers 35, 45 respectively, surface regions 201, 202 provided in a base correspond to first A layers 33, 43 respectively, first B layers 35, 45 each have a conductivity type different from that of the first A layers 33, 43, and extension layers 36, 46 of the first B layer are provided on insulation regions 211,212 respectively.Type: ApplicationFiled: December 14, 2023Publication date: April 4, 2024Applicant: SONY GROUP CORPORATIONInventors: Hidetoshi Oishi, Koichi Matsumoto, Kazuyuki TOMIDA
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Patent number: 11887984Abstract: A complementary transistor is constituted of a first transistor TR1 and a second transistor TR2, active regions 32, 42 of the respective transistors are formed by layering first A layers 33, 43 and the first B layers 35, 45 respectively, surface regions 201, 202 provided in a base correspond to first A layers 33, 43 respectively, first B layers 35, 45 each have a conductivity type different from that of the first A layers 33, 43, and extension layers 36, 46 of the first B layer are provided on insulation regions 211,212 respectively.Type: GrantFiled: April 7, 2021Date of Patent: January 30, 2024Assignee: Sony Group CorporationInventors: Hidetoshi Oishi, Koichi Matsumoto, Kazuyuki Tomida
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Publication number: 20230269503Abstract: The disclosed device reduces noise while suppressing an increase in layout area of transistors included in a readout circuit. This solid-state imaging device includes: a first substrate section; a second substrate section disposed on one side of the first substrate section; a readout circuit; and first and second transistor cells each having, for each readout circuit, a plurality of transistors included in the readout circuit, the first and second transistor cells being arranged adjacent to each other. In addition, the plurality of transistors includes amplification transistors, a sensor pixel is provided on the first substrate section, the readout circuit and the first and second transistor cells are provided on the second substrate section, the amplification transistors of the first and second transistor cells are arranged adjacent to each other, and a first main electrode region of a pair of main electrode regions of each of the amplification transistors is shared.Type: ApplicationFiled: April 21, 2021Publication date: August 24, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Hidetoshi OISHI
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Publication number: 20210225841Abstract: A complementary transistor is constituted of a first transistor TR1 and a second transistor TR2, active regions 32, 42 of the respective transistors are formed by layering first A layers 33, 43 and the first B layers 35, 45 respectively, surface regions 201, 202 provided in a base correspond to first A layers 33, 43 respectively, first B layers 35, 45 each have a conductivity type different from that of the first A layers 33, 43, and extension layers 36, 46 of the first B layer are provided on insulation regions 211,212 respectively.Type: ApplicationFiled: April 7, 2021Publication date: July 22, 2021Inventors: Hidetoshi OISHI, Koichi MATSUMOTO, Kazuyuki TOMIDA
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Patent number: 11004851Abstract: A complementary transistor is constituted of a first transistor TR1 and a second transistor TR2, active regions 32, 42 of the respective transistors are formed by layering first A layers 33, 43 and the first B layers 35, 45 respectively, surface regions 201, 202 provided in a base correspond to first A layers 33, 43 respectively, first B layers 35, 45 each have a conductivity type different from that of the first A layers 33, 43, and extension layers 36, 46 of the first B layer are provided on insulation regions 211, 212 respectively.Type: GrantFiled: June 4, 2020Date of Patent: May 11, 2021Assignee: SONY CORPORATIONInventors: Hidetoshi Oishi, Koichi Matsumoto, Kazuyuki Tomida
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Patent number: 10788525Abstract: Provided is a semiconductor device, a measurement device, a measurement method, and a semiconductor system that enable accurate measurement of the plasma induced damage (PID) effect on a small scale. The semiconductor device includes an NMOSFET whose gate is connected to an antenna part that functions as an antenna in a plasma process and a PMOSFET that controls the connection between the NMOSFET and a ring oscillator. The semiconductor device is provided with a test element group (TEG) that includes an NMOSFET whose gate is connected to an antenna part that functions as an antenna in a plasma process and a PMOSFET that controls the connection between the NMOSFET and a ring oscillator.Type: GrantFiled: December 22, 2016Date of Patent: September 29, 2020Assignee: SONY CORPORATIONInventors: Yohei Hiura, Hidetoshi Oishi, Shigetaka Mori
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Publication number: 20200303376Abstract: A complementary transistor is constituted of a first transistor TR1 and a second transistor TR2, active regions 32, 42 of the respective transistors are formed by layering first A layers 33, 43 and the first B layers 35, 45 respectively, surface regions 201, 202 provided in a base correspond to first A layers 33, 43 respectively, first B layers 35, 45 each have a conductivity type different from that of the first A layers 33, 43, and extension layers 36, 46 of the first B layer are provided on insulation regions 211, 212 respectively.Type: ApplicationFiled: June 4, 2020Publication date: September 24, 2020Applicant: SONY CORPORATIONInventors: Hidetoshi OISHI, Koichi MATSUMOTO, Kazuyuki TOMIDA
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Patent number: 10720432Abstract: A complementary transistor is constituted of a first transistor TR1 and a second transistor TR2, active regions 32, 42 of the respective transistors are formed by layering first A layers 33, 43 and the first B layers 35, 45 respectively, surface regions 201, 202 provided in a base correspond to first A layers 33, 43 respectively, first B layers 35, 45 each have a conductivity type different from that of the first A layers 33, 43, and extension layers 36, 46 of the first B layer are provided on insulation regions 211,212 respectively.Type: GrantFiled: June 23, 2017Date of Patent: July 21, 2020Assignee: Sony CorporationInventors: Hidetoshi Oishi, Koichi Matsumoto, Kazuyuki Tomida
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Publication number: 20190181170Abstract: The present technology relates to a solid state imaging device that enables a reduction in the manufacturing cost of the solid state imaging device, and an electronic apparatus. A first substrate including a pixel circuit having a pixel array unit and a second substrate including a first and a second signal processing circuit arranged side by side across a scribe area are stacked. The second substrate includes a first moisture-resistant ring surrounding at least part of a periphery of the first signal processing circuit, a second moisture-resistant ring surrounding at least part of a periphery of the second signal processing circuit, a third moisture-resistant ring surrounding at least part of a periphery of the second substrate in a layer different from the first and second moisture-resistant rings, and a barrier unit separating a first area between the first and second moisture-resistant rings and a second area.Type: ApplicationFiled: February 12, 2019Publication date: June 13, 2019Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Hidetoshi OISHI, Kunihiko IZUHARA
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Publication number: 20190157272Abstract: A complementary transistor is constituted of a first transistor TR1 and a second transistor TR2, active regions 32, 42 of the respective transistors are formed by layering first A layers 33, 43 and the first B layers 35, 45 respectively, surface regions 201, 202 provided in a base correspond to first A layers 33, 43 respectively, first B layers 35, 45 each have a conductivity type different from that of the first A layers 33, 43, and extension layers 36, 46 of the first B layer are provided on insulation regions 211,212 respectively.Type: ApplicationFiled: June 23, 2017Publication date: May 23, 2019Applicant: SONY CORPORATIONInventors: Hidetoshi OISHI, Koichi MATSUMOTO, Kazuyuki TOMIDA
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Patent number: 10229942Abstract: The present technology relates to a solid state imaging device that enables a reduction in the manufacturing cost of the solid state imaging device, and an electronic apparatus. A first substrate including a pixel circuit having a pixel array unit and a second substrate including a first and a second signal processing circuit arranged side by side across a scribe area are stacked. The second substrate includes a first moisture-resistant ring surrounding at least part of a periphery of the first signal processing circuit, a second moisture-resistant ring surrounding at least part of a periphery of the second signal processing circuit, a third moisture-resistant ring surrounding at least part of a periphery of the second substrate in a layer different from the first and second moisture-resistant rings, and a barrier unit separating a first area between the first and second moisture-resistant rings and a second area.Type: GrantFiled: August 27, 2015Date of Patent: March 12, 2019Assignee: Sony Semiconductor Solutions CorporationInventors: Hidetoshi Oishi, Kunihiko Izuhara
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Publication number: 20190004101Abstract: The present disclosure relates to a semiconductor device, a measurement device, a measurement method, and a semiconductor system that enable accurate measurement of the plasma induced damage (PID) effect on a small scale. The semiconductor device includes: an NMOSFET whose gate is connected to an antenna part that functions as an antenna in a plasma process; and a PMOSFET that controls the connection between the NMOSFET and a ring oscillator. For example, the present disclosure can be applied to a semiconductor device or the like provided with a test element group (TEG) including: an NMOSFET whose gate is connected to an antenna part that functions as an antenna in a plasma process; and a PMOSFET that controls the connection between the NMOSFET and a ring oscillator.Type: ApplicationFiled: December 22, 2016Publication date: January 3, 2019Inventors: YOHEI HIURA, HIDETOSHI OISHI, SHIGETAKA MORI
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Publication number: 20180350858Abstract: The present technology relates to a solid state imaging device that enables a reduction in the manufacturing cost of the solid state imaging device, and an electronic apparatus. A first substrate including a pixel circuit having a pixel array unit and a second substrate including a first and a second signal processing circuit arranged side by side across a scribe area are stacked. The second substrate includes a first moisture-resistant ring surrounding at least part of a periphery of the first signal processing circuit, a second moisture-resistant ring surrounding at least part of a periphery of the second signal processing circuit, a third moisture-resistant ring surrounding at least part of a periphery of the second substrate in a layer different from the first and second moisture-resistant rings, and a barrier unit separating a first area between the first and second moisture-resistant rings and a second area.Type: ApplicationFiled: August 27, 2015Publication date: December 6, 2018Inventors: Hidetoshi OISHI, Kunihiko IZUHARA
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Publication number: 20170234995Abstract: The present disclosure relates to a solid-state image sensor capable of suppressing deterioration of the noise characteristics and the dark characteristics when capturing an image of radiation, a manufacturing method, and a radiation imaging device. A scintillator converts radiation to visible light. Pixels each including a photodiode are formed in a semiconductor substrate. The photodiode photoelectrically converts the visible light that has been converted by the scintillator. Only a silicon oxide film or a negative fixed charge film is formed on the substrate in an element isolation area of the pixel. The present disclosure can be applied to, for example, a radiation imaging device that captures an image of an X-ray with which an object is irradiated.Type: ApplicationFiled: August 11, 2015Publication date: August 17, 2017Inventors: Takeshi YANAGITA, Atsushi SUZUKI, Yoshihiro KOMATSU, Yuiti TAKEDA, Tetsuya OISHI, Itaru OSHIYAMA, Kazunobu OTA, Shinji MIYAZAWA, Hidetoshi OISHI
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Patent number: 9017612Abstract: Provided is a gas sensor that needs no temperature sensor for detecting a temperature of a heater for preventing dew condensation. The gas sensor comprises a hydrogen sensor 1 including: an element housing 13 having a detection chamber 13a to which hydrogen is introduced; a detection element 31 arranged in the detection chamber 13a and detecting hydrogen; a heater 21 for heating the detection chamber 13a by heat generation via passing an electric current through the heater 21, a resistance value of the heater 21 being changed corresponding to a temperature of the detection chamber 13a; and a microcomputer 51 and a heater operation circuit 52 for controlling the heater 21. Herein, the microcomputer 51 controls a temperature of the detection chamber 13a by adjusting the electric current passing through the heater 21 based on the resistance value of the heater 21.Type: GrantFiled: May 3, 2012Date of Patent: April 28, 2015Assignee: Honda Motor Co., Ltd.Inventors: Shunji Tsukabayashi, Hidetoshi Oishi, Kazuhiro Okajima
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Patent number: 8924897Abstract: A mask pattern design method includes: dividing design layout data for a pattern into multiple regions and extracting any region wherein transfer dimensions obtained from a transfer simulation of the pattern from the plurality of regions exceeds a predetermined allowance range; setting a process window of which multiple transfer conditions of the pattern data from the region extracted by the process are each changed, and computing transfer dimensions obtained from a transfer simulation with each transfer condition with the process window; and extracting the transfer conditions wherein the transfer dimension obtained from the transfer simulation with each transfer condition with the process window exceeds a predetermined allowance range, and computing yield from an occurrence probability regarding the transfer condition.Type: GrantFiled: April 9, 2008Date of Patent: December 30, 2014Assignee: Sony CorporationInventors: Hidetoshi Oishi, Mikio Oka
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Publication number: 20140273262Abstract: Provided is a catalytic combustion typed gas sensor of detecting a combustible gas having a concentration equal to or more than a predetermined value based on a raised electric resistance. Herein, combustion heat generated when a combustible gas contacts to a catalytic metal (or detection element) heated by passing electric current therethrough raises a temperature and electric resistance of the catalytic metal. The electric current is made to pass through the catalytic metal such that the temperature of the catalytic metal becomes a standby temperature which is calculated by subtracting the raised temperature portion from a desorption temperature. The combustion heat is generated when the combustible gas contacts to the catalytic metal. Note the catalytic metal adsorbs a silicone compound via a silicon (Si) poisoning process and then desorbs the resulting adsorbed silicone compound at the desorption temperature. The desorption temperature is set in the range over 350° C. to 600° C.Type: ApplicationFiled: May 29, 2014Publication date: September 18, 2014Applicant: Honda Motor Co., Ltd.Inventors: Kazuhiro OKAJIMA, Hidetoshi OISHI, Shunji TSUKABAYASHI, Akihiro SUZUKI, Nobuaki MURAKAMI, Satoshi MORIMOTO, Hiroshi KODA, Takashi MATSUMOTO
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Patent number: 8821797Abstract: A hydrogen detection system can include an exposed detection element made of a catalytic metal which burns hydrogen so as to generate combustion heat. A hydrogen sensor can detect a hydrogen concentration based on a detected value of the detection element. A heating unit can heat the detection element. A hydrogen storage unit is included, and a hydrogen guiding pipe can guide the hydrogen from the hydrogen storage unit to the detection element. A flow rate adjusting device is attached to the hydrogen guiding pipe, and adjusts a flow rate of the hydrogen. A first dilution unit can dilute the hydrogen from the hydrogen storage unit with a dilution gas, and a controller can control the heating unit and the flow rate adjusting device.Type: GrantFiled: February 2, 2012Date of Patent: September 2, 2014Assignee: Honda Motor Co., Ltd.Inventors: Shunji Tsukabayashi, Hidetoshi Oishi, Kazuhiro Okajima
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Patent number: 8815161Abstract: A gas-sensing element configured to measure a concentration of a specific component of a gas is mounted to a first circuit board which includes a driving circuit configured to drive the gas-sensing element. A moisture-proof material is disposed over at least one side of the first circuit board disposed in a tubular gas-sensing element case fixed to a sensor case. A gas-sensing chamber is defined by the first circuit board and an inner tubular surface of the gas-sensing element case, and opens at an open end of the gas-sensing element case to receive the gas to be monitored. A second circuit board which includes a control circuit configured to control the gas-sensing element via the driving circuit is fixed to a sensor case, and disposed in a position separate from the gas-sensing chamber such that the second circuit board is kept out of contact with the gas to be monitored.Type: GrantFiled: January 16, 2008Date of Patent: August 26, 2014Assignee: Honda Motor Co., LtdInventors: Hidetoshi Oishi, Tsuyoshi Eguchi, Takashi Sasaki, Akihiro Suzuki, Shunji Tsukabayashi
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Patent number: 8713990Abstract: A simple gas sensor for detecting a concentration of a detected gas with high accuracy, in which a thermal interference can hardly occur between a normal detection element pair and a reference detection element pair, is provided.Type: GrantFiled: May 18, 2012Date of Patent: May 6, 2014Assignee: Honda Motor Co., Ltd.Inventors: Shunji Tsukabayashi, Hidetoshi Oishi, Kazuhiro Okajima