Abstract: A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.

Abstract: An object of the present invention is to propose a functional element built-in substrate which enables an electrode terminal of a functional element to be well connected to the back surface on the side opposite to the electrode terminal of the functional element, and which can be miniaturized.

Abstract: An object of the present invention is to propose a functional element built-in substrate which enables an electrode terminal of a functional element to be well connected to the back surface on the side opposite to the electrode terminal of the functional element, and which can be miniaturized.

Abstract: A semiconductor device comprises: a semiconductor element; a support substrate arranged on a surface of the semiconductor element opposite to a surface thereof provided with a pad, the support substrate being wider in area than the semiconductor element; a burying insulating layer on the support substrate for burying the semiconductor element therein; a fan-out interconnection led out from the pad to an area on the burying insulating layer lying more peripherally outwardly than the semiconductor element; and a reinforcement portion arranged in a preset area on top of outer periphery of the semiconductor element for augmenting the mechanical strength of the burying insulating layer and the fan-out interconnection.

Abstract: A semiconductor element-embedded substrate includes a semiconductor element; a chip component; a peripheral insulating layer covering at least the outer circumferential side surfaces thereof; an upper surface-side wiring line provided on the upper surface side of the substrate; and a lower surface-side wiring line provided on the lower surface side of the substrate. The built-in semiconductor element includes a terminal on the upper surface side thereof, and this terminal is electrically connected to the upper surface-side wiring line. The built-in chip component includes an upper surface-side terminal electrically connected to the upper surface-side wiring line; a lower surface-side terminal electrically connected to the lower surface-side wiring line; and a through-chip via penetrating through the chip component to connect the upper surface-side terminal and the lower surface-side terminal.

Abstract: A wiring board including a built-in semiconductor element includes the semiconductor element, a peripheral insulating layer covering an outer peripheral side surface of the semiconductor element, an upper surface-side wiring provided on an upper surface side of the wiring board, and a lower surface-side wiring provided on a lower surface side of the wiring board. The semiconductor element includes a first wiring structure layer including a first wiring and a first insulating layer alternately provided on a semiconductor substrate, and a second wiring structure layer including a second wiring and a second insulating layer alternately provided on the first wiring structure layer. The upper surface-side wiring includes a wiring electrically connected to the first wiring via the second wiring. The second wiring is thicker than the first wiring and thinner than the upper surface-side wiring. The second insulating layer is formed of a resin material and is thicker than the first insulating layer.

Abstract: A wiring substrate in which a semiconductor element is built includes a semiconductor element; a peripheral insulating layer covering at least an outer circumferential side surface of this semiconductor element; and an upper surface-side wiring line provided on the upper surface side of the wiring substrate. The semiconductor element includes an internal terminal electrically connected to the upper surface-side wiring line on the upper surface side of the semiconductor element. This internal terminal includes a first conductive part exposed out of an insulating surface layer of the semiconductor element; an adhesion layer on this first conductive part; and a second conductive part on this adhesion layer.

Abstract: A semiconductor device includes: at least one semiconductor element having electrode terminals; a metal plate supporting the semiconductor element; and a wiring board covering the semiconductor element and including a plurality of insulating layers and wiring layers alternately stacked and external connection terminals on a surface, the wiring layers being electrically connected to each other by vias. The electrode terminals and the external connection terminals are electrically connected via at least one of the wiring layers and the vias. At least one of the electrode terminals, the wiring layers, and the vias is electrically connected to the metal plate.

Abstract: A semiconductor device includes: at least one semiconductor element having electrode terminals; a metal plate supporting the semiconductor element; and a wiring board covering the semiconductor element and including a plurality of insulating layers and wiring layers alternately stacked and external connection terminals on a surface, the wiring layers being electrically connected to each other by vias. The electrode terminals and the external connection terminals are electrically connected via at least one of the wiring layers and the vias. At least one of the electrode terminals, the is wiring layers, and the vias is electrically connected to the metal plate.

Abstract: A semiconductor device including a metal frame having a penetrating opening; a semiconductor chip provided in the opening; an insulating layer provided on the upper surface of the metal frame such that the insulating layer covers the upper surface, which is the circuit-formed surface of the semiconductor chip; an interconnect layer provided only on the upper-surface side of the metal frame with intervention of the insulating material and electrically connected to a circuit of the semiconductor chip; a via conductor provided on the upper surface of said semiconductor chip to electrically connect the circuit of the semiconductor chip and the interconnect layer; and a resin layer provided on the lower surface of the metal frame.

Abstract: An object of the present invention is to provide a semiconductor device built-in substrate, which can be made thin and can suppress occurrence of warpage. The present invention provides a semiconductor substrate which is featured by including a first semiconductor device serving as a substrate, a second semiconductor device placed on the circuit surface side of the first semiconductor device in the state where the circuit surfaces of the first and second semiconductor devices are placed to face in the same direction, and an insulating layer incorporating therein the second semiconductor device, and which is featured in that a heat dissipation layer is formed at least between the first semiconductor device and the second semiconductor device, and in that the heat dissipation layer is formed on the first semiconductor device so as to extend up to the outside of the second semiconductor device.

Abstract: A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

Abstract: A wiring substrate in which a semiconductor element is built includes a semiconductor element; a peripheral insulating layer covering at least an outer circumferential side surface of this semiconductor element; and an upper surface-side wiring line provided on the upper surface side of the wiring substrate. The semiconductor element includes an internal terminal electrically connected to the upper surface-side wiring line on the upper surface side of the semiconductor element. This internal terminal includes a first conductive part exposed out of an insulating surface layer of the semiconductor element; an adhesion layer on this first conductive part; and a second conductive part on this adhesion layer.

Abstract: A semiconductor element-embedded substrate includes a semiconductor element; a chip component; a peripheral insulating layer covering at least the outer circumferential side surfaces thereof; an upper surface-side wiring line provided on the upper surface side of the substrate; and a lower surface-side wiring line provided on the lower surface side of the substrate. The built-in semiconductor element includes a terminal on the upper surface side thereof, and this terminal is electrically connected to the upper surface-side wiring line. The built-in chip component includes an upper surface-side terminal electrically connected to the upper surface-side wiring line; a lower surface-side terminal electrically connected to the lower surface-side wiring line; and a through-chip via penetrating through the chip component to connect the upper surface-side terminal and the lower surface-side terminal.

Abstract: A semiconductor device comprises: a semiconductor element; a support substrate arranged on a surface of the semiconductor element opposite to a surface thereof provided with a pad, the support substrate being wider in area than the semiconductor element; a burying insulating layer on the support substrate for burying the semiconductor element therein; a fan-out interconnection led out from the pad to an area on the burying insulating layer lying more peripherally outwardly than the semiconductor element; and a reinforcement portion arranged in a preset area on top of outer periphery of the semiconductor element for augmenting the mechanical strength of the burying insulating layer and the fan-out interconnection.

Abstract: A wiring board including a built-in semiconductor element includes the semiconductor element, a peripheral insulating layer covering an outer peripheral side surface of the semiconductor element, an upper surface-side wiring provided on an upper surface side of the wiring board, and a lower surface-side wiring provided on a lower surface side of the wiring board. The semiconductor element includes a first wiring structure layer including a first wiring and a first insulating layer alternately provided on a semiconductor substrate, and a second wiring structure layer including a second wiring and a second insulating layer alternately provided on the first wiring structure layer. The upper surface-side wiring includes a wiring electrically connected to the first wiring via the second wiring. The second wiring is thicker than the first wiring and thinner than the upper surface-side wiring. The second insulating layer is formed of a resin material and is thicker than the first insulating layer.

Abstract: An object of the present invention is to propose a functional element built-in substrate which enables an electrode terminal of a functional element to be well connected to the back surface on the side opposite to the electrode terminal of the functional element, and which can be miniaturized.

Abstract: A semiconductor device includes a plural number of interconnects and a plural number of vias are stacked. A semiconductor element is enclosed in an insulation layer. At least one of the vias provided in insulation layers and/or at least one of interconnects provided in the interconnect layers are of cross-sectional shapes different from those of the vias formed in another one of the insulation layers and/or interconnects provided in another one of the interconnect layers.

Abstract: In a semiconductor device in which the semiconductor chip including the external terminal(s) is embedded in an insulating layer and interconnect conductor(s) is (are) formed on the insulating layer, base hole(s) is (are) formed at position(s) of the insulating layer corresponding to the external terminal(s) in a state where the semiconductor chip has shrunk after having been embedded in the insulating layer. The interconnect conductor(s) is (are) electrically connected to the external terminal(s) through the base hole(s).

Abstract: A wiring substrate for mounting semiconductors is provided with an insulation film, wires formed in the insulation film, and a plurality of electrode pads that electrically connect to the wires through vias. The electrode pads are provided to have their surfaces exposed to both of the front surface and the rear surface of the insulation film, and at least a part of the side surface of the electrode pads is buried in the insulation film. The insulation film is formed by forming electrode pads on the respective two metallic plates, thereafter, laminating an insulation layer and wires on the respective metallic plates to cover the electrode pad, and adhering the insulation layers to each other for integration, and thereafter, removing the metallic plates.