Patents by Inventor Hideyuki Doi
Hideyuki Doi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10697086Abstract: In forming of a silicon carbide layer, when an X axis indicates a first value representing, in percentage, a value obtained by dividing a flow rate of silane by a flow rate of hydrogen and a Y axis indicates a second value representing a flow rate of ammonia in sccm, the first value and the second value fall within a quadrangular region surrounded by first coordinates, second coordinates, third coordinates, and fourth coordinates in XY plane coordinates. The first coordinates are (0.05, 6.5×10?4). The second coordinates are (0.05, 4.5×10?3). The third coordinates are (0.22, 1.2×10?2). The fourth coordinates are (0.22, 1.3×10?1). After the forming of the silicon carbide layer, an average value of carrier concentration of the silicon carbide layer is more than or equal to 1×1015 cm?3 and less than or equal to 2×1016 cm?3.Type: GrantFiled: August 2, 2016Date of Patent: June 30, 2020Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keiji Wada, Hideyuki Doi, Hironori Itoh
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Patent number: 10612160Abstract: An epitaxial wafer includes a silicon carbide film having a first main surface. A groove portion is formed in the first main surface. The groove portion extends in one direction along the first main surface. Moreover, a width of the groove portion in the one direction is twice or more as large as a width of the groove portion in a direction perpendicular to the one direction. Moreover, a maximum depth of the groove portion from the first main surface is not more than 10 nm.Type: GrantFiled: March 23, 2018Date of Patent: April 7, 2020Assignee: Sumitomo Electric Industries, Ltd.Inventors: Taro Nishiguchi, Jun Genba, Hironori Itoh, Tomoaki Hatayama, Hideyuki Doi
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Patent number: 10472736Abstract: An epitaxial wafer includes a silicon carbide film having a first main surface. A groove portion is formed in the first main surface. The groove portion extends in one direction along the first main surface. Moreover, a width of the groove portion in the one direction is twice or more as large as a width of the groove portion in a direction perpendicular to the one direction. Moreover, a maximum depth of the groove portion from the first main surface is not more than 10 nm.Type: GrantFiled: March 23, 2018Date of Patent: November 12, 2019Assignee: Sumitomo Electric Industries, Ltd.Inventors: Taro Nishiguchi, Jun Genba, Hironori Itoh, Tomoaki Hatayama, Hideyuki Doi
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Publication number: 20180237942Abstract: In forming of a silicon carbide layer, when an X axis indicates a first value representing, in percentage, a value obtained by dividing a flow rate of silane by a flow rate of hydrogen and a Y axis indicates a second value representing a flow rate of ammonia in sccm, the first value and the second value fall within a quadrangular region surrounded by first coordinates, second coordinates, third coordinates, and fourth coordinates in XY plane coordinates. The first coordinates are (0.05, 6.5×10?4). The second coordinates are (0.05, 4.5×10?3). The third coordinates are (0.22, 1.2×10?2). The fourth coordinates are (0.22, 1.3×10?1). After the forming of the silicon carbide layer, an average value of carrier concentration of the silicon carbide layer is more than or equal to 1×1015 cm?3 and less than or equal to 2×1016 cm?3.Type: ApplicationFiled: August 2, 2016Publication date: August 23, 2018Inventors: Keiji Wada, Hideyuki Doi, Hironori Itoh
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Publication number: 20180233562Abstract: A silicon carbide epitaxial substrate includes: a silicon carbide single crystal substrate; and an epitaxial layer. The silicon carbide single crystal substrate has a diameter of not less than 100 mm. The epitaxial layer has a thickness of not less than 10 ?m. The epitaxial layer has a carrier concentration of not less than 1×1014 cm?3 and not more than 1×1016 cm?3. A ratio of a standard deviation of the carrier concentration in a plane of the epitaxial layer to an average value of the carrier concentration in the plane is not more than 10%. The epitaxial layer has a main surface. The main surface has an arithmetic mean roughness Sa of not more than 0.3 nm. An area density of pits originated from a threading screw dislocation is not more than 1000 cm?2. Each of the pits has a maximum depth of not less than 8 nm.Type: ApplicationFiled: August 18, 2015Publication date: August 16, 2018Inventors: Taro NISHIGUCHI, Keiji WADA, Jun GENBA, Hironori ITOH, Hideyuki DOI, Kenji HIRATSUKA
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Publication number: 20180209064Abstract: An epitaxial wafer includes a silicon carbide film having a first main surface. A groove portion is formed in the first main surface. The groove portion extends in one direction along the first main surface. Moreover, a width of the groove portion in the one direction is twice or more as large as a width of the groove portion in a direction perpendicular to the one direction. Moreover, a maximum depth of the groove portion from the first main surface is not more than 10 nm.Type: ApplicationFiled: March 23, 2018Publication date: July 26, 2018Inventors: Taro Nishiguchi, Jun Genba, Hironori Itoh, Tomoaki Hatayama, Hideyuki Doi
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Patent number: 9957641Abstract: An epitaxial wafer includes a silicon carbide film having a first main surface. A groove portion is formed in the first main surface. The groove portion extends in one direction along the first main surface. Moreover, a width of the groove portion in the one direction is twice or more as large as a width of the groove portion in a direction perpendicular to the one direction. Moreover, a maximum depth of the groove portion from the first main surface is not more than 10 nm.Type: GrantFiled: July 22, 2015Date of Patent: May 1, 2018Assignee: Sumitomo Electric Industries, Ltd.Inventors: Taro Nishiguchi, Jun Genba, Hironori Itoh, Tomoaki Hatayama, Hideyuki Doi
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Publication number: 20160326668Abstract: An epitaxial wafer includes a silicon carbide film having a first main surface. A groove portion is formed in the first main surface. The groove portion extends in one direction along the first main surface. Moreover, a width of the groove portion in the one direction is twice or more as large as a width of the groove portion in a direction perpendicular to the one direction. Moreover, a maximum depth of the groove portion from the first main surface is not more than 10 nm.Type: ApplicationFiled: July 22, 2015Publication date: November 10, 2016Applicant: Sumitomo Electric Industries, Ltd.Inventors: Taro Nishiguchi, Jun Genba, Hironori Itoh, Tomoaki Hatayama, Hideyuki Doi
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Patent number: 9455464Abstract: Provided are a gas decomposition component, a method for producing a gas decomposition component, and a power generation apparatus. A gas decomposition component 10 includes a cylindrical-body MEA 7 including a first electrode 2 disposed on an inner-surface side, a second electrode 5 disposed on an outer-surface side, and a solid electrolyte 1 sandwiched between the first electrode and the second electrode; and a porous metal body 11s inserted on the inner-surface side of the cylindrical-body MEA and electrically connected to the first electrode, wherein the gas decomposition component further includes a porous conductive-paste-coated layer 11 g formed on an inner circumferential surface of the first electrode, and a metal mesh sheet 11 a disposed on an inner circumferential side of the conductive-paste-coated layer, and an electrical connection between the first electrode and the porous metal body is established through the conductive-paste-coated layer and the metal mesh sheet.Type: GrantFiled: April 6, 2016Date of Patent: September 27, 2016Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Chihiro Hiraiwa, Masatoshi Majima, Tetsuya Kuwabara, Tomoyuki Awazu, Naho Mizuhara, Toshio Ueda, Hideyuki Doi, Toshiyuki Kuramoto
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Publication number: 20160218385Abstract: Provided are a gas decomposition component, a method for producing a gas decomposition component, and a power generation apparatus. A gas decomposition component 10 includes a cylindrical-body MEA 7 including a first electrode 2 disposed on an inner-surface side, a second electrode 5 disposed on an outer-surface side, and a solid electrolyte 1 sandwiched between the first electrode and the second electrode; and a porous metal body 11s inserted on the inner-surface side of the cylindrical-body MEA and electrically connected to the first electrode, wherein the gas decomposition component further includes a porous conductive-paste-coated layer 11 g formed on an inner circumferential surface of the first electrode, and a metal mesh sheet 11 a disposed on an inner circumferential side of the conductive-paste-coated layer, and an electrical connection between the first electrode and the porous metal body is established through the conductive-paste-coated layer and the metal mesh sheet.Type: ApplicationFiled: April 6, 2016Publication date: July 28, 2016Inventors: Chihiro HIRAIWA, Masatoshi MAJIMA, Tetsuya KUWABARA, Tomoyuki AWAZU, Naho MIZUHARA, Toshio UEDA, Hideyuki DOI, Toshiyuki KURAMOTO
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Patent number: 9325024Abstract: Provided are a gas decomposition component, a method for producing a gas decomposition component, and a power generation apparatus. A gas decomposition component 10 includes a cylindrical-body MEA 7 including a first electrode 2 disposed on an inner-surface side, a second electrode 5 disposed on an outer-surface side, and a solid electrolyte 1 sandwiched between the first electrode and the second electrode; and a porous metal body 11s inserted on the inner-surface side of the cylindrical-body MEA and electrically connected to the first electrode, wherein the gas decomposition component further includes a porous conductive-paste-coated layer 11g formed on an inner circumferential surface of the first electrode, and a metal mesh sheet 11a disposed on an inner circumferential side of the conductive-paste-coated layer, and an electrical connection between the first electrode and the porous metal body is established through the conductive-paste-coated layer and the metal mesh sheet.Type: GrantFiled: November 29, 2011Date of Patent: April 26, 2016Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Chihiro Hiraiwa, Masatoshi Majima, Tetsuya Kuwabara, Tomoyuki Awazu, Naho Mizuhara, Toshio Ueda, Hideyuki Doi, Toshiyuki Kuramoto
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Patent number: 9132384Abstract: Provided are a gas decomposition component, a power generation apparatus including the gas decomposition component, and a method for decomposing a gas. A gas decomposition component includes a cylindrical MEA including a first electrode layer, a cylindrical solid electrolyte layer, and a second electrode layer in order from an inside toward an outside, in a layered structure; a first gas channel through which a first gas that is decomposed flows, the first gas channel being disposed inside the cylindrical MEA; and a second gas channel through which a second gas flows, the second gas channel being disposed outside the cylindrical MEA, wherein the gas decomposition component further includes a heater for heating the entirety of the component; and a preheating pipe through which the first gas to be introduced into the first gas channel passes beforehand to be preheated.Type: GrantFiled: October 21, 2011Date of Patent: September 15, 2015Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Chihiro Hiraiwa, Masatoshi Majima, Tetsuya Kuwabara, Tomoyuki Awazu, Naho Mizuhara, Toshio Ueda, Hideyuki Doi, Toshiyuki Kuramoto
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Publication number: 20150233018Abstract: A silicon carbide epitaxial substrate having a main surface (second main surface) includes: a base substrate; and a silicon carbide epitaxial layer formed on the base substrate and including the main surface (second main surface), the second main surface having a surface roughness of 0.6 nm or less, a ratio of standard deviation of a nitrogen concentration in the silicon carbide epitaxial layer at a surface layer including the main surface (second main surface) within a plane of the silicon carbide epitaxial substrate to an average value of the nitrogen concentration in the silicon carbide epitaxial layer at the surface layer within the plane of the silicon carbide epitaxial substrate being 15% or less.Type: ApplicationFiled: May 6, 2015Publication date: August 20, 2015Inventors: Jun Genba, Taro Nishiguchi, Hideyuki Doi, Akira Matsushima
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Patent number: 9057147Abstract: A silicon carbide epitaxial substrate having a main surface (second main surface) includes: a base substrate; and a silicon carbide epitaxial layer formed on the base substrate and including the main surface (second main surface), the second main surface having a surface roughness of 0.6 nm or less, a ratio of standard deviation of a nitrogen concentration in the silicon carbide epitaxial layer at a surface layer including the main surface (second main surface) within a plane of the silicon carbide epitaxial substrate to an average value of the nitrogen concentration in the silicon carbide epitaxial layer at the surface layer within the plane of the silicon carbide epitaxial substrate being 15% or less.Type: GrantFiled: April 11, 2014Date of Patent: June 16, 2015Assignee: Sumitomo Electric Industries, Ltd.Inventors: Jun Genba, Taro Nishiguchi, Hideyuki Doi, Akira Matsushima
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Publication number: 20150072100Abstract: A silicon carbide epitaxial substrate having a main surface (second main surface) includes: a base substrate; and a silicon carbide epitaxial layer formed on the base substrate and including the main surface (second main surface), the second main surface having a surface roughness of 0.6 nm or less, a ratio of standard deviation of a nitrogen concentration in the silicon carbide epitaxial layer at a surface layer including the main surface (second main surface) within a plane of the silicon carbide epitaxial substrate to an average value of the nitrogen concentration in the silicon carbide epitaxial layer at the surface layer within the plane of the silicon carbide epitaxial substrate being 15% or less.Type: ApplicationFiled: April 11, 2014Publication date: March 12, 2015Applicant: Sumitomo Electric Industries, Ltd.Inventors: Jun Genba, Taro Nishiguchi, Hideyuki Doi, Akira Matsushima
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Publication number: 20130260280Abstract: Provided are a gas decomposition component, a method for producing a gas decomposition component, and a power generation apparatus. A gas decomposition component 10 includes a cylindrical-body MEA 7 including a first electrode 2 disposed on an inner-surface side, a second electrode 5 disposed on an outer-surface side, and a solid electrolyte 1 sandwiched between the first electrode and the second electrode; and a porous metal body 11s inserted on the inner-surface side of the cylindrical-body MEA and electrically connected to the first electrode, wherein the gas decomposition component further includes a porous conductive-paste-coated layer 11g formed on an inner circumferential surface of the first electrode, and a metal mesh sheet 11a disposed on an inner circumferential side of the conductive-paste-coated layer, and an electrical connection between the first electrode and the porous metal body is established through the conductive-paste-coated layer and the metal mesh sheet.Type: ApplicationFiled: November 29, 2011Publication date: October 3, 2013Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Chihiro Hiraiwa, Masatoshi Majima, Tetsuya Kuwabara, Tomoyuki Awazu, Naho Mizuhara, Toshio Ueda, Hideyuki Doi, Toshiyuki Kuramoto
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Publication number: 20130224612Abstract: Provided are a gas decomposition component, a power generation apparatus including the gas decomposition component, and a method for decomposing a gas. A gas decomposition component includes a cylindrical MEA including a first electrode layer, a cylindrical solid electrolyte layer, and a second electrode layer in order from an inside toward an outside, in a layered structure; a first gas channel through which a first gas that is decomposed flows, the first gas channel being disposed inside the cylindrical MEA; and a second gas channel through which a second gas flows, the second gas channel being disposed outside the cylindrical MEA, wherein the gas decomposition component further includes a heater for heating the entirety of the component; and a preheating pipe through which the first gas to be introduced into the first gas channel passes beforehand to be preheated.Type: ApplicationFiled: October 21, 2011Publication date: August 29, 2013Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Chihiro Hiraiwa, Masatoshi Majima, Tetsuya Kuwabara, Tomoyuki Awazu, Naho Mizuhara, Toshio Ueda, Hideyuki Doi, Toshiyuki Kuramoto
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Publication number: 20130171542Abstract: A gas decomposition component includes a cylindrical membrane electrode assembly (MEA) including a first electrode layer, a cylindrical solid electrolyte layer, and a second electrode layer in order from an inside toward an outside, in a layered structure, wherein an end portion of the cylindrical MEA is sealed, a gas guide pipe is inserted through another end portion of the cylindrical MEA into an inner space of the cylindrical MEA to form a cylindrical channel between the gas guide pipe and an inner circumferential surface of the cylindrical MEA, and a gas flowing through the gas guide pipe toward the sealed portion is made to flow out of the gas guide pipe in a region near the sealed portion so that a flow direction of the gas is reversed and the gas flows through the cylindrical channel in a direction opposite to the flow direction in the guide pipe.Type: ApplicationFiled: October 13, 2011Publication date: July 4, 2013Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Chihiro Hiraiwa, Masatoshi Majima, Tetsuya Kuwabara, Tomoyuki Awazu, Naho Mizuhara, Toshio Ueda, Hideyuki Doi, Toshiyuki Kuramoto
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Patent number: 7852896Abstract: A VCSEL includes a GaAs substrate; a first semiconductor distributed Bragg reflector (DBR) disposed on the GaAs substrate and including a first part and a second part on the first part; a semiconductor mesa disposed on the first semiconductor DBR and including an active layer; and a second DBR on the semiconductor mesa. The first part is composed of an undoped semiconductor material. The second part includes third III-V compound semiconductor layers composed of a material containing indium and gallium as the group III element and phosphorus as the group V element and fourth III-V compound semiconductor layers composed of a material containing gallium as the group III element and arsenic as the group V element. The third III-V compound semiconductor layers and the fourth III-V compound semiconductor layers are doped with an n-type impurity.Type: GrantFiled: May 8, 2009Date of Patent: December 14, 2010Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yutaka Onishi, Hideyuki Doi
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Publication number: 20100014551Abstract: A VCSEL includes a GaAs substrate; a first semiconductor distributed Bragg reflector (DBR) disposed on the GaAs substrate and including a first part and a second part on the first part; a semiconductor mesa disposed on the first semiconductor DBR and including an active layer; and a second DBR on the semiconductor mesa. The first part is composed of an undoped semiconductor material. The second part includes third III-V compound semiconductor layers composed of a material containing indium and gallium as the group III element and phosphorus as the group V element and fourth III-V compound semiconductor layers composed of a material containing gallium as the group III element and arsenic as the group V element. The third III-V compound semiconductor layers and the fourth III-V compound semiconductor layers are doped with an n-type impurity.Type: ApplicationFiled: May 8, 2009Publication date: January 21, 2010Applicant: Sumitomo Electric Industries, Ltd.Inventors: Yutaka ONISHI, Hideyuki DOI