Abstract: At least a method and an apparatus are presented for efficiently encoding or decoding video. For example, a plurality of frames is provided to a motion estimator to produce an output comprising estimated motion information. The estimated motion information is provided to an auto-encoder or an auto-decoder to produce an output comprising reconstructed motion field. The reconstructed motion field and one or more decoded frames of the plurality of frames are provided to a deep neural network to produce an output comprising refined bi-directional motion field. The video is encoded or decoded based on the refined bi-directional motion field.

Abstract: Numerous examples are disclosed of output circuitry and associated methods in an artificial neural network. In one example, a system comprises an array of non-volatile memory cells arranged into rows and columns, an output block to convert current from columns of the array into a first digital output during a first time period and a second digital output during a second time period, a first output register to store the first digital output during the first time period and to output the stored first digital output during the second time period, and a second output register to store the second digital output during the second time period and to output the stored second digital output during a third time period.

Abstract: Numerous examples are disclosed of input circuitry and associated methods in an artificial neural network. In one example, a system comprises a plurality of address decoders to receive an address and output a plurality of row enabling signals in response to the address; a first plurality of registers to store, sequentially, activation data in response to the plurality of row enabling signals; and a second plurality of registers to store, in parallel, activation data received from the first plurality of registers.

Abstract: In one example, a neural network device comprises a first plurality of synapses configured to receive a first plurality of inputs and to generate therefrom a first plurality of outputs, wherein the first plurality of synapses comprises a plurality of memory cells, each of the plurality of memory cells configured to store a weight value corresponding to a number of electrons on its floating gate and the plurality of memory cells are configured to generate the first plurality of outputs based upon the first plurality of inputs and the stored weight values.

Abstract: In one example, a system comprises an array comprising selected memory cells; an input block configured to apply, to each selected memory cell, a series of input signals to a terminal of the selected memory cell in response to a series of input bits; and an output block for generating an output of the selected memory cells, the output block comprising an analog-to-digital converter to convert current from the selected memory cells into a digital value, a shifter, an adder, and a register; wherein the shifter, adder, and register are configured to receive a series of digital values in response to the series of input bits, shift each digital value in the series of digital values based on a bit location of an input bit within the series of input bits, and add results of the shift operations to generate an output indicating values stored in the selected memory cells.

Abstract: In one example, a system comprises a vector-by-matrix multiplication array comprising non-volatile memory cells organized into rows and columns; a plurality of word lines coupled respectively to rows of the vector-by-matrix multiplication array; and a word line driver coupled to the plurality of word lines, the word line driver comprising a plurality of select transistors coupled to a common control line and the plurality of word lines, and a plurality of bias transistors coupled to the plurality of select transistors and capable of providing a bias voltage to a single select transistor in the plurality of select transistors or to all of plurality of select transistors in response to control signals.

Abstract: According to at least one embodiment, a method, computer system, and computer program product for model-driven extraction of event data by a computational device is provided. The present invention may include transforming event data of an event occurring on a blockchain network using an event schema to comply with a data model of an external data structure; mapping, based on the event schema and the data model, the event data to a logical structure of the external data structure; and loading the transformed event data to the external data structure to modify a data content of the external data structure based on the mapping.

Abstract: A computer-implemented method for generating a speeding ticket. The method includes generating a first image of at least a part of a vehicle by a first camera, detecting a first set of the characters of the number plate of the vehicle dependent on the first image, and generating a secured file by a first camera using the first set of the characters and a first character code. The method further includes generating a second image of the part of the vehicle by a second camera and detecting a second set of the characters of the number plate dependent on the second image. The method further includes generating the speeding ticket, in response to determining that the vehicle violates a speed limit and in response to verifying that the first set of the characters is equal to the second set of the characters.

Abstract: A computer-implemented method for generating a speeding ticket. The method includes generating a first image of at least a part of a vehicle by a first camera, detecting a first set of the characters of the number plate of the vehicle dependent on the first image, and generating a secured file by a first camera using the first set of the characters and a first character code. The method further includes generating a second image of the part of the vehicle by a second camera and detecting a second set of the characters of the number plate dependent on the second image. The method further includes generating the speeding ticket, in response to determining that the vehicle violates a speed limit and in response to verifying that the first set of the characters is equal to the second set of the characters.

Abstract: For a bi-prediction block, the initial motion field can be refined using a DNN. In one implementation, the initial motion field is integer rounded to obtain initial prediction blocks. Based on the initial prediction, the DNN can generate motion refinement information, which is scaled and added to the sub-pel residual motion from the initial motion field to generate a refined motion field. The scaling factor can take a default value, or be based on the motion asymmetry. While the initial motion field is usually block based on sub-block based, the refined motion field is pixel based or sub-block based and can be at an arbitrary accuracy. The same refinement process is performed at both the encoder and decoder, and thus the motion refinement information need not to be signaled. Whether the refinement is enabled can be determined based on the initial motion, the block activities and the block size.

Abstract: Numerous embodiments of a transceiver for providing high voltages for use during erase or program operations in a non-volatile memory system are disclosed. In one embodiment, a transceiver comprises a PMOS transistor and a native NMOS transistor. In another embodiment, a transceiver comprises a PMOS transistor, an NMOS transistor, and a native NMOS transistor.

Abstract: Numerous embodiments of input circuitry for an analog neural memory in a deep learning artificial neural network are disclosed.

Abstract: Numerous embodiments are disclosed for accessing redundant non-volatile memory cells in place of one or more rows or columns containing one or more faulty non-volatile memory cells during a program, erase, read, or neural read operation in an analog neural memory system used in a deep learning artificial neural network.

Abstract: Various examples of decoders and physical layout designs for non-volatile flash memory arrays in an analog neural system are disclosed. In one example, a system comprises a plurality of vector-by-matrix multiplication arrays in an analog neural memory system, each vector-by-matrix multiplication array comprising an array of non-volatile memory cells organized into rows and columns, wherein each memory cell comprises a word line terminal; a plurality of read row decoders, each read row decoder coupled to one of the plurality of vector-by-matrix multiplication arrays for applying a voltage to one or more selected rows during a read operation; and a shared program row decoder coupled to all of the plurality of vector-by-matrix multiplication arrays for applying a voltage to one or more selected rows in one or more of the vector-by-matrix multiplication arrays during a program operation.

Abstract: According to at least one embodiment, a method, computer system, and computer program product for model-driven extraction of event data by a computational device is provided. The present invention may include transforming event data of an event occurring on a blockchain network using an event schema to comply with a data model of an external data structure; mapping, based on the event schema and the data model, the event data to a logical structure of the external data structure; and loading the transformed event data to the external data structure to modify a data content of the external data structure based on the mapping.

Abstract: At least a method and an apparatus are presented for efficiently encoding or decoding video. For example, a plurality of frames is provided to a motion estimator to produce an output comprising estimated motion information. The estimated motion information is provided to an auto-encoder or an auto-decoder to produce an output comprising reconstructed motion field. The reconstructed motion field and one or more decoded frames of the plurality of frames are provided to a deep neural network to produce an output comprising refined bi-directional motion field. The video is encoded or decoded based on the refined bi-directional motion field.

Abstract: The invention relates to a method for a model-driven extraction of event data representing an event occurring on a blockchain network by a computational device with access to the blockchain network. The computational device is configured as an ETL-device for executing an ETL-code to modify a data content of an external data structure external of the blockchain network using the extracted event data. The method comprising detecting the event, determining an event schema, providing and executing a the ETL-code. The ETL-code comprises machine-executable instructions for extracting the event data representing the detected event, transforming the extracted event data using the event schema to comply with a data model defining a logical structure of the external data structure and loading the transformed data to the external data structure to modify the data content of the external data structure.

Abstract: Various embodiments of word line decoders, control gate decoders, bit line decoders, low voltage row decoders, and high voltage row decoders and various types of physical layout designs for non-volatile flash memory arrays in an analog neural system are disclosed. Shared and segmented embodiments of high voltage row decoders are disclosed.

Abstract: Numerous embodiments for reading or verifying a value stored in a selected non-volatile memory cell in a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. The embodiments comprise various designs of input blocks for applying inputs to the VMM array during a read or verify operation and various designs of output blocks for receiving outputs from the VMM array during the read or verify operation.

Abstract: Numerous embodiments for processing the current output of a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. The embodiments comprise a summer circuit and an activation function circuit. The summer circuit and/or the activation function circuit comprise circuit elements that can be adjusted in response to the total possible current received from the VMM to optimize power consumption.