Patents by Inventor Hieu Pham

Hieu Pham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250105736
    Abstract: Embodiments herein relate to a voltage regular (VR) formed from a first die stacked on a package base layer. The VR can have an inductor-first design in which an inductor is in the package base layer and active circuitry such as switches is in the first die. The inductor receives an input voltage, Vin, directly from the package base layer without the input voltage first entering the first die. The VR can comprise a Kappa VR which includes first and second inductors in the package base layer. The inductors can have asymmetric inductances to improve efficiency. The VR can be cascaded with a set of current multipliers or a Continuously Scalable Conversion Ratio (CSCR) capacitive regulator. Another example implementation includes a switched-inductor-capacitor converter cascaded with a set of switched capacitor current multipliers.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 27, 2025
    Inventors: Nachiket Desai, Harish K. Krishnamurthy, Nicolas Butzen, Khondker Ahmed, Su Hwan Kim, Hieu Pham, Krishnan Ravichandran, Kaladhar Radhakrishnan, Jonathan Douglas
  • Patent number: 12205061
    Abstract: A method for developing or improving a process for producing a product from a material comprising steps of acquiring the composition for at least two slurries as raw material data (17) for the CMP based manufacturing process and its relevant parameters (2) by using a Data Collecting computer (9); physically performing specific method steps of a CMP process; measuring relevant parameters of the used slurries and the physically performed CMP process to determine the CMP process performance by using the Data Collecting computer (9); analyzing the measured data about the relevant parameters with a specific software performed on an Analyzing computer (11) by creating for the software and applying with it a predictive model using Machine Learning to understand the intercorrelation of the different parameters and using the results to improve the CMP process performance and the resulting product quality of the CMP based manufacturing process.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: January 21, 2025
    Assignee: Versum Materials US, LLC
    Inventors: Cesar Clavero, Vid Gopal, Ryan Clarke, Esmeralda Yitamben, Hieu Pham, Anupama Mallikarjunan, Rung-Je Yang, Shirley Lin, Hongjun Zhou, Joseph Rose, Krishna Murella, Lu Gan
  • Publication number: 20230325751
    Abstract: A method for developing or improving a process for producing a product from a material comprising steps of acquiring the composition for at least two slurries as raw material data (17) for the CMP based manufacturing process and its relevant parameters (2) by using a Data Collecting computer (9); physically performing specific method steps of a CMP process; measuring relevant parameters of the used slurries and the physically performed CMP process to determine the CMP process performance by using the Data Collecting computer (9); analyzing the measured data about the relevant parameters with a specific software performed on an Analyzing computer (11) by creating for the software and applying with it a predictive model using Machine Learning to understand the intercorrelation of the different parameters and using the results to improve the CMP process performance and the resulting product quality of the CMP based manufacturing process.
    Type: Application
    Filed: May 18, 2022
    Publication date: October 12, 2023
    Applicant: Versum Materials US, LLC
    Inventors: Cesar Clavero, Vid Gopal, Ryan Clarke, Esmeralda Yitamben, Hieu Pham, Anupama Mallikarjunan, Rung-Je Yang, Shirley Lin, Hongjun Zhou, Joseph Rose, Krishna Murella, Lu Gan
  • Patent number: 11227631
    Abstract: A self servo-write process in performed on two or more recording surfaces simultaneously. In a dual-stage servo system, a first fine positioning servo system that includes a first microactuator independently controls the position of a first read/write head over a first recording surface of a hard disk drive, while a second fine positioning servo system that includes a second microactuator independently controls the position of a second read/write head over a second recording surface of the hard disk drive.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: January 18, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Thorsten Schmidt, Gary W. Calfee, Gabor Szita, Hieu Pham
  • Publication number: 20200286513
    Abstract: A self servo-write process in performed on two or more recording surfaces simultaneously. In a dual-stage servo system, a first fine positioning servo system that includes a first microactuator independently controls the position of a first read/write head over a first recording surface of a hard disk drive, while a second fine positioning servo system that includes a second microactuator independently controls the position of a second read/write head over a second recording surface of the hard disk drive.
    Type: Application
    Filed: May 26, 2020
    Publication date: September 10, 2020
    Inventors: Thorsten SCHMIDT, Gary W. CALFEE, Gabor SZITA, Hieu PHAM
  • Patent number: 10665257
    Abstract: A self servo-write process in performed on two or more recording surfaces simultaneously. In a dual-stage servo system, a first fine positioning servo system that includes a first microactuator independently controls the position of a first read/write head over a first recording surface of a hard disk drive, while a second fine positioning servo system that includes a second microactuator independently controls the position of a second read/write head over a second recording surface of the hard disk drive.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: May 26, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES AND STORAGE CORPORATION
    Inventors: Thorsten Schmidt, Gary W. Calfee, Gabor Szita, Hieu Pham
  • Publication number: 20190279675
    Abstract: A self servo-write process in performed on two or more recording surfaces simultaneously. In a dual-stage servo system, a first fine positioning servo system that includes a first microactuator independently controls the position of a first read/write head over a first recording surface of a hard disk drive, while a second fine positioning servo system that includes a second microactuator independently controls the position of a second read/write head over a second recording surface of the hard disk drive.
    Type: Application
    Filed: March 12, 2018
    Publication date: September 12, 2019
    Inventors: Thorsten SCHMIDT, Gary W. CALFEE, Gabor SZITA, Hieu PHAM
  • Publication number: 20170084643
    Abstract: Embodiments provided herein describe storage capacitors for active matrix displays and methods for making such capacitors. A substrate is provided. A bottom electrode is formed above the substrate. A dielectric layer is formed above the bottom electrode. A top electrode is formed above the dielectric layer. A layer including an amorphous or crystalline material may be formed between the dielectric layer and the top electrode. The bottom electrode may have a thickness of at least 1000 ?, be formed in a gaseous environment of at least 95% argon, and/or not undergo an annealing process before the formation of a dielectric layer above the bottom electrode. The dielectric layer may include a nitrided high-k dielectric material.
    Type: Application
    Filed: September 14, 2016
    Publication date: March 23, 2017
    Applicant: Intermolecular, Inc.
    Inventors: Gaurav Saraf, Howard Lin, Prashant Phatak, Sang Lee, Minh Huu Le, Hieu Pham, Congwen Yi
  • Patent number: 9246096
    Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: January 26, 2016
    Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLC
    Inventors: Zhendong Hong, Vidyut Gopal, Imran Hashim, Randall J. Higuchi, Tim Minvielle, Hieu Pham, Takeshi Yamaguchi
  • Patent number: 9087978
    Abstract: Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 ? and about 100 ?, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: July 21, 2015
    Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLC
    Inventors: Hieu Pham, Vidyut Gopal, Imran Hashim, Tim Minvielle, Yun Wang, Takeshi Yamaguchi, Hong Sheng Yang
  • Publication number: 20150200361
    Abstract: Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 ? and about 100 ?, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.
    Type: Application
    Filed: February 10, 2015
    Publication date: July 16, 2015
    Inventors: Hieu Pham, Vidyut Gopal, Imran Hashim, Tim Minvielle, Yun Wang, Takeshi Yamaguchi, Hong Sheng Yang
  • Publication number: 20150179935
    Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.
    Type: Application
    Filed: February 17, 2015
    Publication date: June 25, 2015
    Inventors: Zhendong Hong, Vidyut Gopal, Imran Hashim, Randall J. Higuchi, Tim Minvielle, Hieu Pham, Takeshi Yamaguchi
  • Patent number: 9006026
    Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: April 14, 2015
    Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLC
    Inventors: Zhendong Hong, Vidyut Gopal, Imran Hashim, Randall J. Higuchi, Tim Minvielle, Hieu Pham, Takeshi Yamaguchi
  • Patent number: 8987697
    Abstract: Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 ? and about 100 ?, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: March 24, 2015
    Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLC
    Inventors: Hieu Pham, Vidyut Gopal, Imran Hashim, Tim Minvielle, Yun Wang, Takeshi Yamaguchi, Hong Sheng Yang
  • Publication number: 20140374240
    Abstract: A nonvolatile memory element is disclosed comprising a first electrode, a near-stoichiometric metal oxide memory layer having bistable resistance, and a second electrode in contact with the near-stoichiometric metal oxide memory layer. At least one electrode is a resistive electrode comprising a sub-stoichiometric transition metal nitride or oxynitride, and has a resistivity between 0.1 and 10? cm. The resistive electrode provides the functionality of an embedded current-limiting resistor and also serves as a source and sink of oxygen vacancies for setting and resetting the resistance state of the metal oxide layer. Novel fabrication methods for the second electrode are also disclosed.
    Type: Application
    Filed: September 8, 2014
    Publication date: December 25, 2014
    Inventors: Hieu Pham, Vidyut Gopal, Imran Hashim, Tim Minvielle, Dipankar Pramanik, Yun Wang, Takeshi Yamaguchi, Hong Sheng Yang
  • Publication number: 20140363920
    Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.
    Type: Application
    Filed: August 22, 2014
    Publication date: December 11, 2014
    Inventors: Zhendong Hong, Vidyut Gopal, Imran Hashim, Randall J. Higuchi, Tim Minvielle, Hieu Pham, Takeshi Yamaguchi
  • Patent number: 8906736
    Abstract: A nonvolatile memory element is disclosed comprising a first electrode, a near-stoichiometric metal oxide memory layer having bistable resistance, and a second electrode in contact with the near-stoichiometric metal oxide memory layer. At least one electrode is a resistive electrode comprising a sub-stoichiometric transition metal nitride or oxynitride, and has a resistivity between 0.1 and 10 ?cm. The resistive electrode provides the functionality of an embedded current-limiting resistor and also serves as a source and sink of oxygen vacancies for setting and resetting the resistance state of the metal oxide layer. Novel fabrication methods for the second electrode are also disclosed.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: December 9, 2014
    Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLC
    Inventors: Hieu Pham, Vidyut Gopal, Imran Hashim, Tim Minvielle, Dipankar Pramanik, Yun Wang, Takeshi Yamaguchi, Hong Sheng Yang
  • Patent number: 8859328
    Abstract: A nonvolatile memory element is disclosed comprising a first electrode, a near-stoichiometric metal oxide memory layer having bistable resistance, and a second electrode in contact with the near-stoichiometric metal oxide memory layer. At least one electrode is a resistive electrode comprising a sub-stoichiometric transition metal nitride or oxynitride, and has a resistivity between 0.1 and 10 ?cm. The resistive electrode provides the functionality of an embedded current-limiting resistor and also serves as a source and sink of oxygen vacancies for setting and resetting the resistance state of the metal oxide layer. Novel fabrication methods for the second electrode are also disclosed.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: October 14, 2014
    Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLC
    Inventors: Hieu Pham, Vidyut Gopal, Imran Hashim, Tim Minvielle, Dipankar Pramanik, Yun Wang, Takeshi Yamaguchi, Hong Sheng Yang
  • Patent number: 8846443
    Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: September 30, 2014
    Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLC
    Inventors: Zhendong Hong, Hieu Pham, Randall Higuchi, Vidyut Gopal, Imran Hashim, Tim Minvielle, Takeshi Yamaguchi
  • Publication number: 20140224645
    Abstract: A nonvolatile memory element is disclosed comprising a first electrode, a near-stoichiometric metal oxide memory layer having bistable resistance, and a second electrode in contact with the near-stoichiometric metal oxide memory layer. At least one electrode is a resistive electrode comprising a sub-stoichiometric transition metal nitride or oxynitride, and has a resistivity between 0.1 and 10 ?cm. The resistive electrode provides the functionality of an embedded current-limiting resistor and also serves as a source and sink of oxygen vacancies for setting and resetting the resistance state of the metal oxide layer. Novel fabrication methods for the second electrode are also disclosed.
    Type: Application
    Filed: April 16, 2014
    Publication date: August 14, 2014
    Applicants: Intermolecular Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLC
    Inventors: Hieu Pham, Vidyut Gopal, Imran Hashim, Tim Minvielle, Dipankar Pramanik, Yun Wang, Takeshi Yamaguchi, Hong Sheng Yang