Patents by Inventor Hieu Pham
Hieu Pham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240112003Abstract: Numerous examples are disclosed of output circuitry and associated methods in an artificial neural network. In one example, a system comprises an array of non-volatile memory cells arranged into rows and columns, an output block to convert current from columns of the array into a first digital output during a first time period and a second digital output during a second time period, a first output register to store the first digital output during the first time period and to output the stored first digital output during the second time period, and a second output register to store the second digital output during the second time period and to output the stored second digital output during a third time period.Type: ApplicationFiled: December 8, 2022Publication date: April 4, 2024Inventors: HIEU VAN TRAN, STEPHEN TRINH, STANLEY HONG, THUAN VU, NGHIA LE, HIEN PHAM
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Publication number: 20240104357Abstract: Numerous examples are disclosed of input circuitry and associated methods in an artificial neural network. In one example, a system comprises a plurality of address decoders to receive an address and output a plurality of row enabling signals in response to the address; a first plurality of registers to store, sequentially, activation data in response to the plurality of row enabling signals; and a second plurality of registers to store, in parallel, activation data received from the first plurality of registers.Type: ApplicationFiled: December 8, 2022Publication date: March 28, 2024Inventors: Hieu Van Tran, Stephen Trinh, Stanley Hong, Thuan Vu, Nghia Le, Hien Pham
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Publication number: 20240095509Abstract: In one example, a neural network device comprises a first plurality of synapses configured to receive a first plurality of inputs and to generate therefrom a first plurality of outputs, wherein the first plurality of synapses comprises a plurality of memory cells, each of the plurality of memory cells configured to store a weight value corresponding to a number of electrons on its floating gate and the plurality of memory cells are configured to generate the first plurality of outputs based upon the first plurality of inputs and the stored weight values.Type: ApplicationFiled: November 27, 2023Publication date: March 21, 2024Inventors: Hieu Van Tran, STANLEY HONG, ANH LY, THUAN VU, HIEN PHAM, KHA NGUYEN, HAN TRAN
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Publication number: 20240098991Abstract: In one example, a system comprises an array comprising selected memory cells; an input block configured to apply, to each selected memory cell, a series of input signals to a terminal of the selected memory cell in response to a series of input bits; and an output block for generating an output of the selected memory cells, the output block comprising an analog-to-digital converter to convert current from the selected memory cells into a digital value, a shifter, an adder, and a register; wherein the shifter, adder, and register are configured to receive a series of digital values in response to the series of input bits, shift each digital value in the series of digital values based on a bit location of an input bit within the series of input bits, and add results of the shift operations to generate an output indicating values stored in the selected memory cells.Type: ApplicationFiled: November 27, 2023Publication date: March 21, 2024Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Toan Le, Nghia Le, Hien Pham
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Publication number: 20240095508Abstract: In one example, a system comprises a vector-by-matrix multiplication array comprising non-volatile memory cells organized into rows and columns; a plurality of word lines coupled respectively to rows of the vector-by-matrix multiplication array; and a word line driver coupled to the plurality of word lines, the word line driver comprising a plurality of select transistors coupled to a common control line and the plurality of word lines, and a plurality of bias transistors coupled to the plurality of select transistors and capable of providing a bias voltage to a single select transistor in the plurality of select transistors or to all of plurality of select transistors in response to control signals.Type: ApplicationFiled: November 27, 2023Publication date: March 21, 2024Inventors: HIEU VAN TRAN, STANLEY HONG, AHN LY, THUAN VU, HIEN PHAM, KHA NGUYEN, HAN TRAN
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Patent number: 11855259Abstract: The present invention relates to a lithium secondary battery electrolyte and a lithium secondary battery including the same and, more specifically, to a flame retardant or nonflammable lithium secondary battery electrolyte having excellent stability even at a high voltage and a lithium secondary battery including the same.Type: GrantFiled: July 31, 2018Date of Patent: December 26, 2023Assignees: RENEWABLE ENERGY PLATFORM CO., LTD., THE INDUSTRY & ACADEMIC COOPERATION IN CHUNGNAM NATIONAL UNIVERSITYInventors: Hee Cheol Kim, Younggil Kwon, Eui Hyeong Hwang, Ji Hee Jang, Sang Ho Lee, Seung Wan Song, Quang Hieu Pham
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Publication number: 20230325751Abstract: A method for developing or improving a process for producing a product from a material comprising steps of acquiring the composition for at least two slurries as raw material data (17) for the CMP based manufacturing process and its relevant parameters (2) by using a Data Collecting computer (9); physically performing specific method steps of a CMP process; measuring relevant parameters of the used slurries and the physically performed CMP process to determine the CMP process performance by using the Data Collecting computer (9); analyzing the measured data about the relevant parameters with a specific software performed on an Analyzing computer (11) by creating for the software and applying with it a predictive model using Machine Learning to understand the intercorrelation of the different parameters and using the results to improve the CMP process performance and the resulting product quality of the CMP based manufacturing process.Type: ApplicationFiled: May 18, 2022Publication date: October 12, 2023Applicant: Versum Materials US, LLCInventors: Cesar Clavero, Vid Gopal, Ryan Clarke, Esmeralda Yitamben, Hieu Pham, Anupama Mallikarjunan, Rung-Je Yang, Shirley Lin, Hongjun Zhou, Joseph Rose, Krishna Murella, Lu Gan
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Publication number: 20230121392Abstract: Solid state sources offer potential advantages including high brightness, electricity savings, long lifetime, and higher color rendering capability, when compared to incandescent and fluorescent light sources. To date however, many of these advantages have not been borne out in providing white LED lamps for general lighting applications. The inventors have established that surface recombination through non-radiative processes results in highly inefficient electrical injection. Exploiting in-situ grown shells in combination with dot-in-a-wire LED structures to overcome this limitation through the effective lateral confinement offered by the shell, the inventors have demonstrated core-shell dot-in-a-wire LEDs with significantly improved electrical injection efficiency and output power, providing phosphor-free InGaN/GaN nanowire white LEDs operating with milliwatt output power and color rendering indices of 95-98.Type: ApplicationFiled: September 29, 2022Publication date: April 20, 2023Inventors: Zetian MI, Hieu Pham Trung NGUYEN, Songrui ZHAO
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Patent number: 11502219Abstract: Solid state sources offers potential advantages including high brightness, electricity savings, long lifetime, and higher color rendering capability, when compared to incandescent and fluorescent light sources. To date however, many of these advantages, however, have not been borne out in providing white LED lamps for general lighting applications. The inventors have established that surface recombination through non-radiative processes results in highly inefficient electrical injection. Exploiting in-situ grown shells in combination with dot-in-a-wire LED structures to overcome this limitation through the effective lateral confinement offered by the shell the inventors have demonstrated core-shell dot-in-a-wire LEDs, with significantly improved electrical injection efficiency and output power, providing phosphor-free InGaN/GaN nanowire white LEDs operating with milliwatt output power and color rendering indices of 95-98.Type: GrantFiled: March 14, 2014Date of Patent: November 15, 2022Assignee: The Royal Institution for the Advancement of Learning/McGill UniversityInventors: Zetian Mi, Hieu Pham Trung Nguyen, Songrui Zhao
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Patent number: 11227631Abstract: A self servo-write process in performed on two or more recording surfaces simultaneously. In a dual-stage servo system, a first fine positioning servo system that includes a first microactuator independently controls the position of a first read/write head over a first recording surface of a hard disk drive, while a second fine positioning servo system that includes a second microactuator independently controls the position of a second read/write head over a second recording surface of the hard disk drive.Type: GrantFiled: May 26, 2020Date of Patent: January 18, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Thorsten Schmidt, Gary W. Calfee, Gabor Szita, Hieu Pham
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Publication number: 20210135285Abstract: The present invention relates to a lithium secondary battery electrolyte and a lithium secondary battery including the same and, more specifically, to a flame retardant or nonflammable lithium secondary battery electrolyte having excellent stability even at a high voltage and a lithium secondary battery including the same.Type: ApplicationFiled: July 31, 2018Publication date: May 6, 2021Inventors: HEE CHEOL KIM, YOUNGGIL KWON, EUI HYEONG HWANG, JI HEE JANG, SANG HO LEE, SEUNG WAN SONG, QUANG HIEU PHAM
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Publication number: 20200286513Abstract: A self servo-write process in performed on two or more recording surfaces simultaneously. In a dual-stage servo system, a first fine positioning servo system that includes a first microactuator independently controls the position of a first read/write head over a first recording surface of a hard disk drive, while a second fine positioning servo system that includes a second microactuator independently controls the position of a second read/write head over a second recording surface of the hard disk drive.Type: ApplicationFiled: May 26, 2020Publication date: September 10, 2020Inventors: Thorsten SCHMIDT, Gary W. CALFEE, Gabor SZITA, Hieu PHAM
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Patent number: 10665257Abstract: A self servo-write process in performed on two or more recording surfaces simultaneously. In a dual-stage servo system, a first fine positioning servo system that includes a first microactuator independently controls the position of a first read/write head over a first recording surface of a hard disk drive, while a second fine positioning servo system that includes a second microactuator independently controls the position of a second read/write head over a second recording surface of the hard disk drive.Type: GrantFiled: March 12, 2018Date of Patent: May 26, 2020Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES AND STORAGE CORPORATIONInventors: Thorsten Schmidt, Gary W. Calfee, Gabor Szita, Hieu Pham
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Publication number: 20190279675Abstract: A self servo-write process in performed on two or more recording surfaces simultaneously. In a dual-stage servo system, a first fine positioning servo system that includes a first microactuator independently controls the position of a first read/write head over a first recording surface of a hard disk drive, while a second fine positioning servo system that includes a second microactuator independently controls the position of a second read/write head over a second recording surface of the hard disk drive.Type: ApplicationFiled: March 12, 2018Publication date: September 12, 2019Inventors: Thorsten SCHMIDT, Gary W. CALFEE, Gabor SZITA, Hieu PHAM
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Publication number: 20170084643Abstract: Embodiments provided herein describe storage capacitors for active matrix displays and methods for making such capacitors. A substrate is provided. A bottom electrode is formed above the substrate. A dielectric layer is formed above the bottom electrode. A top electrode is formed above the dielectric layer. A layer including an amorphous or crystalline material may be formed between the dielectric layer and the top electrode. The bottom electrode may have a thickness of at least 1000 ?, be formed in a gaseous environment of at least 95% argon, and/or not undergo an annealing process before the formation of a dielectric layer above the bottom electrode. The dielectric layer may include a nitrided high-k dielectric material.Type: ApplicationFiled: September 14, 2016Publication date: March 23, 2017Applicant: Intermolecular, Inc.Inventors: Gaurav Saraf, Howard Lin, Prashant Phatak, Sang Lee, Minh Huu Le, Hieu Pham, Congwen Yi
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Publication number: 20160027961Abstract: Solid state sources offers potential advantages including high brightness, electricity savings, long lifetime, and higher color rendering capability, when compared to incandescent and fluorescent light sources. To date however, many of these advantages, however, have not been borne out in providing white LED lamps for general lighting applications. The inventors have established that surface recombination through non-radiative processes results in highly inefficient electrical injection. Exploiting in-situ grown shells in combination with dot-in-a-wire LED structures to overcome this limitation through the effective lateral confinement offered by the shell the inventors have demonstrated core-shell dot-in-a-wire LEDs, with significantly improved electrical injection efficiency and output power, providing phosphor-free InGaN/GaN nanowire white LEDs operating with milliwatt output power and color rendering indices of 95-98.Type: ApplicationFiled: March 14, 2014Publication date: January 28, 2016Applicant: THE ROYAL INSTITUTION FOR THE ADVANCEMENT OF LEARNING/MCGILL UNIVERSITYInventors: Zetian MI, Hieu Pham TRUNG, Songrui ZHAO
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Patent number: 9246096Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.Type: GrantFiled: February 17, 2015Date of Patent: January 26, 2016Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLCInventors: Zhendong Hong, Vidyut Gopal, Imran Hashim, Randall J. Higuchi, Tim Minvielle, Hieu Pham, Takeshi Yamaguchi
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Patent number: 9087978Abstract: Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 ? and about 100 ?, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.Type: GrantFiled: February 10, 2015Date of Patent: July 21, 2015Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLCInventors: Hieu Pham, Vidyut Gopal, Imran Hashim, Tim Minvielle, Yun Wang, Takeshi Yamaguchi, Hong Sheng Yang
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Publication number: 20150200361Abstract: Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 ? and about 100 ?, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.Type: ApplicationFiled: February 10, 2015Publication date: July 16, 2015Inventors: Hieu Pham, Vidyut Gopal, Imran Hashim, Tim Minvielle, Yun Wang, Takeshi Yamaguchi, Hong Sheng Yang
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Publication number: 20150179935Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.Type: ApplicationFiled: February 17, 2015Publication date: June 25, 2015Inventors: Zhendong Hong, Vidyut Gopal, Imran Hashim, Randall J. Higuchi, Tim Minvielle, Hieu Pham, Takeshi Yamaguchi