Patents by Inventor Hikaru Watanabe

Hikaru Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190259985
    Abstract: In an upper cell unit (2146) and a lower cell unit (2147) comprising five battery cells, positive electrode terminals (2162, 2172) are set apart and aligned vertically, and negative electrode terminals (2167, 2177) are set apart and aligned vertically. When an electrical device body is rated at 36V, device-side terminals are in contact only at the upper terminals (2162, 2167), and short circuiting of the lower terminals (2172, 2177) is effected using a short bar 2059. When the electrical device body is rated at 18V, the upper and lower terminals (2162 and 2172, 2167 and 2177) are simultaneously made to contact the device-side terminals, and the upper cell unit (2146) and the lower cell unit (2147) assume a parallel connected state. Thus, it is possible to automatically switch the output voltage when a battery pack is mounted according to the difference in terminal shape on the electrical device body side.
    Type: Application
    Filed: October 27, 2017
    Publication date: August 22, 2019
    Applicant: Koki Holdings Co., Ltd.
    Inventors: Hiroyuki HANAWA, Tomomasa NISHIKAWA, SHOTA KANNO, Toshio Mizoguchi, Yasushi Nakano, Kazuhiko FUNABASHI, Takuya Teranishi, Naoto Wakatabe, Shinji Watanabe, Junpei Sato, Hikaru Tamura, Nobuhiro TAKANO, Osamu Kawanobe, Hayato Yamaguchi, Akira Matsushita, Masaru Hirano, Takuhiro Murakami, Masayuki Ogura, Yusuke Funabiki, Junichi Toukairin, Shota Takeuchi
  • Publication number: 20190259984
    Abstract: A battery pack houses first and second cell units that are composed of a plurality of cells, and has a positive electrode power source terminal and a negative electrode power source terminal. This battery pack is provided with a series connector capable of connecting, in series, the first and second cell units and a parallel connector capable of connecting, in parallel, the first and second cell units, and is capable of switching between a parallel connection voltage and a series connection voltage. In the case of attachment to the high voltage electrical device body, the series connector becomes conductive and the parallel connector pair is cut off by the action of the series/parallel switching terminal. In the case of attachment to a low voltage electrical device body, the state is returned to an initial state, the series connector is cut off, and the parallel connector pair becomes conductive.
    Type: Application
    Filed: October 27, 2017
    Publication date: August 22, 2019
    Applicant: Koki Holdings Co., Ltd.
    Inventors: Tomomasa NISHIKAWA, Takuya Teranishi, Naoto Wakatabe, Akira Matsushita, Masaru Hirano, Osamu Kawanobe, Nobuhiro TAKANO, Shinji Watanabe, Hiroyuki HANAWA, Takuhiro Murakami, SHOTA KANNO, Junpei Sato, Hikaru Tamura, Hayato Yamaguchi, Toshio Mizoguchi, Yasushi Nakano, Kazuhiko FUNABASHI, Masayuki Ogura, Yusuke FUNABIKI, Junichi Toukairin, Shota Takeuchi
  • Publication number: 20190260137
    Abstract: Waveguide slot array antennas each having slots, that transmit or receive electromagnetic waves and that are formed in a front surface of a waveguide and waveguide slot array antennas each having slots that transmit or receive electromagnetic waves and that are formed in a front surface of a waveguide, and the waveguide slot array antennas and the waveguide slot array antennas are alternately arranged, the waveguide is a ridge waveguide having a ridge formed inside the waveguide, and the waveguide is a ridge waveguide having ridges, formed inside the waveguide.
    Type: Application
    Filed: August 10, 2016
    Publication date: August 22, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hikaru WATANABE, Takashi MARUYAMA, Masataka OTSUKA, Yu USHIJIMA, Kazunari KIHIRA
  • Patent number: 10350894
    Abstract: According to an embodiment of the present invention, a printing apparatus that satisfactorily sucks and recovers a printhead is provided. A printing apparatus that includes a transfer member, and the first and second printheads has the following arrangement. The apparatus includes the first and second suction units which suck a plurality of nozzles of the first and second printheads, a common negative-pressure generation unit which generates a negative-pressure for suction by these suction units, and a moving unit which moves these suction units from one end to the other end of each printhead. Then, the moving unit moves the first and second suction units so as to pass through concave gaps with respect to ink discharge surfaces of the first and second printheads corresponding to the first and second suction units at different timings.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: July 16, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takashi Horiba, Hikaru Watanabe, Kanto Kurasawa
  • Patent number: 10355740
    Abstract: An array antenna device AAD including: a plurality of element antennas EAs; a transmission/reception module TRM, which is to be connected to one of the EAs, and includes a transmission circuit TC, a reception circuit RC, and a transmission/reception switch; a transmission/reception controller controlling by controlling an amplitude and phase of a signal passing through each TC and RC, and by switching transmission/reception; a distributor distributing a signal from a signal transmitter to each TC to transmit a distributed signal from the each TC; a combiner combining a signal from the each RC; and a receiver receiving the combined signal. A detection signal, which contains a detected amplitude and phase of the signal received by the receiver, is corrected with a piece of interconnection amplitude-phase information about the EAs to obtain a calibration value in calibration of each TRM, and calibration is conducted with the calibration value.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: July 16, 2019
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Satoshi Yamaguchi, Hikaru Watanabe, Tasuku Kuriyama, Takashi Maruyama, Masataka Otsuka, Hideki Morishige
  • Patent number: 10291222
    Abstract: A gate potential control device configured to control potential of a gate of a main switching element is provided herein. The gate potential control device includes: a turn-on switching element and a turn-off switching element. In a turn-off operation, a main voltage between main terminals of the main switching element increases from an on-voltage to a peak value of a surge voltage and then decreases to an off-voltage. The gate potential control device is configured to keep both of the turn-on switching element and the turn-off switching element turned off in a period which is at least a part of a specific period in the turn-off operation, the specific period being from a timing after a predetermined time lapse from a timing of rise-up of the main voltage from the on-voltage to a timing at which the main voltage reaches the peak value.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: May 14, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hidetoshi Morishita, Hikaru Watanabe
  • Publication number: 20190131701
    Abstract: A parallel line formed on the same plane as a patch element, close to the patch element, in a direction that is a magnetic field direction of a patch antenna and parallel to the polarization direction of the patch antenna, and a bent line shaped so as to be bent between adjacent patch elements and configured to connect their parallel lines to each other, form a coupling line, which couples part of an electromagnetic wave excited by one of the patch elements to its adjacent patch antenna, and, in the coupling line, a gap between the parallel line and the patch element and a length of the bent line are set so that an electromagnetic wave coupled from one patch antenna to its adjacent patch antenna via space and an electromagnetic wave coupled from the one patch antenna to the adjacent patch antenna via the coupling line cancel each other.
    Type: Application
    Filed: June 14, 2016
    Publication date: May 2, 2019
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hikaru WATANABE, Satoshi YAMAGUCHI, Masataka OTSUKA, Hideki MORISHIGE
  • Publication number: 20190109377
    Abstract: An object of the present invention is to vary the directivity of an antenna (100a) while reducing the signal loss by switching circuits (5a-5d) in a splitter circuit. The switching circuits (5a-5d) in the splitter circuit connect or disconnect n (n is an integer of 2 or more) second lines (12a) connected in parallel with a first line (10a) to/from output terminals (7) connected to n antenna elements (8) having different directivities of signals. If m (m is an integer ranging from 1 to n?1) switching circuits (5b, 5d) arbitrarily selected from the n switching circuits (5a-5d) are switched to on-states, the characteristic impedance of each of the n second lines (12a) is set to a product between the characteristic impedance of the first line (10a) and the number m of switching circuits (5b and 5d) switched to on-states.
    Type: Application
    Filed: April 25, 2016
    Publication date: April 11, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hikaru WATANABE, Takashi MARUYAMA, Akimichi HIROTA, Satoshi YAMAGUCHI, Masataka OTSUKA
  • Patent number: 10224211
    Abstract: There is provided an etching method for etching an antireflection film including silicon according to a pattern of a resist film by using plasma processing with respect to a processing object, the processing object including an etching object film, the antireflection film including silicon laminated on the etching object film, and the resist film laminated on the antireflection film including silicon. The method includes generating plasma of a processing gas containing a fluorocarbon gas in a processing chamber, the processing object being disposed in the processing chamber, and generating plasma of a processing gas containing an inactive gas in the processing chamber, the processing object being disposed in the processing chamber. A set of the first generating and the second generating are repeatedly performed.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: March 5, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Hikaru Watanabe, Akihiro Tsuji
  • Publication number: 20190044568
    Abstract: An array antenna device AAD including: a plurality of element antennas EAs; a transmission/reception module TRM, which is to be connected to one of the EAs, and includes a transmission circuit TC, a reception circuit RC, and a transmission/reception switch; a transmission/reception controller controlling by controlling an amplitude and phase of a signal passing through each TC and RC, and by switching transmission/reception; a distributor distributing a signal from a signal transmitter to each TC to transmit a distributed signal from the each TC; a combiner combining a signal from the each RC; and a receiver receiving the combined signal. A detection signal, which contains a detected amplitude and phase of the signal received by the receiver, is corrected with a piece of interconnection amplitude-phase information about the EAs to obtain a calibration value in calibration of each TRM, and calibration is conducted with the calibration value.
    Type: Application
    Filed: February 21, 2017
    Publication date: February 7, 2019
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Satoshi YAMAGUCHI, Hikaru WATANABE, Tasuku KURIYAMA, Takashi MARUYAMA, Masataka OTSUKA, Hideki MORISHIGE
  • Publication number: 20190027372
    Abstract: A method for selectively etching a first region made of silicon oxide with respect to a second region made of silicon nitride or another material different from that of the first region. The method includes a first step for generating, in a processing container housing a workpiece to be treated, a plasma of a treatment gas including a fluorocarbon gas, an oxygen-containing gas, and an inert gas, and forming a deposit including fluorocarbon on the object to be treated; and a second step for etching the first region with radicals of the fluorocarbon included in the deposit. The first step and the second step are executed repeatedly.
    Type: Application
    Filed: May 16, 2017
    Publication date: January 24, 2019
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akihiro TSUJI, Masanobu HONDA, Hikaru WATANABE
  • Publication number: 20180366338
    Abstract: An etching method is provided for selectively etching a first region of silicon oxide with respect to a second region of silicon nitride by performing plasma processing on a target object including the first region and the second region. In the etch method, first, a plasma of a processing gas including a fluorocarbon gas is generated in a processing chamber where the target object is accommodated. Next, the plasma of the processing gas including the fluorocarbon gas is further generated in the processing chamber where the target object is accommodated. Next, the first region is etched by radicals of fluorocarbon contained in a deposit which is formed on the target object by the generation and the further generation of the plasma of the processing gas containing the fluorocarbon gas. A high frequency powers used for the plasma generation is smaller than a high frequency power used for plasma further generation.
    Type: Application
    Filed: August 24, 2018
    Publication date: December 20, 2018
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hikaru WATANABE, Akihiro TSUJI
  • Patent number: 10142000
    Abstract: A sub-array number determinator is provided to determine a number of sub-arrays to be allocated to each of user terminals detected by a terminal position detector on a basis of relation between positions of the user terminals and a position of an antenna apparatus. An antenna selector selects sub-arrays for the number determined by the sub-array number determinator from among the sub-arrays and allocates the selected sub-arrays for the determined number to each of the user terminals. This structure is capable of preventing interference among beams for user terminals and providing excellent communication quality to the user terminals even in condition where the user terminals are adjacent to each other.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: November 27, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunari Kihira, Makoto Matsuki, Hikaru Watanabe, Hiroki Iura, Masataka Otsuka
  • Patent number: 10109495
    Abstract: An etching method is provided for selectively etching a first region of silicon oxide with respect to a second region of silicon nitride by performing plasma processing on a target object including the first region and the second region. In the etch method, first, a plasma of a processing gas including a fluorocarbon gas is generated in a processing chamber where the target object is accommodated. Next, the plasma of the processing gas including the fluorocarbon gas is further generated in the processing chamber where the target object is accommodated. Next, the first region is etched by radicals of fluorocarbon contained in a deposit which is formed on the target object by the generation and the further generation of the plasma of the processing gas containing the fluorocarbon gas. A high frequency powers used for the plasma generation is smaller than a high frequency power used for plasma further generation.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: October 23, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hikaru Watanabe, Akihiro Tsuji
  • Publication number: 20180287678
    Abstract: A sub-array number determinator is provided to determine a number of sub-arrays to be allocated to each of user terminals detected by a terminal position detector on a basis of relation between positions of the user terminals and a position of an antenna apparatus. An antenna selector selects sub-arrays for the number determined by the sub-array number determinator from among the sub-arrays and allocates the selected sub-arrays for the determined number to each of the user terminals. This structure is capable of preventing interference among beams for user terminals and providing excellent communication quality to the user terminals even in condition where the user terminals are adjacent to each other.
    Type: Application
    Filed: April 15, 2015
    Publication date: October 4, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazunari KIHIRA, Makoto MATSUKI, Hikaru WATANABE, Hiroki IURA, Masataka OTSUKA
  • Publication number: 20180269870
    Abstract: A gate potential control device configured to control potential of a gate of a main switching element is provided herein. The gate potential control device includes: a turn-on switching element and a turn-off switching element. In a turn-off operation, a main voltage between main terminals of the main switching element increases from an on-voltage to a peak value of a surge voltage and then decreases to an off-voltage. The gate potential control device is configured to keep both of the turn-on switching element and the turn-off switching element turned off in a period which is at least a part of a specific period in the turn-off operation, the specific period being from a timing after a predetermined time lapse from a timing of rise-up of the main voltage from the on-voltage to a timing at which the main voltage reaches the peak value.
    Type: Application
    Filed: February 23, 2018
    Publication date: September 20, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hidetoshi MORISHITA, Hikaru WATANABE
  • Patent number: 10076130
    Abstract: The present invention has objects to provide a glucan useful as water-soluble dietary fiber, its preparation and uses. The present invention solves the above objects by providing a branched ?-glucan, which is constructed by glucose molecules and characterized by methylation analysis as follows: (1) Ratio of 2,3,6-trimethyl-1,4,5-triacetyl-glucitol to 2,3,4-trimethyl-1,5,6-triacetyl-glucitol is in the range of 1:0.6 to 1:4; (2) Total content of 2,3,6-trimethyl-1,4,5-triacetyl-glucitol and 2,3,4-trimethyl-1,5,6-triacetyl-glucitol is 60% or higher in the partially methylated glucitol acetates; (3) Content of 2,4,6-trimethyl-1,3,5-triacetyl-glucitol is 0.5% or higher but less than 10% in the partially methylated glucitol acetates; and (4) Content of 2,4-dimethyl-1,3,5,6-tetraacetyl-glucitol is 0.5% or higher in the partially methylated glucitol acetates; a novel ?-glucosyltransferase which forms the branched ?-glucan, processes for producing them, and their uses.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: September 18, 2018
    Assignee: HAYASHIBARA CO., LTD.
    Inventors: Hikaru Watanabe, Takuo Yamamoto, Tomoyuki Nishimoto, Keiji Tsusaki, Kazuyuki Oku, Hiroto Chaen, Shigeharu Fukuda
  • Publication number: 20180257379
    Abstract: According to an embodiment of the present invention, a printing apparatus that satisfactorily sucks and recovers a printhead is provided. A printing apparatus that includes a transfer member, and the first and second printheads has the following arrangement. The apparatus includes the first and second suction units which suck a plurality of nozzles of the first and second printheads, a common negative-pressure generation unit which generates a negative-pressure for suction by these suction units, and a moving unit which moves these suction units from one end to the other end of each printhead. Then, the moving unit moves the first and second suction units so as to pass through concave gaps with respect to ink discharge surfaces of the first and second printheads corresponding to the first and second suction units at different timings.
    Type: Application
    Filed: February 26, 2018
    Publication date: September 13, 2018
    Inventors: Takashi Horiba, Hikaru Watanabe, Kanto Kurasawa
  • Publication number: 20180190505
    Abstract: An etching method including: (a) providing a workpiece including a first region made of a first material and a second region made of a second material defining a recess, the first region filling the recess of the second region while covering the second region; (b) generating plasma of a first fluorocarbon gas to etch the first region until before exposing the second region; (c) generating plasma of a second fluorocarbon gas to form fluorocarbon deposits on the first region; (d) generating plasma of an inert gas to etch the first region by fluorocarbon radicals contained in the fluorocarbon deposits; and (e) repeating step (c) and step (d) one or more times until after exposing the second region. An etching rate of the first material of the first region is higher than that of the second material of the second region with respect to the second fluorocarbon gas.
    Type: Application
    Filed: February 26, 2018
    Publication date: July 5, 2018
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hikaru WATANABE, Akihiro TSUJI
  • Patent number: 9852922
    Abstract: A plasma etching method includes: mounting a target substrate on a first electrode which is provided to be parallel with a second electrode with a preset gap within a processing chamber, a base material of the second electrode containing silicon or SiC; generating plasma of a fluorocarbon-based etching gas in a processing space; applying a low frequency AC power or a high frequency AC power having a frequency, which an ion in the plasma is allowed to follow, to the second electrode; and increasing an effective voltage value of the AC power to enhance sputtering at the second electrode such that silicon sputtered from the base material reacts with fluorine radicals generated from the fluorocarbon-based etching gas to produce a reaction product of SiF4, to irradiate electrons generated near the second electrode to the target substrate and to increase a plasma potential near a sidewall of the processing chamber.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: December 26, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hikaru Watanabe, Masanobu Honda