Abstract: A circuit design technique is provided for automatically estimating lengths of interconnect segments to be employed in interconnecting at least some circuit components of a plurality of placed circuit components of a circuit layout. The automatically estimating includes automatically generating pin locations for a plurality of pins in at least one level of the hierarchy to be employed with the at least some circuit components of the circuit layout, wherein the interconnect segments interconnect the plurality of pins. A route estimator is employed to estimate lengths of the interconnect segments based on the pin locations of the plurality of pins. The estimated interconnect segment lengths are then employed in automatically estimating resistance capacitance interconnect parasitics for the interconnect segments to be employed in the circuit layout.

Abstract: A circuit design technique is provided for automatically estimating lengths of interconnect segments to be employed in interconnecting at least some circuit components of a plurality of placed circuit components of a circuit layout. The automatically estimating includes automatically generating pin locations for a plurality of pins in at least one level of the hierarchy to be employed with the at least some circuit components of the circuit layout, wherein the interconnect segments interconnect the plurality of pins. A route estimator is employed to estimate lengths of the interconnect segments based on the pin locations of the plurality of pins. The estimated interconnect segment lengths are then employed in automatically estimating resistance capacitance interconnect parasitics for the interconnect segments to be employed in the circuit layout.

Abstract: A physical device layout tool and method. The method and tool receive a user provided schematic with circuit data and placement parameters, including defaults. Further inputs include a definition of cell physical position in the horizontal direction, a definition of the cell's vertical stacking level, a definition of the cell orientation, a specification of vertical alignment of multiple cell instances, and a definition of vertical spacing between 2 adjacent cell instances. These input parameters are used to generate a layout with the placed circuit elements.

Abstract: A circuit monitors and resets a co-processor. The circuit includes a hang detector module for detecting a hang in co-processor. The circuit also includes a selective processor reset module for resetting the co-processor without resetting a processor in response to detecting a hang in the co-processor.

Abstract: A silicon standoff acts as a shim during reflow between a module and a printed circuit board. The silicon standoff is attached to a flexible circuit. A ball grid array interposes the connection pads of the module and the printed circuit board. The height of the standoff is determined based on the amount of ball collapse that is desired. During reflow, the silicon standoff will not collapse, therefore the ball grid array can only collapse as far as the standoff allows before contacting the printed circuit board.

Abstract: A method for making a processor system immune to circuit failure caused by external noise using mirrored processors, and a recovery unit integral with the method, are disclosed. Identical addresses and data information is generated in each of two processors. The data is then partitioned into registers and Error Correction Codes (ECC's) are generated for the data. The address, data, and ECC information for each processor is then interlaced in a data structure. The interlaced structures of each processor are then compared. If the comparison yields no errors, the data is checkpointed in the recovery unit; if an error is detected, a recovery sequence can be initiated after the check-stop operation, whereby the system is restored to the last error-free checkpointing operation.

Abstract: A method of consolidating metal powders selected from the group consisting essentially of aluminum, aluminum alloys, and aluminum metal matrix composites includes: pressing the powder into a preform, and preheating the preform to elevated temperatures; providing a bed of flowable pressure transmitting particles; positioning the preform in such relation to the bed that the particles encompass the preform; and pressurizing the bed to compress the particles and cause pressure transmission via the particles to the preform, thereby to consolidate the body into desired shape. Typically, the metal powder has surface oxide, and such pressurizing is carried out to break up, partially or fully, the surface oxide.

Abstract: A hair clip or the like is provided of the type having two metal jaws hinged together at a pivot point and having finger extensions beyond the pivot point with a spring tending to keep the jaws closed. The clip of the present invention utilizes a novel pivot joint and spring holder.