Abstract: A first calculation device is provided that calculates a ratio of a target torque equivalent value of an engine to a maximum torque equivalent value of the engine, as a pressure ratio equivalent value. A second calculation device is also provided that calculates a flow velocity of air to flowing through a throttle valve in the engine, based on the pressure ratio equivalent value calculated by the first calculation device. A third calculation device is further provided that calculates a target throttle valve opening, based on the flow velocity calculated by the second calculation device. With this configuration, the target opening of a throttle valve corresponding to the requested engine torque, without using the pressures before and after the throttle valve section.

Abstract: An engine control apparatus includes a target air volume calculator which calculates a target air volume required by an engine, and an actual air volume calculator which calculates an actual air volume inhaled into a cylinder of the engine. The apparatus further includes an estimator which calculates the estimated value of subsequent actual air volume on the basis of a time lag from a time when the target air volume is calculated to a time when the actual air volume reaches the target air volume. The apparatus can accurately estimate an intake air volume inhaled into the cylinder to improve the controllability of the engine.

Abstract: An equivalent circuit includes: a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; a second transistor having a second gate electrode, a second drain electrode, and a second source electrode electrically connected to the first drain electrode; and a charging and discharging circuit which includes a first capacitor having a terminal electrically connected to the second gate electrode and another terminal electrically connected to the second source electrode, and charges and discharges the first capacitor with predetermined time constants.

Abstract: A battery system according to the present invention includes a secondary battery; a battery control unit that controls charging and discharging of said secondary battery; and a charging/discharging management unit that controls the charging and discharging of said secondary battery through said battery control unit, wherein said battery control unit, if an abnormality occurred during operation of said battery control unit, transmits remaining capacity data that represent a remaining capacity of said secondary battery that remained immediately before the abnormality occurred to said charging/discharging management unit.

Abstract: Provided is a simulation method for simulating electrical properties of a bidirectional switch formed as a single element and having a double gate structure. A simulation is performed using an equivalent circuit having a symmetrical structure in which a drain electrode of a JFET and a drain electrode of another JFET are connected via a resistor.

Abstract: An equivalent circuit includes: a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; a second transistor having a second gate electrode, a second drain electrode, and a second source electrode electrically connected to the first drain electrode; and a charging and discharging circuit which includes a first capacitor having a terminal electrically connected to the second gate electrode and another terminal electrically connected to the second source electrode, and charges and discharges the first capacitor with predetermined time constants.

Abstract: Provided is a simulation method for simulating electrical properties of a bidirectional switch formed as a single element and having a double gate structure. A simulation is performed using an equivalent circuit having a symmetrical structure in which a drain electrode of a JFET and a drain electrode of another JFET are connected via a resistor.

Abstract: A circuit device includes a substrate 11, and a transmission line 10. The transmission line 10 includes a dielectric film 13 formed on the substrate 11, and a signal line formed on the dielectric film 13. The dielectric film 13 includes a nano-composite film in which particles of a first material are dispersed in a second material.

Abstract: An engine control apparatus includes a target air volume calculator which calculates a target air volume required by an engine, and an actual air volume calculator which calculates an actual air volume inhaled into a cylinder of the engine. The apparatus further includes an estimator which calculates the estimated value of subsequent actual air volume on the basis of a time lag from a time when the target air volume is calculated to a time when the actual air volume reaches the target air volume. The apparatus can accurately estimate an intake air volume inhaled into the cylinder to improve the controllability of the engine.

Abstract: A first calculation device is provided that calculates a ratio of a target torque equivalent value of an engine to a maximum torque equivalent value of the engine, as a pressure ratio equivalent value. A second calculation device is also provided that calculates a flow velocity of air to flowing through a throttle valve in the engine, based on the pressure ratio equivalent value calculated by the first calculation device. A third calculation device is further provided that calculates a target throttle valve opening, based on the flow velocity calculated by the second calculation device. With this configuration, the target opening of a throttle valve corresponding to the requested engine torque, without using the pressures before and after the throttle valve section.

Abstract: A semiconductor device includes a semiconductor layer stack 13 formed on a substrate 11 and having a channel region, a first electrode 16A and a second electrode 16B formed spaced apart from each other on the semiconductor layer stack 13, a first gate electrode 18A formed between the first electrode 16A and the second electrode 16B, and a second gate electrode 18B formed between the first gate electrode 18A and the second electrode 16B. A first control layer 19A having a p-type conductivity is formed between the semiconductor layer stack 13 and the first gate electrode 18A.

Abstract: Outer side sill member includes an upper wall section slanting upward in a horizontal, outer-to-inner direction, and a lower wall section slanting downward in the horizontal, outer-to-inner direction. At least one of upper and lower wall sections of the outer side sill member has a channel-shaped bead extending along the side sill, so that the side sill has a polygonal closed sectional shape extending in the front-rear direction of the vehicle. The bead has a bottom portion having a width greater than a vertical dimension in a direction orthogonal to the surface of the bottom portion. Each of bulkheads, partitioning the interior of the side sill, is fixedly joined to the outer side sill member with its recessed edge portion substantially fittingly engaging with the bottom portion of the depressed wall portion of the outer side sill member.

Abstract: A wireless apparatus which can realize a DFS function that avoidance of interference with radar is considered in an Ad-Hoc mode under a multihop circumstance is provided. A Beacon frame is transmitted at a shorter interval than a previously set interval when radar is detected by wireless apparatuses N1 to N6 which have a DFS function which perform avoidance of interference with radar.

Abstract: A secondary battery pack of the present invention includes a secondary battery block 3 in which a plurality of unit blocks 2 are connected in series; battery adjustment sections 5 that are each provided for each of the unit blocks 2 and have a function of monitoring the voltage of secondary batteries and a function of adjusting the balance; a charge switch 8; and a discharge switch 9. The secondary battery pack includes transmission sections 17 that receive information from the corresponding battery adjustment sections 5. The transmission sections are connected to the preceding or subsequent transmission sections and are so set that at least either information input from the preceding transmission sections or information input from the battery adjustment sections 5 is output to the subsequent transmission sections.

Abstract: According to one embodiment, a non-linearity measurement apparatus includes a first measurement module, a second measurement module, and a calculation module. The first measurement module is configured to measure a component of a first higher harmonic from a reproduced signal of a first signal recorded on a magnetic recording medium. The second measurement module is configured to measure a component of a second higher harmonic from a reproduced signal of a second signal recorded on the magnetic recording medium. The calculation module is configured to calculate a non-linear transition shift of the magnetic recording medium by calculating an arcsine function of a value obtained by dividing the component of the second higher harmonic by the component of the first higher harmonic.

Abstract: In a transistor, an AlN buffer layer 102, an undoped GaN layer 103, an undoped AlGaN layer 104, a p-type control layer 105, and a p-type contact layer 106 are formed in this order on a sapphire substrate 101. The transistor further includes a gate electrode 110 in ohmic contact with the p-type contact layer 106, and a source electrode 108 and a drain electrode 109 provided on the undoped AlGaN layer 104. By applying a positive voltage to the p-type control layer 105, holes are injected into a channel to increase a current flowing in the channel.

Abstract: A semiconductor device includes a first group III-V nitride semiconductor layer, a second group III-V nitride semiconductor layer having a larger band gap than the first group III-V nitride semiconductor layer and at least one ohmic electrode successively formed on a substrate. The ohmic electrode is formed so as to have a base portion penetrating the second group III-V nitride semiconductor layer and reaching a portion of the first group III-V nitride semiconductor layer disposed beneath a two-dimensional electron gas layer. An impurity doped layer is formed in portions of the first group III-V nitride semiconductor layer and the second group III-V nitride semiconductor layer in contact with the ohmic electrode.

Abstract: A nitride semiconductor device includes: a first semiconductor layer made of first nitride semiconductor; a second semiconductor layer formed on a principal surface of the first semiconductor layer and made of second nitride semiconductor having a bandgap wider than that of the first nitride semiconductor; a control layer selectively formed on, or above, an upper portion of the second semiconductor layer and made of third nitride semiconductor having a p-type conductivity; source and drain electrodes formed on the second semiconductor layer at respective sides of the control layer; a gate electrode formed on the control layer; and a fourth semiconductor layer formed on a surface of the first semiconductor layer opposite to the principal surface, having a potential barrier in a valence band with respect to the first nitride semiconductor and made of fourth nitride semiconductor containing aluminum.

Abstract: A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.

Abstract: According to one embodiment, a magnetic recording device includes a write controller to control such that writing first information having a same polarity throughout the first information in a predetermined region including a plurality of tracks in a recording medium, writing second information in a target track located within or close to the predetermined region, and writing third information having, at an end of the writing, a polarity opposite to the polarity of the first information in a region of the target track in which the second information is not written, are performed; a read controller to control such that the second information is read after each of writing of the second information and writing of the third information; and a determiner to determine occurrence of pole erasing based on each second information read under the control by the read controller.