Patents by Inventor Hirofumi Nagano

Hirofumi Nagano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11880478
    Abstract: A traceability information management server includes: a transaction reception part that receives transaction data from a user client, the transaction data containing information on a completed process in distribution of a product and a concerned party in the completed process; an access right information generation part that generates access right information, the access right information being information on a relation between the completed process, the concerned party in the completed process, and a predetermined access right of the concerned party; an access right determination part that identifies, based on the access right information, information on a process in the distribution to which a sender of the received information provision request from the user client has an access right; and an information transmission part that transmits the identified information on the process to the user client that has sent the information provision request.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: January 23, 2024
    Assignee: HITACHI, LTD.
    Inventors: Hirofumi Nagano, Masayuki Oyamatsu, Shohei Yamagata, Toshiomi Moriki
  • Patent number: 11682009
    Abstract: A resource accommodation assistance system includes a plurality of information processing apparatuses each including: a storage unit configured to hold a distributed ledger storing transactions issued in accordance with events including power sale from an ordinary household to a retail electric utility, power purchase by a customer through the power sale, and commodity purchase by the ordinary household of a commodity from the customer with a payment token gained from the retail electric utility through the power sale; and an arithmetic unit configured, in the event of commodity purchase, to execute a smart contract, to carry out a transaction for payment on the commodity purchase using the payment token with a predetermined premium bearing by the customer, and to store, in the distributed ledger, the transaction subjected to a predetermined process executed together with another information processing apparatus among the information processing apparatuses.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: June 20, 2023
    Assignee: HITACHI, LTD.
    Inventors: Yu Ikemoto, Takashi Fukumoto, Hirofumi Nagano, Masayuki Oyamatsu, Shohei Yamagata
  • Publication number: 20220156743
    Abstract: A credit analysis assistance method for a system 10, the method comprising executing by a node 100 of a party involved in a predetermined transaction a process of extracting evaluation information on a business partner in the transaction from the predetermined transaction data in the distributed ledger 110, a process of extracting an evaluation result on the business partner determined by a predetermined external institution from the predetermined transaction data in the distributed ledger 110, and a process of generating credit information on the business partner by applying a predetermined rule defined in advance to the evaluation information and the evaluation result.
    Type: Application
    Filed: November 5, 2019
    Publication date: May 19, 2022
    Applicant: HITACHI, LTD.
    Inventors: Masayuki OYAMATSU, Hirofumi NAGANO, Sanae NAKAO, Shohei YAMAGATA
  • Publication number: 20210294914
    Abstract: A traceability information management server includes: a transaction reception part that receives transaction data from a user client, the transaction data containing information on a completed process in distribution of a product and a concerned party in the completed process; an access right information generation part that generates access right information, the access right information being information on a relation between the completed process, the concerned party in the completed process, and a predetermined access right of the concerned party; an access right determination part that identifies, based on the access right information, information on a process in the distribution to which a sender of the received information provision request from the user client has an access right; and an information transmission part that transmits the identified information on the process to the user client that has sent the information provision request.
    Type: Application
    Filed: July 1, 2019
    Publication date: September 23, 2021
    Inventors: Hirofumi NAGANO, Masayuki OYAMATSU, Shohei YAMAGATA, Toshiomi MORIKI
  • Publication number: 20210264414
    Abstract: A resource accommodation assistance system includes a plurality of information processing apparatuses each including: a storage unit configured to hold a distributed ledger storing transactions issued in accordance with events including power sale from an ordinary household to a retail electric utility, power purchase by a customer through the power sale, and commodity purchase by the ordinary household of a commodity from the customer with a payment token gained from the retail electric utility through the power sale; and an arithmetic unit configured, in the event of commodity purchase, to execute a smart contract, to carry out a transaction for payment on the commodity purchase using the payment token with a predetermined premium bearing by the customer, and to store, in the distributed ledger, the transaction subjected to a predetermined process executed together with another information processing apparatus among the information processing apparatuses.
    Type: Application
    Filed: July 6, 2018
    Publication date: August 26, 2021
    Inventors: Yu IKEMOTO, Takashi FUKUMOTO, Hirofumi NAGANO, Masayuki OYAMATSU, Shohei YAMAGATA
  • Publication number: 20210065309
    Abstract: An accounting management apparatus configured to manage accounting of a first organization belonging to a set of organizations forming a group, the accounting management apparatus being accessible to accounting information including information about a project of the first organization and settlement information about the project, and the processor being configured to execute: an acquisition process of acquiring first settlement information about the project and second settlement information from the accounting information, the second settlement information being about a part of operation of the project by a second organization belonging to the group and having performed part of the operation; a compilation process of compiling the first settlement information and the second settlement information acquired by the acquisition process; and an output process of outputting a result of the compilation by the compilation process.
    Type: Application
    Filed: March 12, 2020
    Publication date: March 4, 2021
    Inventors: Sanae NAKAO, Masayuki OYAMATSU, Hirofumi NAGANO, Shohei YAMAGATA, Tatsuro TSUBONE, Susumu KOBAYASHI, Yu OSHIMOURA
  • Patent number: 10727333
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, an insulating unit, a void, a gate insulating film and a gate electrode. The second semiconductor region provides on a part of the first semiconductor region. The third semiconductor region provides on one other part of the first semiconductor region. The insulating unit provides on a part of the second semiconductor region. The void provides at a lower part of the insulating unit. The gate insulating film provides on a part of the first semiconductor region between the second semiconductor region and the third semiconductor region. The gate electrode provides on the gate insulating film. A position in a first direction of at least a part of the void is between the insulating unit and the third semiconductor region.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: July 28, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hirofumi Nagano, Koichi Ozaki
  • Publication number: 20190078902
    Abstract: A congestion avoidance support system includes a storage device storing information of respective travelers, and an arithmetic device configured to receive a request to avoid congestion from a business operator terminal of a predetermined business operator, identify the content of an incentive on the basis of a road to be avoided during congestion in the request and crowdedness situation of the road, distribute information of the incentive to a traveler terminal and, upon receiving, after the distribution, a notification from the traveler terminals that either a predetermined property in the request has matched the traveler's transfer policy and transfer trend, or the traveler has moved in accordance with the request and therefore acquired the incentive, perform each of the processes of identifying the content of the incentive and distributing the information again, when the crowdedness situation of the road to be avoided indicates a predetermined degree of crowdedness.
    Type: Application
    Filed: March 13, 2018
    Publication date: March 14, 2019
    Inventors: Ying ZHONG, Takumi MATSUDA, Naofumi TOMITA, Hirofumi NAGANO, Masayuki OYAMATSU, Takuya AKASHI
  • Publication number: 20190080422
    Abstract: The present invention stabilizes and expedites incomes of primary sector workers and thus supports transformation of the primary industry into the senary industry. An information processor configured as a revenue allocation system 100 includes a storage device 205 that manages information on transactions generated in commercial distribution of products produced by primary sector workers, the commercial distribution starting from the primary sector workers; and an arithmetic device 202 that executes predetermined purchase processing for ownership of a delivered product associated with a predetermined transaction in the commercial distribution, with a predetermined broker as a buyer, based on the information on the transactions, that calculates a difference in value between a credit held by the broker for a creditor of the transaction and the ownership obtained through the purchase processing, and that executes predetermined payment processing for an amount corresponding to the difference.
    Type: Application
    Filed: March 2, 2018
    Publication date: March 14, 2019
    Inventors: Masayuki OYAMATSU, Shohei YAMAGATA, Hirofumi NAGANO, Itaru NISHIZAWA
  • Publication number: 20190012623
    Abstract: A product and the like can be managed after trading the product and the like to reduce trade risks. A trade management system includes a node having a calculating unit that performs, with transaction data issued by a predetermined node on an occasion of selling a predetermined product being set as a start point, processing for determining whether or not a commercial trade is valid on the basis of information on a trade condition of the product included in transaction data at the start point, and preliminarily held party-in-charge information relating to the party in charge when performing each processing of a series of commercial trades for repeating purchase and sale of the product.
    Type: Application
    Filed: March 7, 2018
    Publication date: January 10, 2019
    Inventors: Takayuki HABUCHI, Hirofumi NAGANO, Masayuki OYAMATSU, Itaru NISHIZAWA
  • Publication number: 20170263760
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, an insulating unit, a void, a gate insulating film and a gate electrode. The second semiconductor region provides on a part of the first semiconductor region. The third semiconductor region provides on one other part of the first semiconductor region. The insulating unit provides on a part of the second semiconductor region. The void provides at a lower part of the insulating unit. The gate insulating film provides on a part of the first semiconductor region between the second semiconductor region and the third semiconductor region. The gate electrode provides on the gate insulating film. A position in a first direction of at least a part of the void is between the insulating unit and the third semiconductor region.
    Type: Application
    Filed: January 17, 2017
    Publication date: September 14, 2017
    Inventors: Hirofumi NAGANO, Koichi OZAKI
  • Publication number: 20130336100
    Abstract: In an optical disk including at least a rewritable phase change material and comprising a recording layer having a reflectivity of more than 15%, an address output value as an address pit signal component occupying in a reproduced signal in a non recording state is prescribed to be 0.18 though 0.27 or a numerical aperture of an address pit signal occupying in a reproduced signal in a non recording state is prescribed to be more than 0.3.
    Type: Application
    Filed: August 20, 2013
    Publication date: December 19, 2013
    Applicant: JVC Kenwood Corporation
    Inventors: Tetsuya Kondo, Eiji Nakagawa, Hirofumi Nagano
  • Patent number: 8537654
    Abstract: In an optical disk including at least a rewritable phase change material and comprising a recording layer having a reflectivity of more than 15%, an address output value as an address pit signal component occupying in a reproduced signal in a non recording state is prescribed to be 0.18 though 0.27 or a numerical aperture of an address pit signal occupying in a reproduced signal in a non recording state is prescribed to be more than 0.3.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: September 17, 2013
    Assignee: JVC Kenwood Corporation
    Inventors: Tetsuya Kondo, Eiji Nakagawa, Hirofumi Nagano
  • Patent number: 8520490
    Abstract: In an optical disk including at least a rewritable phase change material and comprising a recording layer having a reflectivity of more than 15%, an address output value as an address pit signal component occupying in a reproduced signal in a non recording state is prescribed to be 0.18 though 0.27 or a numerical aperture of an address pit signal occupying in a reproduced signal in a non recording state is prescribed to be more than 0.3.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: August 27, 2013
    Assignee: JVC Kenwood Corporation
    Inventors: Tetsuya Kondo, Eiji Nakagawa, Hirofumi Nagano
  • Patent number: 8335150
    Abstract: In an optical disk including at least a rewritable phase change material and comprising a recording layer having a reflectivity of more than 15%, an address output value as an address pit signal component occupying in a reproduced signal in a non recording state is prescribed to be 0.18 though 0.27 or a numerical aperture of an address pit signal occupying in a reproduced signal in a non recording state is prescribed to be more than 0.3.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: December 18, 2012
    Assignee: JVC Kenwood Corporation
    Inventors: Tetsuya Kondo, Eiji Nakagawa, Hirofumi Nagano
  • Patent number: 8335151
    Abstract: In an optical disk including at least a rewritable phase change material and comprising a recording layer having a reflectivity of more than 15%, an address output value as an address pit signal component occupying in a reproduced signal in a non recording state is prescribed to be 0.18 though 0.27 or a numerical aperture of an address pit signal occupying in a reproduced signal in a non recording state is prescribed to be more than 0.3.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: December 18, 2012
    Assignee: JVC Kenwood Corporation
    Inventors: Tetsuya Kondo, Eiji Nakagawa, Hirofumi Nagano
  • Patent number: 8304827
    Abstract: A semiconductor device includes a diode formed by making use of a DMOS transistor structure. In addition to such a DMOS transistor structure, the semiconductor device includes a second buried layer of the first conductivity type being provided on a first buried layer of a second conductivity type that is in a floating state. Moreover, the second buried layer of the first conductivity type and a second diffusion region of the first conductive type are connected by a first diffusion region of the first conductivity type. A first electrode is set as anode, and a second electrode and a third electrode are short-circuited and set as cathode.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: November 6, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuki Nakamura, Koji Shirai, Hirofumi Nagano, Jun Morioka, Tsubasa Yamada, Kazuaki Yamaura, Yasunori Iwatsu
  • Patent number: 8223621
    Abstract: In an optical disk including at least a rewritable phase change material and comprising a recording layer having a reflectivity of more than 15%, an address output value as an address pit signal component occupying in a reproduced signal in a non recording state is prescribed to be 0.18 though 0.27 or a numerical aperture of an address pit signal occupying in a reproduced signal in a non recording state is prescribed to be more than 0.3.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: July 17, 2012
    Assignee: JVC Kenwood Corporation
    Inventors: Tetsuya Kondo, Eiji Nakagawa, Hirofumi Nagano
  • Publication number: 20120140610
    Abstract: In an optical disk including at least a rewritable phase change material and comprising a recording layer having a reflectivity of more than 15%, an address output value as an address pit signal component occupying in a reproduced signal in a non recording state is prescribed to be 0.18 though 0.27 or a numerical aperture of an address pit signal occupying in a reproduced signal in a non recording state is prescribed to be more than 0.3.
    Type: Application
    Filed: February 10, 2012
    Publication date: June 7, 2012
    Inventors: Tetsuya Kondo, Eiji Nakagawa, Hirofumi Nagano
  • Publication number: 20120140611
    Abstract: In an optical disk including at least a rewritable phase change material and comprising a recording layer having a reflectivity of more than 15%, an address output value as an address pit signal component occupying in a reproduced signal in a non recording state is prescribed to be 0.18 though 0.27 or a numerical aperture of an address pit signal occupying in a reproduced signal in a non recording state is prescribed to be more than 0.3.
    Type: Application
    Filed: February 10, 2012
    Publication date: June 7, 2012
    Inventors: Tetsuya Kondo, Eiji Nakagawa, Hirofumi Nagano