Abstract: A semiconductor device such as a semiconductor layer is formed of a compound semiconductor layer of III-V group such as GaN. In the case where the substrate has not any planes that are easy to cleave which coincides with an easy-to-cleave plane of a semiconductor layer grown on the substrate or the substrate easily succumbs to cleavage, then the semiconductor layer together with the substrate can be broken into chips in an easy-to-cleave plane. The cleaved surface of the semiconductor layer can be positively formed as an optically superior surface. A compound semiconductor layer 2 containing at least one of the elements {Ga, Al, In} and N is formed on the substrate 1. This compound semiconductor layer 2 has a pair of facets of {11-20} plane substantially perpendicular to the substrate 1.

Abstract: A semiconductor light emitting device is prepared by the steps of forming a semiconductor layer 2 having a laminated structure containing at least a first cladding layer 6, a light emitting layer 7, and a second cladding layer 8 on a substrate 1 having {11-20} plane (plane a) as the main plane; and breaking integrally the semiconductor layer 2 and the substrate 1 under a heating condition to form a pair of facets on the above described substrate due to the plane which was cleaved in {1-102} plane (plane r) and at the same time, to form a pair of facets 3 extending along the above described pair of facets of the substrate 1 on the semiconductor layer 2.

Abstract: A method for vapor deposition includes monitoring of growth of a semiconductor layer by way of in-situ monitoring. According to the invention, in-situ monitoring is performed by irradiating a light beam onto the surface of the growing layer in a direction nearly perpendicular to the surface. Growth parameters of the layer are detected by monitoring variation of the light reflected by the surface of the layer. A growth condition in a vapor deposition chamber is feedback controlled based on the detected growth parameter.

Abstract: A heterojunction bipolar transistor formed as a collector top or emitter top type. This heterojunction bipolar transistor can operate at high speed and can be fabricated into a semiconductor integrated circuit with ease. The manufacturing method thereof is also disclosed.

Abstract: A semiconductor device or a hot electron transistor being constructed such that an InAs base layer is sandwiched between a GaSb emitter barrier layer and a GaInAsSb-system collector barrier layer, which results in preventing hot electrons of unnecessarily high energy from being injected into the collector and an avalanche current from being generated, thereby making it possible to improve the saturation characteristics of the device.

Abstract: A method and apparatus for the combustion treatment of a toxic gas which forms microparticles by combustion are disclosed wherein the toxic gas is subjected to a combustion treatment in a specific combustion furnace where the combustion gas formed is brought into contact with an aqueous film flowing downwards on the inner wall of the furnace from the upper end portion thereof to the lower end portion thereof or with a cooled surface, and then optionally with aqueous droplets dispersed in the interior space of the furnace. The water captures the microparticles formed by combustion of the toxic gas and is discharged out of the furnace as a mixed flow with the combustion gas thus treated, and optionally the mixed flow is successively treated in a gas-liquid separator.

Abstract: A junction field effect transistor having a source region, a gate region and a drain region, which are laminated to form a laminated layer, and a channel region formed on one side surface across the laminated layer, and also having a cavity which separates high impurity concentration regions of the source, gate and drain regions is disclosed. A method for manufacturing the above junction field effect transistor is also disclosed which has the steps of laminating semiconductor layers which become a source region, a gate region and a drain region, respectively, removing portions of the semiconductor layers other than portions which become an active region portion, and forming a channel region on one side surface across the laminated layers of the source region, gate region and drain region by the epitaxial growth method, and also forming cavities.

Abstract: A heterojunction type bi-polar transistor which has a heterojunction in the boundary between an intrinsic base region and an external base region to thereby eliminate the periphery effect and accordingly obtain a high current amplification factor.

Abstract: A III-V semiconductor device is disclosed, which includes an emitter region, an emitter barrier region having such a barrier height as to substantially restrict a thermionic emission current as compared with a tunneling current and such a barrier width as to permit the tunneling current, a base region containing indium and having higher electron affinity than said emitter region and a collector barrier region having such a barrier height as to substantially prohibit a thermally distributed electron from overflowing and such a barrier width as to substantially prohibit the tunneling current.

Abstract: A method of manufacturing a heterojunction bipolar transistor in which a collector region, a base region and an emitter region are successively formed on a compound semiconductor substrate, forming the emitter region by epitaxial growth in a concave portion formed on an electrode leading region at the base region.

Abstract: A luminescent material is disclosed which has the general formula:Zn.sub.1-x Cd.sub.x S:Ce.sub.y, M.sub.zwherein M is at least one alkali metal selected from Li, Na, K, Rb, and Cs, x is from about 0 to about 0.3, y and z are densities (g-atom/mol Zn.sub.1-x Cd.sub.x S) of Ce and M relative to Zn.sub.1-x Cd.sub.x S, y is from about 7.times.10.sup.-6 to about 1.5.times.10.sup.-2, and z is from about 7.times.10.sup.-6 to about 1.5.times.10.sup.-2.A method for making a luminescent material having the general formula:(ZnCd)S:Ce,Mwherein M is at least one alkali metal selected from Li, Na, K, Rb and Cs is disclosed which comprises the steps of preparing a mixture of (ZnCD)S:Ce compound, and alkali metal compound, heating the mixture under non-oxidizing atmosphere at a temperature between about 900.degree. C. and about 1170.degree. C., and quenching said mixture from said temperature.

Abstract: In an electrodeposition process using a fused-salt electrolyte in which a desired metal or alloy deposited by electrolysis can be dissolved, and/or using a fused-salt electrolyte from which a highly viscous material is produced on the surface of an electrodeposited metal or alloy upon electrodeposition of the desired metal or alloy, solid particles are dispersed in the aforesaid electrolyte in order to obtain a flat surface of the desired electrodeposited metal or alloy, whereby continuous electrodeposition can be carried out.