Patents by Inventor Hiroji Shimizu

Hiroji Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210057822
    Abstract: A wireless communication device includes: an antenna for transmitting and receiving a radio wave, a rectifying circuit that is connected to the antenna and rectifies the radio wave received by the antenna to generate voltage, an internal circuit that operates by the voltage generated by the rectifying circuit, and a switch circuit that is disposed contactlessly with respect to the antenna and operates on the basis of an output signal of the internal circuit, wherein the switch circuit includes a coupling wiring and a switch element, and the operation of the switch element varies the impedance of the antenna so that communication can be carried out.
    Type: Application
    Filed: March 4, 2019
    Publication date: February 25, 2021
    Applicant: Toray Industries, Inc.
    Inventors: Yoshihiro KARIYA, Kenta NOGUCHI, Hiroji SHIMIZU, Seiichiro MURASE, Hisashi NISHIKAWA
  • Publication number: 20200321399
    Abstract: A memory array includes: a plurality of first wires; at least one second wire crossing the first wires; and a plurality of memory elements provided in correspondence with respective intersections of the first wires and the at least one second wire and each having a first electrode and a second electrode arranged spaced apart from each other, a third electrode connected to one of the at least one second wire, and an insulating layer that electrically insulates the first electrode and the second electrode and the third electrode from each other, the first wires, the at least one second wire, and the first wires, the at least one second wire, and the memory elements being formed on a substrate.
    Type: Application
    Filed: May 29, 2017
    Publication date: October 8, 2020
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Shota KAWAI, Seiichiro MURASE, Hiroji SHIMIZU
  • Publication number: 20200244182
    Abstract: An object of the present invention is to provide an excellent integrated circuit by a simple process.
    Type: Application
    Filed: October 25, 2018
    Publication date: July 30, 2020
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Hiroji SHIMIZU, Seiichiro MURASE
  • Patent number: 10636866
    Abstract: Provided is a capacitor that has good bonding between the dielectric layer and the conductive layer, has a characteristic of low ESR, and keeps leak current suppressed. The capacitor contains a dielectric layer and a conductive film and is characterized in that the dielectric layer contains an organic compound and a metal compound and that the conductive film contains a conductive material and an organic compound.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: April 28, 2020
    Assignee: TORAY INDUSTRIES, INC.
    Inventors: Hiroji Shimizu, Junji Wakita, Seiichiro Murase
  • Patent number: 10611868
    Abstract: An object of the present invention is to provide a ferroelectric memory element which has a low driving voltage and which can be formed by coating. The present invention provides a ferroelectric memory element including at least: a first conductive film; a second conductive film; and a ferroelectric layer provided between the first conductive film and the second conductive film; wherein the ferroelectric layer contains ferroelectric particles and an organic component, and wherein the ferroelectric particles have an average particle size of from 30 to 500 nm.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: April 7, 2020
    Assignee: TORAY INDUSTRIES, INC.
    Inventors: Junji Wakita, Hiroji Shimizu, Shota Kawai, Seiichiro Murase
  • Patent number: 10615352
    Abstract: An excellent complementary semiconductor device is provided using a simple process. An n-type drive semiconductor device including a substrate; and a source electrode, a drain electrode, a gate electrode, a gate insulating layer, and a semiconductor layer on the substrate; and including a second insulating layer on the opposite side of the semiconductor layer from the gate insulating layer; in which the second insulating layer contains an organic compound containing a bond between a carbon atom and a nitrogen atom; and in which the semiconductor layer contains a carbon nanotube composite having a conjugated polymer attached to at least a part of the surface thereof.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: April 7, 2020
    Assignee: TORAY INDUSTRIES, INC.
    Inventors: Hiroji Shimizu, Seiichiro Murase, Daisuke Sakaii
  • Patent number: 10490748
    Abstract: There is provided a rectifying element which is provided with an insulating base, (a) a pair of electrodes composed of a first electrode and a second electrode and (b) a semiconductor layer arranged between the pair of electrodes, wherein the components (a) and (b) are provided on a first surface of the insulating base. The rectifying element is configured such that the semiconductor layer (b) contains carbon nanotube composites each of which comprises a carbon nanotube and a conjugated polymer adhered onto at least a part of the surface of the carbon nanotube. The present invention provides a rectifying element having excellent rectifying properties by a simple process.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: November 26, 2019
    Assignee: TORAY INDUSTRIES, INC.
    Inventors: Hiroji Shimizu, Seiichiro Murase
  • Publication number: 20190198786
    Abstract: Provided is a method for manufacturing a field-effect transistor, the method including the steps of: forming a gate electrode on the surface of a substrate; forming a gate insulating layer on the gate electrode; forming a conductive film containing a conductor and a photosensitive organic component by a coating method on the gate insulating layer; exposing the conductive film from the rear surface side of the substrate with the gate electrode as a mask; developing the exposed conductive film to form a source electrode and a drain electrode; and forming a semiconductor layer by a coating method between the source electrode and the drain electrode. This method makes it possible to provide an FET, a semiconductor device, and an RFID which can be prepared by a simple process, and which have a high mobility, and have a gate electrode and source/drain electrodes aligned with a high degree of accuracy.
    Type: Application
    Filed: September 6, 2017
    Publication date: June 27, 2019
    Applicant: Toray Industries, Inc.
    Inventors: Hiroji Shimizu, Seiichiro Murase, Shota Kawai
  • Publication number: 20190027700
    Abstract: An excellent complementary semiconductor device is provided using a simple process. An n-type drive semiconductor device including a substrate; and a source electrode, a drain electrode, a gate electrode, a gate insulating layer, and a semiconductor layer on the substrate; and including a second insulating layer on the opposite side of the semiconductor layer from the gate insulating layer; in which the second insulating layer contains an organic compound containing a bond between a carbon atom and a nitrogen atom; and in which the semiconductor layer contains a carbon nanotube composite having a conjugated polymer attached to at least a part of the surface thereof.
    Type: Application
    Filed: January 19, 2017
    Publication date: January 24, 2019
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Hiroji SHIMIZU, Seiichiro MURASE, Daisuke SAKAII
  • Publication number: 20180327530
    Abstract: An object of the present invention is to provide a ferroelectric memory element which has a low driving voltage and which can be formed by coating. The present invention provides a ferroelectric memory element including at least: a first conductive film; a second conductive film; and a ferroelectric layer provided between the first conductive film and the second conductive film; wherein the ferroelectric layer contains ferroelectric particles and an organic component, and wherein the ferroelectric particles have an average particle size of from 30 to 500 nm.
    Type: Application
    Filed: November 21, 2016
    Publication date: November 15, 2018
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Junji WAKITA, Hiroji SHIMIZU, Shota KAWAI, Seiichiro MURASE
  • Publication number: 20180277619
    Abstract: Provided is a capacitor that has good bonding between the dielectric layer and the conductive layer, has a characteristic of low ESR, and keeps leak current suppressed. The capacitor contains a dielectric layer and a conductive film and is characterized in that the dielectric layer contains an organic compound and a metal compound and that the conductive film contains a conductive material and an organic compound.
    Type: Application
    Filed: October 14, 2016
    Publication date: September 27, 2018
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Hiroji SHIMIZU, Junji WAKITA, Seiichiro MURASE
  • Publication number: 20180224392
    Abstract: The present invention is to provide a semiconductor element achieving a high-level detection sensitivity when utilized as a sensor. The present invention relates to a semiconductor element including an organic film, a first electrode, a second electrode, and a semiconductor layer, in which the first electrode, the second electrode and the semiconductor layer are formed on the organic film, the semiconductor layer is arranged between the first electrode and the second electrode, the semiconductor layer contains a carbon nanotube, and the organic film has a water contact angle of 5° or more and 50° or less.
    Type: Application
    Filed: August 8, 2016
    Publication date: August 9, 2018
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Kazuki ISOGAI, Seiichiro MURASE, Hiroji SHIMIZU
  • Publication number: 20180210337
    Abstract: An object of the present invention is to provide a method for accurately forming an antenna substrate as well as an antenna substrate with wiring line and electrode by a coating method. One aspect of the present invention provides a method for producing an antenna substrate with wiring line and electrode including the steps of: (1) forming a coating film using a photosensitive paste containing a conductive material and a photosensitive organic component on an insulating substrate; (2-A) processing the coating film into a pattern corresponding to an antenna by photolithography; (2-B) processing the coating film into a pattern corresponding to a wiring line; (2-C) processing the coating film into a pattern corresponding to an electrode; (3-A) curing the pattern corresponding to an antenna into an antenna; (3-B) curing the pattern corresponding to a wiring line into a wiring line; and (3-C) curing the pattern corresponding to an electrode into an electrode.
    Type: Application
    Filed: August 10, 2016
    Publication date: July 26, 2018
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Junji WAKITA, Hiroji SHIMIZU, Seiichiro MURASE
  • Publication number: 20180026197
    Abstract: There is provided a rectifying element which is provided with an insulating base, (a) a pair of electrodes composed of a first electrode and a second electrode and (b) a semiconductor layer arranged between the pair of electrodes, wherein the components (a) and (b) are provided on a first surface of the insulating base. The rectifying element is configured such that the semiconductor layer (b) contains carbon nanotube composites each of which comprises a carbon nanotube and a conjugated polymer adhered onto at least a part of the surface of the carbon nanotube. The present invention provides a rectifying element having excellent rectifying properties by a simple process.
    Type: Application
    Filed: September 21, 2017
    Publication date: January 25, 2018
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Hiroji Shimizu, Seiichiro Murase
  • Publication number: 20170263874
    Abstract: Provided is a CNT composite capable of achieving both high detection sensitivity and specific detection when used as a sensor. The carbon nanotube composite includes an aggregation inhibitor (A) and a blocking agent (B) attached to at least a portion of a surface.
    Type: Application
    Filed: November 19, 2015
    Publication date: September 14, 2017
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Kazuki Isogai, Seiichiro Murase, Hiroji Shimizu
  • Publication number: 20170244041
    Abstract: A carbon nanotube composite has an organic substance attached to at least a part of a surface thereof. At least one functional group selected from a hydroxyl group, a carboxy group, an amino group, a mercapto group, a sulfo group, a phosphonic acid group, an organic or inorganic salt thereof, a formyl group, a maleimide group and a succinimide group is contained in at least a part of the carbon nanotube composite.
    Type: Application
    Filed: May 5, 2017
    Publication date: August 24, 2017
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Seiichiro Murase, Kazuki lsogai, Hiroji Shimizu
  • Patent number: 9691935
    Abstract: An impurity-diffusing composition including (A) a polysiloxane represented by Formula (1) and (B) an impurity diffusion component. In the formula, R1 represents an aryl group having 6 to 15 carbon atoms, and a plurality of R1 may be the same or different. R2 represents any of a hydroxyl group, an alkyl group having 1 to 6 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkenyl group having 2 to 10 carbon atoms, an acyl group having 2 to 6 carbon atoms, and an aryl group having 6 to 15 carbon atoms, and a plurality of R2 may be the same or different. R3 and R4 each represent any of a hydroxyl group, an alkyl group having 1 to 6 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkenyl group having 2 to 10 carbon atoms, and an acyl group having 2 to 6 carbon atoms, and a plurality of R3 and a plurality of R4 each may be the same or different. The ratio of n:m is 95:5 to 25:75.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: June 27, 2017
    Assignee: TORAY INDUSTRIES, INC.
    Inventors: Sachio Inaba, Seiichiro Murase, Hiroji Shimizu, Kouichi Dan, Mitsuhito Suwa
  • Publication number: 20160372626
    Abstract: An impurity-diffusing composition including (A) a polysiloxane represented by Formula (1) and (B) an impurity diffusion component. In the formula, R1 represents an aryl group having 6 to 15 carbon atoms, and a plurality of R1 may be the same or different. R2 represents any of a hydroxyl group, an alkyl group having 1 to 6 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkenyl group having 2 to 10 carbon atoms, an acyl group having 2 to 6 carbon atoms, and an aryl group having 6 to 15 carbon atoms, and a plurality of R2 may be the same or different. R3 and R4 each represent any of a hydroxyl group, an alkyl group having 1 to 6 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkenyl group having 2 to 10 carbon atoms, and an acyl group having 2 to 6 carbon atoms, and a plurality of R3 and a plurality of R4 each may be the same or different. The ratio of n:m is 95:5 to 25:75.
    Type: Application
    Filed: June 30, 2014
    Publication date: December 22, 2016
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Sachio Inaba, Seiichiro Murase, Hiroji Shimizu, Kouichi Dan, Mitsuhito Suwa
  • Publication number: 20160155948
    Abstract: A carbon nanotube composite has an organic substance attached to at least a part of a surface thereof. At least one functional group selected from a hydroxyl group, a carboxy group, an amino group, a mercapto group, a sulfo group, a phosphonic acid group, an organic or inorganic salt thereof, a formyl group, a maleimide group and a succinimide group is contained in at least a part of the carbon nanotube composite.
    Type: Application
    Filed: July 17, 2014
    Publication date: June 2, 2016
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Seiichiro Murase, Kazuki Isogai, Hiroji Shimizu
  • Publication number: 20160035457
    Abstract: There is provided a field effect transistor which comprises a gate insulating layer, a gate electrode, a semiconductor layer, a source electrode and a drain electrode. The gate insulating layer contains an organic compound that contains a silicon-carbon bond and a metal compound that contains a bond between a metal atom and an oxygen atom; and the metal atoms are contained in the gate insulating layer in an amount of 10 to 180 parts by weight with respect to 100 parts by weight of the total of carbon atoms and silicon atoms. This field effect transistor (FET) has high mobility and a low voltage of the threshold value, while being suppressed in leak current.
    Type: Application
    Filed: March 11, 2014
    Publication date: February 4, 2016
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Seiichiro Murase, Maiko Yamamoto, Junji Mata, Hiroji Shimizu