Patents by Inventor Hirokazu So

Hirokazu So has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120317458
    Abstract: A non-volatile storage device includes one or more non-volatile memories for storing data, and a memory controller for carrying out the control of the non-volatile memory. The non-volatile memory includes the plurality of blocks, which are erase units, and the block includes the plurality of pages, which are write units of data, in each of the blocks at least one set of pages existing which include at least two pages sharing one word line. The memory controller configures a plurality of error correcting groups, each including at least one data page, which is a page for storing data, and at least one error correcting code page for storing a code for error correcting calculation of the data page, and assigns a page of a separate word line with respect to each of the data page and the error correcting page in the same error correcting group.
    Type: Application
    Filed: May 3, 2012
    Publication date: December 13, 2012
    Inventors: Hirokazu SO, Toshiyuki Honda
  • Publication number: 20120317340
    Abstract: A non-volatile storage device comprises non-volatile memories for storing data; and a memory controller for carrying out control of the non-volatile memory. The memory controller stores second error correcting code as well as first error correcting code stored in the same page of the data. The memory controller, when writing data smaller than a predefined size, does not add the second error correcting code, and stores duplexed data of the data and the first correcting code in a different page. The memory controller, when reading, corrects data using the first and/or second correcting code. The valid data management table manages which logical block stores valid data with respect to an identical logical address.
    Type: Application
    Filed: March 30, 2012
    Publication date: December 13, 2012
    Inventors: Hirokazu SO, Toshiyuki Honda
  • Patent number: 8307149
    Abstract: A nonvolatile memory device (101) includes a plurality of physical blocks, each of which is provide with a nonvolatile memory (103), a logic/physical address conversion table, a temporary block and a temporary table. The nonvolatile memory (103) includes a plurality of pages which are predetermined writing units, respectively. The logical-physical address conversion table (106) stores correspondence information between logic addresses and physical addresses of data to be stored in the physical blocks. The temporary block is a physical block to store data that are smaller in size than those of the page. The temporary table (107) stores correspondence information between logic addresses and physical addresses with respect to data to be stored in the temporary block.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: November 6, 2012
    Assignee: Panasonic Corporation
    Inventors: Toshiyuki Honda, Hirokazu So, Shigekazu Kogita, Masayuki Toyama, Seiji Nakamura, Masato Suto, Manabu Inoue
  • Patent number: 8090920
    Abstract: A recording medium stores contents and contents keys to be used for encrypting the contents, in a plurality of storage formats. The storage formats include a storage format (a first format) for delivered contents acquired through a network, and a storage format (a second format) for local contents acquired by a method other than the delivery. The intrinsic storage formats of the contents to be stored in the recording medium are determined according to the kinds of the contents. The recording medium stores not only the contents and the contents keys but also original storage format information (an import flag) (851) which is information indicating the intrinsic storage formats of the contents. With reference to the original storage format information, a reproduction device selects a reproduction method in accordance with the intrinsic storage formats of the contents.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: January 3, 2012
    Assignee: Panasonic Corporation
    Inventors: Hirokazu So, Makoto Ochi, Takuji Maeda, Masato Suto, Kazuya Fujimura, Shinji Inoue, Yukiko Inoue
  • Publication number: 20110320692
    Abstract: Provided is a method for stabilizing and increasing the speed of processing for writing a plurality of different-sized files such as a video file and a management file in parallel in the case where the area in a non-volatile memory of an information recording module is managed by a file system. An access module (1) includes a means for retaining sequential areas in logical block units as areas for writing file data, and a means for realizing file data addition and overwriting by writing data to logical blocks and changing links in a FAT regardless of whether file data addition or overwriting is performed. Writing to the information recording module is performed by writing to sequential addresses in the logical blocks. This realizes the stabilization of and an increase in the file data recording speed by suppressing needless copy processing performed in the information recording module 2 in the case of recording a plurality of files such as a video file and a management file in parallel.
    Type: Application
    Filed: October 19, 2010
    Publication date: December 29, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Takuji Maeda, Masayuki Toyama, Hirokazu So, Yoshinori Nakashima, Katsumi Watanabe, Masafumi Nosaka
  • Patent number: 8069306
    Abstract: Area management information is cached in a cache memory by controlling the access size when an information processor accesses the area management information in an information recording medium. When the processing content of the information processor is to retrieve a free area from the area management information, a physical management block size determined from the physical characteristics of the information recording medium is used. When the processing content is to acquire a link destination from the area management information, minimum access unit of the information recording medium is used. Consequently, overhead can be lessened when the area management information is accessed.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: November 29, 2011
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Masato Suto, Hirokazu So, Makoto Ochi, Shinji Inoue
  • Publication number: 20110258372
    Abstract: A memory device, a host device, and a memory system enable real-time recording of a plurality of files of data while preventing the buffer size of a host device from increasing. A memory device (1) has first and second data write modes. A host device (2) uses the second data write mode when recording a plurality of files of data. In accordance with a command provided from the host device (2), the memory device (1) relocates data that has been written in the second data write mode in a manner that the data is arranged in the same state as when the data is written in the first data write mode.
    Type: Application
    Filed: July 27, 2010
    Publication date: October 20, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Masayuki Toyama, Hirokazu So
  • Publication number: 20110225370
    Abstract: When multiple pieces of content data are being recorded continuously to a nonvolatile storage device having page cache function, a preparation time before starting next content data recording is reduced. When a cache releasing section of a nonvolatile storage device (1) receives cache releasing from an access device (2), it releases addresses included in one logical block among multiple addresses which are cache objects at the same time. Further, the nonvolatile storage device (1) includes a cache information outputting section which outputs information regarding a time period required for releasing addresses which are cache objects outside, and the access device (2) refers to the information to select the address to be an object of releasing.
    Type: Application
    Filed: August 10, 2010
    Publication date: September 15, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Hirokazu So, Takuji Maeda, Masayuki Toyama
  • Publication number: 20110213915
    Abstract: A nonvolatile storage device includes a nonvolatile memory that stores data and a memory controller that controls the nonvolatile memory. The memory controller accepts a pause instruction to pause writing from the access device within a period in which data from the access device are written, and writes the data received from the access device to the nonvolatile memory within a predetermined time interval, then pauses the writing and accepts read and/or write of new data from the access device.
    Type: Application
    Filed: February 8, 2011
    Publication date: September 1, 2011
    Inventors: Hirokazu SO, Toshiyuki HONDA
  • Publication number: 20110167208
    Abstract: The nonvolatile memory device prevents data writing from temporarily slowing down significantly in the middle of writing data to a block when an access device writes all the data in the block in units of a smaller size than the block. The nonvolatile memory device (100) comprises a memory controller (110) including an interface unit (101) configured to receive a first command that identifies a first write range for writing data, and a second command that identifies a second write range that is a part of the first write range and orders to write data to the second write range, an address management unit (106) configured to determine, before data is written into a nonvolatile memory, a new block for writing data to the first write range based on the first command, and a read/write control unit (103) configured to write data to the new block in response to the second command.
    Type: Application
    Filed: May 14, 2010
    Publication date: July 7, 2011
    Inventors: Hirokazu So, Masayuki Toyama
  • Publication number: 20110138117
    Abstract: A digital still camera performs temporary high-speed writing when capturing a large number of images in a short time. Lengthy processing for erased block allocation or copying performed inside a nonvolatile storage device may disable the captured images to be written completely (may cause some frames to drop). A nonvolatile storage system includes an access device (1001) and a nonvolatile storage device (1002). A button operation of a user on the access device (1001) causes the mode of data writing to the nonvolatile storage device (1002) to be switched. Temporary high-speed writing is performed into a physical block of a nonvolatile memory (27) from which a plurality of data pieces with different logical addresses and different data sizes have been erased. After the temporary high-speed writing, the written data is relocated into a user storage area (272), and an erased block is newly allocated for subsequent temporary high-speed data writing.
    Type: Application
    Filed: May 13, 2010
    Publication date: June 9, 2011
    Inventors: Masahiro Nakamura, Hirokazu So, Masahiro Nakanishi
  • Patent number: 7930501
    Abstract: Each of memory cards can have a different type and can be in a plurality of statuses. The memory cards are managed by a file system and data is read/written from/to the memory cards via an access device. Each of the memory cards has a recording area in which data is recorded and managed by an independent file system, a state storage section for storing state assigned to each of combinations of the memory card type and status and being capable of uniquely identifying the combination, and card information storage sections the number of which is identical to the number of states the memory card can have, and which store physical characteristics concerning the recording area. The access device acquires from the memory card a state enable uniquely identifying the memory card type and status. According to the state acquired, the access device identifies the type and status of the memory card and executes processing in accordance with the memory card state.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: April 19, 2011
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Hirokazu So, Shinji Inoue
  • Publication number: 20110055467
    Abstract: Area management information is cached in a cache memory by controlling the access size when an information processor accesses the area management information in an information recording medium. When the processing content of the information processor is to retrieve a free area from the area management information, a physical management block size determined from the physical characteristics of the information recording medium is used. When the processing content is to acquire a link destination from the area management information, minimum access unit of the information recording medium is used. Consequently, overhead can be lessened when the area management information is accessed.
    Type: Application
    Filed: November 9, 2010
    Publication date: March 3, 2011
    Inventors: Takuji MAEDA, Masato Suto, Hirokazu So, Makoto Ochi, Shinji Inoue
  • Publication number: 20100318760
    Abstract: A method for use in a nonvolatile storage device that can resize one or more partitions prevents an address management table from becoming complicated after repeated resizing of partitions. When a partition is resized, a logical-to-physical conversion table is updated by shifting a physical block address corresponding to a partition subsequent to the resized partition by the resized amount of the partition. The method enables both logical addresses corresponding to partitions and logical addresses not corresponding to partitions to be constantly continuous to one another.
    Type: Application
    Filed: January 28, 2009
    Publication date: December 16, 2010
    Inventors: Hirokazu So, Hiroshi Sakurai, Hirofumi Nakagaki, Masato Suto
  • Patent number: 7840749
    Abstract: Area management information is cached in a cache memory by controlling the access size when an information processor accesses the area management information in an information recording medium. When the processing content of the information processor is to retrieve a free area from the area management information, a physical management block size determined from the physical characteristics of the information recording medium is used. When the processing content is to acquire a link destination from the area management information, minimum access unit of the information recording medium is used. Consequently, overhead can be lessened when the area management information is accessed.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: November 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Masato Suto, Hirokazu So, Makoto Ochi, Shinji Inoue
  • Patent number: 7840729
    Abstract: A semiconductor memory card (101) has a plurality of areas (105, 106) based on different file systems. An adapter (102) includes: an area switching part (110) which a user can operates, a determination part (109) for determining the operation; and a card controller (108) for issuing a switching command for switching the area to be used for the semiconductor memory card (101) in accordance with the judgment result. When the switching command is issued in response to input from the area switching part (110), the command is interpreted by an area selector (107) of the semiconductor memory card (101) so as to select an area.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: November 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Shinji Inoue, Kazuya Fujimura, Yukiko Inoue, Takuji Maeda, Makoto Ochi, Masato Suto, Hirokazu So
  • Patent number: 7801930
    Abstract: A semiconductor recording medium holds an open flag showing presence or absence of consistency between content data stored in a data storage section and file system management information, in a system region not directly accessible from a host device. Upon receipt of a write request or erase request to the data storage section from the host device, the semiconductor recording medium automatically updates the open flag to “ON” (value showing possibility of inconsistency). When actual consistency is verified, the host device requests the recording medium to set the open flag to “OFF” (value showing presence of consistency). When mounting, the host device refers to the open flag with a special command to judge necessity for error check process.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: September 21, 2010
    Assignee: Panasonic Corporation
    Inventors: Hirokazu So, Takuji Maeda, Shinji Inoue
  • Publication number: 20100146633
    Abstract: In a memory controller according to the present invention, an external I/F unit receives ID information associated with data from the outside of a non-volatile memory, and a recording controller manages a recording position of the data in the non-volatile memory based on the ID information, so that an amount of time necessary for the retrieval of rights information based on the ID information is reduced.
    Type: Application
    Filed: February 10, 2009
    Publication date: June 10, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Makoto Ochi, Hiroki Etoh, Masahiro Nakanishi, Hirokazu So, Hiroshi Sakurai, Masato Suto
  • Publication number: 20100083006
    Abstract: A memory controller receives an application identifier for identifying an application from an outside, an application, reference data to be referenced by the application, and a signature for the application and writes the application and the reference data. After receiving the application identifier from the outside, the memory controller accesses memory means which manages the application identifier and the application management state and reads out the management state of the target application. According to the management state, necessary data is decided. Since the judgment result is informed to the outside, there is no need of receiving applications more than necessary and it is possible to reduce the load on the signature process and the application reception process.
    Type: Application
    Filed: May 23, 2008
    Publication date: April 1, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Hirokazu So, Yasuo Takeuchi, Yoshihiko Takagi, Osamu Sasaki
  • Publication number: 20100058074
    Abstract: A right information encryption module 110a comprises a key generation part 111a, a right information encryption part 112a, and a key management information generation part 113a. Key information Km and key management information Mm corresponding to right information are generated and then recorded into a secret recording module 130a. In addition, the right information is encrypted, and then the encrypted right information Enc_a (ROm, Km) and the key management information Mm are recorded into a recording module 140a. This can eliminate the possibility of a capability shortage of a secret area caused by an increase in the data size of the right information including the key information and use restriction information for a content.
    Type: Application
    Filed: March 10, 2008
    Publication date: March 4, 2010
    Inventors: Hiroshi Sakurai, Hirofumi Nakagaki, Hirokazu So, Masahiro Nakanishi