Patents by Inventor Hiroki Mouri

Hiroki Mouri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7065029
    Abstract: A waveform equalizer, which has a partial response characteristic represented in the form of PR (a, b, c, b, a) which is a quaternary transfer function characteristic, is made up an analog filter, an ADC (analog/digital converter), and an FIR filter, for providing matching with the frequency characteristic of a read back waveform read from a recording medium. Such signal processor characteristic approximation to the regenerative signal characteristic makes it possible to easily achieve equalization without particularly emphasizing the regenerative signal, thereby achieving a reduced circuit scale.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: June 20, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Mouri, Kouichi Nagano, Akira Yamamoto
  • Publication number: 20050270677
    Abstract: A write compensation circuit of a recording device includes a first delay portion driven by a first driving voltage, for receiving a clock signal, delaying the clock signal by a first delay time, and outputting the delayed clock signal, and a voltage supplying portion for supplying the first driving voltage to the first delay portion in such a manner that the first delay time is substantially equal to a clock period of the clock signal.
    Type: Application
    Filed: August 8, 2005
    Publication date: December 8, 2005
    Inventors: Hirokuni Fujivama, Shiro Dosho, Hiroyuki Nakahira, Akira Yamamoto, Hiroki Mouri
  • Patent number: 6970313
    Abstract: A write compensation circuit of a recording device includes a first delay portion driven by a first driving voltage, for receiving a clock signal, delaying the clock signal by a first delay time, and outputting the delayed clock signal, and a voltage supplying portion for supplying the first driving voltage to the first delay portion in such a manner that the first delay time is substantially equal to a clock period of the clock signal.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: November 29, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirokuni Fujiyama, Shiro Dosho, Hiroyuki Nakahira, Akira Yamamoto, Hiroki Mouri
  • Patent number: 6778483
    Abstract: An encoding efficiency higher than 1 is achieved by accomplishing ternary recording on a recording medium. For this purpose, an 8-bit binary data word is converted to a 5-symbol ternary code word. A look-up table stores a modulation/demodulation table defining the correspondence between the binary data word (8B) and the ternary code word (5T). A table generating circuit generates the modulation/demodulation table to be stored in the look-up table such that each of constraints specified by a plurality of parameters is satisfied. If a PRML (Partial Response Maximum Likelihood) scheme is combined with an 8B5T code thus obtained, a signal-to-noise ratio is improved.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: August 17, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Mouri, Takashi Yamamoto, Hiroyuki Nakahira, Akira Yamamoto
  • Publication number: 20040136300
    Abstract: The present invention is made to improve the conventional analog processing that is easily affected by variations in semiconductor processing. This invention provides a wobble signal processing apparatus that can reduce the circuit scale and the power consumption as well as improve the quality of signal processing. The wobble signal processing apparatus of the present invention digitally processes a part that has conventionally been processed by an analog system, and further a PRML circuit is provided to implement error detection, whereby the circuit scale and the power consumption is reduced. This improves the detection of a signal that is inputted to the wobble signal processing apparatus.
    Type: Application
    Filed: November 28, 2003
    Publication date: July 15, 2004
    Inventors: Hiroki Mouri, Kouji Okamoto, Youichi Ogura
  • Patent number: 6745218
    Abstract: An adaptive digital filter of the present invention includes: a pipelined filtering section for performing a filtering operation based on input data and coefficient data so as to output filtered data; and a non-pipelined adaptation section for outputting the coefficient data to the pipelined filtering section by performing a coefficient adaptation operation in a non-pipelined process based on the input data and the filtered data so that the filtered data output from the pipelined filtering section converges to a predetermined reference value.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: June 1, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akira Yamamoto, Hiroyuki Nakahira, Hirokuni Fujiyama, Hiroki Mouri
  • Publication number: 20030198165
    Abstract: The signal processor includes an analog filter, an analog-to-digital (A-D) converter, an adaptive equalization filter, a quality value calculating circuit, and a control circuit. The analog filter removes high-frequency noises of a played-back signal from a recording medium and amplifies a specific frequency band of the played-back signal. The A-D converter converts the played-back signal from the analog filter into a digital signal. The adaptive equalization filter performs waveform equalization of the played-back signal from the A-D converter while adjusting a tap coefficient of the adaptive equalization filter so as to reduce a difference between an output of the adaptive equalization filter and a target value. The quality value calculating circuit calculates a quality value based on the difference between the output of the adaptive equalization filter and the target value.
    Type: Application
    Filed: March 3, 2003
    Publication date: October 23, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hiroki Mouri, Hiroyuki Nakahira, Akira Yamamoto
  • Publication number: 20030002418
    Abstract: A waveform equalizer, which has a partial response characteristic represented in the form of PR (a, b, c, b, a) which is a quaternary transfer function characteristic, is made up an analog filter, an ADC (analog/digital converter), and an FIR filter, for providing matching with the frequency characteristic of a read back waveform read from a recording medium. Such signal processor characteristic approximation to the regenerative signal characteristic makes it possible to easily achieve equalization without particularly emphasizing the regenerative signal, thereby achieving a reduced circuit scale.
    Type: Application
    Filed: June 14, 2002
    Publication date: January 2, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Mouri, Kouichi Nagano, Akira Yamamoto
  • Publication number: 20020054557
    Abstract: An encoding efficiency higher than 1 is achieved by accomplishing ternary recording on a recording medium. For this purpose, an 8-bit binary data word is converted to a 5-symbol ternary code word. A look-up table stores a modulation/demodulation table defining the correspondence between the binary data word (8B) and the ternary code word (5T). A table generating circuit generates the modulation/demodulation table to be stored in the look-up table such that each of constraints specified by a plurality of parameters is satisfied. If a PRML (Partial Response Maximum Likelihood) scheme is combined with an 8B5T code thus obtained, a signal-to-noise ratio is improved.
    Type: Application
    Filed: October 31, 2001
    Publication date: May 9, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Mouri, Takashi Yamamoto, Hiroyuki Nakahira, Akira Yamamoto