Patents by Inventor Hiroki Tanaka

Hiroki Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105575
    Abstract: Embodiments disclosed herein include package substrates and methods of forming package substrates. In an embodiment, the package substrate comprises a core, and a pad over the core, where the pad has a first width. In an embodiment, a surface finish is over the pad, where the surface finish has a second width that is substantially equal to the first width. In an embodiment, the package substrate further comprises a solder resist over the pad, where the solder resist comprises an opening that exposes a portion of the surface finish. In an embodiment, the opening has a third width that is smaller than the second width.
    Type: Application
    Filed: September 26, 2022
    Publication date: March 28, 2024
    Inventors: Jason M. GAMBA, Haifa HARIRI, Kristof DARMAWIKARTA, Srinivas V. PIETAMBARAM, Hiroki TANAKA, Kyle MCELHINNY, Xiaoying GUO, Steve S. CHO, Ali LEHAF, Haobo CHEN, Bai NIE, Numair AHMED
  • Publication number: 20240105580
    Abstract: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, the electronic package comprises a core, and a pad over the core. In an embodiment, a shell is around the core, and a surface finish is over the shell. In an embodiment, the electronic package further comprises a solder resist over the pad, where an opening is formed through the solder resist to expose the surface finish.
    Type: Application
    Filed: September 26, 2022
    Publication date: March 28, 2024
    Inventors: Kristof DARMAWIKARTA, Srinivas V. PIETAMBARAM, Kyle MCELHINNY, Hiroki TANAKA
  • Publication number: 20240105576
    Abstract: Embodiments disclosed herein include package substrates and methods of forming package substrates. In an embodiment, the package substrate comprises a core and a pad over the core. In an embodiment, a solder resist is over the pad, and an opening into the solder resist exposes a portion of the pad. In an embodiment, the package substrate further comprises a surface finish over the pad and within the opening.
    Type: Application
    Filed: September 26, 2022
    Publication date: March 28, 2024
    Inventors: Kyle MCELHINNY, Xiaoying GUO, Hiroki TANAKA, Haobo CHEN
  • Publication number: 20240102925
    Abstract: A moisture content measurement method that calculates moisture content of dehydrated sludge using a calibration curve for calculating the moisture content of the dehydrated sludge, the calibration curve being obtained by performing multivariate regression analysis after first-order differential processing or an offset correction is performed on absorbance for reflected light or reflectance for infrared rays from dehydrated sludge, the absorbance or the reflectance being obtained by measuring the dehydrated sludge using an infrared measurement apparatus provided with a light-receiving unit that can receive at least infrared rays reflected from a target object to be measured and a light source that has a plurality of infrared LEDs that can emit infrared rays having respectively different wavelengths or a light source having an infrared-region tungsten lamp or halogen lamp.
    Type: Application
    Filed: November 30, 2021
    Publication date: March 28, 2024
    Inventors: Yasuko KOBAYASHI, Jun TANAKA, Takuya KAMBAYASHI, Yusuke KAGA, Shunsuke KONO, Kotaro KITAMURA, Makiko UDAGAWA, Hiroki MIYAKAWA
  • Publication number: 20240097079
    Abstract: Integrated circuit (IC) packages are disclosed. In some embodiments, an IC package includes a glass substrate, a micro light emitting diode (LED), a semiconductor die, one or more through glass vias (TGVs) and a package substrate. The micro LED is positioned over the glass substrate. The TGVs are integrated into the glass substrate and connect the micro LED to the semiconductor die. The semiconductor die is connected to the package substrate to receive external signals when connected to a motherboard.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 21, 2024
    Inventors: Brandon C. MARIN, Khaled AHMED, Srinivas V. PIETAMBARAM, Hiroki TANAKA, Paul WEST, Kristof DARMAWIKARTA, Gang DUAN, Jeremy D. ECTON, Suddhasattwa NAD
  • Publication number: 20240096809
    Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 21, 2024
    Applicant: Intel Corporation
    Inventors: Hiroki Tanaka, Robert Alan May, Onur Ozkan, Ali Lehaf, Steve Cho, Gang Duan, Jieping Zhang, Rahul N. Manepalli, Ravindranath Vithal Mahajan, Hamid Azimi
  • Patent number: 11935857
    Abstract: Embodiments described herein include electronic packages and methods of forming such packages. An electronic package includes a package substrate, first conductive pads formed over the package substrate, where the first conductive pads have a first surface area, and second conductive pads over the package substrate, where the second conductive pads have a second surface area greater than the first surface area. The electronic package also includes a solder resist layer over the first and second conductive pads, and a plurality of solder resist openings that expose one of the first or second conductive pads. The solder resist openings of the electronic package may include conductive material that is substantially coplanar with a top surface of the solder resist layer. The electronic package further includes solder bumps over the conductive material in the solder resist openings, where the solder bumps have a low bump thickness variation (BTV).
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: March 19, 2024
    Assignee: Intel Corporation
    Inventors: Kristof Darmawaikarta, Robert May, Sashi Kandanur, Sri Ranga Sai Boyapati, Srinivas Pietambaram, Steve Cho, Jung Kyu Han, Thomas Heaton, Ali Lehaf, Ravindranadh Eluri, Hiroki Tanaka, Aleksandar Aleksov, Dilan Seneviratne
  • Patent number: 11937495
    Abstract: An organic light-emitting device containing both a compound represented by the following general formula (1) and a compound represented by the following general formula (2) has a high light emission efficiency. The rings a to c each are a benzene ring that can be optionally condensed, R1 and R2 each represent a substituted or unsubstituted aryl group, etc., four of R31 to R35 each are a substituted or unsubstituted carbazol-9-yl group, but all of these four are not the same, and the remaining one is a hydrogen atom, a cyano group, etc.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: March 19, 2024
    Assignees: KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION, KWANSEI GAKUIN EDUCATIONAL FOUNDATION, KYULUX, INC.
    Inventors: Hajime Nakanotani, Takuji Hatakeyama, Yasuhiro Kondo, Yasuyuki Sasada, Motoki Yanai, Chin-Yiu Chan, Masaki Tanaka, Hiroki Noda, Chihaya Adachi, Yoshitake Suzuki, Naoto Notsuka
  • Publication number: 20240088522
    Abstract: A bipolar battery is provided with improved productivity and reliability of bonding between a positive electrode and a substrate (bipolar plate) or a negative electrode and the substrate. The bipolar battery includes a bipolar electrode including a positive electrode, a negative electrode, and a substrate having a first surface on which the positive electrode is provided and a second surface on which the negative electrode is provided. A first adhesion layer is provided between the bipolar plate and the positive electrode and/or between the bipolar plate and the negative electrode. A second adhesion layer is provided at the outer periphery of the first adhesion layer of the positive electrode and/or the negative electrode on which the first adhesion layer is provided. The bipolar plate is formed from resin, the first adhesion layer is formed from an adhesion sheet, and the second adhesion layer is formed from an adhesive cured product.
    Type: Application
    Filed: June 9, 2023
    Publication date: March 14, 2024
    Inventors: Kenichi Suyama, Hiroki Tanaka, Yasuo Nakajima, Akira Tanaka
  • Publication number: 20240089588
    Abstract: The imaging method is used in an imaging apparatus including an imaging element that captures a subject image and a moving mechanism configured to change a relative position between the subject image and the imaging element, the imaging method including: a changing step of changing the relative position a plurality of times; an imaging step of acquiring a plurality of first images by capturing the subject image using the imaging element at a plurality of the relative positions; a combining step of generating a second image by combining the plurality of first images; and a display step of performing a temporal display relating to the imaging step or the combining step.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: FUJIFILM Corporation
    Inventors: Kosuke TAKAHASHI, Koichi TANAKA, Shunsuke MIYAGISHIMA, Hiroki SAITO, Tomoki OTSUKI
  • Publication number: 20240087971
    Abstract: Embodiments disclosed herein include interposers and methods of forming interposers. In an embodiment, an interposer comprises a substrate with a first surface and a second surface opposite from the first surface, where the substrate comprises glass. In an embodiment, the interposer further comprises a cavity into the first surface of the substrate, a via through the substrate below the cavity, a first pad in the cavity over the via, and a second pad on the second surface of the substrate under the via.
    Type: Application
    Filed: September 13, 2022
    Publication date: March 14, 2024
    Inventors: Brandon C. MARIN, Gang DUAN, Srinivas V. PIETAMBARAM, Kristof DARMAWIKARTA, Jeremy D. ECTON, Suddhasattwa NAD, Hiroki TANAKA, Pooya TADAYON
  • Publication number: 20240084415
    Abstract: This non-oriented electrical steel sheet includes a base material having a chemical composition including Si: 3.7 to 4.8%, wherein a recrystallization rate is less than 100% in terms of an area fraction, the following Formula (i) and Formula (ii) are satisfied, and the tensile strength is more than 700 MPa. 4.3?Si+sol. Al+0.5×Mn?4.9??(i) (B50(0°)+2×B50(45°)+B50(90°))/4?1.
    Type: Application
    Filed: March 31, 2022
    Publication date: March 14, 2024
    Applicant: NIPPON STEEL CORPORATION
    Inventors: Hiroyoshi YASHIKI, Yoshiaki NATORI, Kazutoshi TAKEDA, Ichiro TANAKA, Yoshihiro ARITA, Hiroki HORI, Wataru OHASHI
  • Publication number: 20240088121
    Abstract: Techniques for a patch to couple one or more surface dies to an interposer or motherboard are provided. In an example, the patch can include multiple embedded dies. In an example, a microelectronic device can be formed to include a patch on an interposer, where the patch can include multiple embedded dies and each die can have a different thickness.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Srinivas PIETAMBARAM, Robert Alan MAY, Kristof DARMAWIKARTA, Hiroki TANAKA, Rahul N. MANEPALLI, Sri Ranga Sai BOYAPATI
  • Patent number: 11926216
    Abstract: A vibration damping device including a vibration-damping device main unit inserted into a mounting space of a bracket from a lateral side and securely supported by the bracket. The bracket includes engaging pieces on respective opposed inside faces of the mounting space, and engaging action of the engaging pieces with respect to respective detent engaging faces formed on a fixture member of the vibration-damping device main unit prevents the vibration-damping device main unit from becoming dislodged from the mounting space of the bracket. Opposed walls of the mounting space are each penetrated by an aperture window, and inspection flat surfaces are separately provided to an outside surface of each engaging piece visible from an outside through the aperture window and a corresponding external side surface of the bracket that is off the aperture window. The inspection flat surfaces are parallel to each other.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: March 12, 2024
    Assignees: SUMITOMO RIKO COMPANY LIMITED, HONDA MOTOR CO., LTD.
    Inventors: Kenji Oki, Shingo Tanaka, Hiroki Kondo, Yusuke Arai, Kozo Kubota
  • Patent number: 11927244
    Abstract: When a contact area with a chain guide is reduced by a back surface of a link plate having a convex portion, a friction coefficient in a fluid lubrication region is reduced. A coating film containing 10% or more of chromium is on the link plate. A friction modifier made of a molybdenum compound and including with a lubricating oil promotes generation of MoS2 by the coating film, and prevents an increase in a friction coefficient in a boundary lubrication region.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: March 12, 2024
    Assignee: DAIDO KOGYO CO., LTD.
    Inventors: Motoki Tanaka, Satoshi Yamashita, Hiroki Nakagawa, Atsushi Hayashi
  • Patent number: 11929330
    Abstract: Embodiments include an electronic package with an embedded multi-interconnect bridge (EMIB) and methods of making such packages. Embodiments include a first layer, that is an organic material and a second layer disposed over the first layer. In an embodiment, a cavity is formed through the second layer to expose a first surface of the first layer. A bridge substrate is in the cavity and is supported by the first surface of the first layer. Embodiments include a first die over the second layer that is electrically coupled to a first contact on the bridge substrate, and a second die over the second layer that is electrically coupled to a second contact on the bridge substrate. In an embodiment the first die is electrically coupled to the second die by the bridge substrate.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: March 12, 2024
    Assignee: Intel Corporation
    Inventors: Kristof Darmawikarta, Hiroki Tanaka, Robert May, Sameer Paital, Bai Nie, Jesse Jones, Chung Kwang Christopher Tan
  • Publication number: 20240071938
    Abstract: A glass core with a cavity-less local interconnect component architecture for complex multi-die packages. The apparatus has the local interconnect component attached directly to a planar glass layer and surrounded by mold. One or more redistribution layers may be located above and below the apparatus.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Applicant: Intel Corporation
    Inventors: Jeremy D. Ecton, Hiroki Tanaka, Brandon Christian Marin, Srinivas V. Pietambaram, Suddhasattwa Nad
  • Patent number: 11914246
    Abstract: A display device (1) includes a light-emitting device (10), a reflective liquid crystal element (20), and an optical member (30). The light-emitting device (10) includes a plurality of light-emitting units (142) and a light-transmitting unit (144) located between the light-emitting units (142) adjacent to each other. The light-emitting device (10) is located between the reflective liquid crystal element (20) and the optical member (30). The plurality of light-emitting units (142) emit light toward the reflective liquid crystal element (20). The light emitted from the plurality of light-emitting units (142) is reflected by the reflective liquid crystal element (20), transmitted through the light-emitting unit (142) of the light-emitting device (10), and formed into an image by the optical member (30).
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: February 27, 2024
    Assignees: Pioneer Corporation, Tohoku Pioneer Corporation
    Inventors: Shinsuke Tanaka, Noriaki Waki, Katsuhiro Kanauchi, Hiroki Tan
  • Patent number: 11916529
    Abstract: A matching circuit performs output impedance matching for an amplifier that amplifies an input signal and outputs an amplified signal. The matching circuit includes a low pass filter and a high pass filter. The ground of the low pass filter and the ground of the high pass filter are isolated from each other.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: February 27, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yusuke Tanaka, Hiroki Shounai
  • Patent number: 11908821
    Abstract: An apparatus, comprising a substrate comprising a dielectric, a conductor, comprising a via embedded within the dielectric, the via has a first end and a second end, and substantially vertical sidewalls between the first end and the second end, and a conductive structure extending laterally from the first end of the via over the dielectric, wherein the via and the conductive structure have a contiguous microstructure.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: February 20, 2024
    Assignee: Intel Corporation
    Inventors: Kristof Darmawikarta, Sri Ranga Sai Boyapati, Hiroki Tanaka, Robert A. May