Abstract: According to one embodiment, a memory controller includes a mode selection part that selects one of a MLC-mode and a SLC-mode, after a write command is decoded by a command decode part, and a write part that executes a data writing to a storage memory by using one of the MLC-mode and the SLC-mode selected by the mode selection part. The mode selection part is configured to check whether a first data wrote from a host to a buffer memory is a time-continuous data that is wrote continuously during a predetermined period, execute the data writing of a second data from the buffer memory to the storage memory in the MLC-mode, when the first data is the time-continuous data, and execute the data writing of the second data from the buffer memory to the storage memory in the SLC-mode, when the first data is not the time-continuous data.

Abstract: A method of controlling a nonvolatile semiconductor memory includes checking, at a first interval period, an error count of data stored in a first group, the first group including a plurality of blocks/units, and when a first block/unit in the first group satisfies a first condition, assigning the first block/unit to a second group. The method includes checking, at a second interval period, an error count of data stored in the second group, the second interval period being shorter than the first interval period, and when a second block/unit in the second group satisfies a second condition, moving data stored in the second block/unit to an erased block/unit in which stored data is erased among the plurality of blocks/units.

Abstract: A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.

Abstract: According to one embodiment, a memory system includes a data manager and a data restorer. The data manager multiplexes difference logs by a parallel writing operation and stores them in a second storage area, the difference logs being difference logs indicating difference information before and after update of a management table; and thereafter multiplexes predetermined data as finalizing logs and stores them in the second storage area. The data restorer determines a system status at startup of the memory system, by judging whether irregular power-off occurs or data destruction occurs in the second storage area, based on a data storage state of the difference logs and the finalizing logs stored in the second storage area.

Abstract: A first log indicating that a system is running is recorded in a second storage unit before a first difference log is recorded in the second storage unit after system startup, and a second log indicating that the system halts is recorded in the second storage unit following the difference log, at the time of normal system halt, and it is judged whether normal system halt has been performed or an incorrect power-off sequence has been performed last time, based on a recorded state of the first and second logs in the second storage unit, at the time of system startup, thereby detecting an incorrect power-off easily and reliably.

Abstract: A method of controlling a nonvolatile semiconductor memory includes patrolling a first pool including a plurality of blocks/units with a first frequency, and when a first block/unit in the first pool satisfies a first condition, assigning the first block/unit to a second pool. The method includes patrolling the second pool with a second frequency, the second frequency being higher than the first frequency, and when a second block/unit in the second pool satisfies a second condition, moving data stored in the second block/unit to a free block/unit.

Abstract: A method of controlling a nonvolatile semiconductor memory including a plurality of blocks, each one of the plurality of blocks being a unit of data erasing, includes determining a monitored block as a candidate for refresh operation from among the plurality of blocks based on a predetermined condition. The method includes monitoring an error count of data stored in the monitored block and not monitoring an error count of data stored in blocks excluding the monitored block among the plurality of blocks. The method also includes performing the refresh operation on data stored in the monitored block in which the error count is larger than a first threshold value.

Abstract: According to the embodiments, a first management table, which is included in a nonvolatile second semiconductor memory and manages data included in a second storage area by a first management unit, is stored in the second semiconductor memory and a second management table for managing data in the second storage area by a second management unit larger than the first management unit is stored in a first semiconductor memory capable of random access.

Abstract: A memory system in embodiments includes a nonvolatile semiconductor memory that stores user data, a forward lookup address translation table and a reverse lookup address translation table, and a controller. The controller is configured to determine that the user data stored in the nonvolatile semiconductor memory is valid or invalid based on these two tables. The controller may perform data organizing of selecting data determined valid and rewriting the data in a new block. The controller may perform write processing and rewriting processing to the new block alternately at a predetermined ratio. The controller may determine whether a predetermined condition is satisfied on a basis of addresses included in write requests and write data in the MLC mode when the condition is satisfied and write data in the SLC mode when the condition is not satisfied.

Abstract: According to the embodiments, a first storing unit as a cache, second and third storing units included in a nonvolatile semiconductor memories, and a controller are included, in which the controller includes an organizing unit that increases a resource by organizing data in the nonvolatile semiconductor memories, and an organizing-state notifying unit that, when an organizing-state notification request is input from a host, outputs an organizing state by the organizing unit to the host as an organizing-state notification, thereby improving a command response speed and the writing efficiency.

Abstract: According to one embodiment, a memory system includes a controller for controlling a data transfer between a nonvolatile memory and a host device. The controller writes, to the nonvolatile memory, management information to be used in the data transfer, a multiplexed pointer indicating a storage position, and a log indicating whether the writing of the pointer is successful, determines whether the multiplexing the pointer by the predetermined number is maintained according to at least one of the pointer and the log, and rewrites the multiplexed pointers to the nonvolatile memory when determining that the multiplexing the pointer by the predetermined number is not maintained.

Abstract: A management information generating method wherein logical and physical block addresses (BAs) of continuous addresses are associated with each other in the BA translation table. When a logical block is constructed, an allowable value is set for the number of defective physical blocks. A logical block having fewer defects than the set number is set usable, and a logical block having more defects than the set number is set unusable. System logical block construction is performed to preferentially select physical blocks from a plane list including a large number of usable blocks to equalize the number of usable blocks in each plane list. It is determined whether the number of free blocks is insufficient on the basis of a first management unit and whether the storage area for the indicated capacity can be reserved on the basis of the management unit different from the first unit.

Abstract: According to one embodiment, a controller reads out the non-volatile address management information required to execute one of the read commands into an address information cache and retrieves data from the nonvolatile memory according to the volatile address management information stored in the address information cache. In addition, the controller among the read commands stored in the command queue, preferentially executes the read command whose logical addresses are all found in the volatile address management information.

Abstract: An information processing system periodically performs a real-time operation including a plurality of chained tasks. The system includes a plurality of processors, a unit for dividing the chained tasks into a first task group and a second task group based on a relationship in order of execution among the tasks, the second task group being executed after the first task group, and a unit for performing a scheduling operation of periodically assigning each of the first task group and the second task group to at least one of the processors to periodically execute the first task group at regular time intervals and periodically execute the second task group at the regular time intervals with a one-period delay relative to the first task group.

Abstract: A forward lookup address translation table and a reverse lookup address translation table stored in a nonvolatile second storing unit are transferred as a master table to a volatile first storing unit at a time of start-up. When an event occurs so that the master table needs to be updated, difference information before and after update of any one of the forward lookup address translation table and the reverse lookup address translation table is recorded in the first storing unit as a log, thereby reducing an amount of the log.

Abstract: A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.

Abstract: A memory system according to an embodiment of the present invention includes a volatile first storing unit, a nonvolatile second storing unit, a controller that transfers data between a host apparatus and the second storing unit via the first storing unit. The memory system monitors whether data written from the host apparatus in the first storing unit has a specific pattern in management units. When data to be flushed to the second storing unit has the specific pattern, the memory system set an invalid address value that is not in use in the second storing unit to the data.

Abstract: A method of controlling a nonvolatile semiconductor memory including a plurality of blocks, each one of the plurality of blocks being a unit of data erasing, includes determining a monitored block as a candidate for refresh operation from among the plurality of blocks based on a predetermined condition. The method includes monitoring an error count of data stored in the monitored block and not monitoring an error count of data stored in blocks excluding the monitored block among the plurality of blocks. The method also includes performing the refresh operation on data stored in the monitored block in which the error count is larger than a first threshold value.

Abstract: According to one embodiment, a free blocks included in a nonvolatile semiconductor memory are classified into a plurality of free block management lists. When a free block is acquired at normal priority, the free block is acquired from the free block management list in which a number of free blocks is larger than a first threshold. When a free block is acquired at high priority, the free block is acquired from the free block management list irrespective of the first threshold.

Abstract: According to the embodiments, a first storage area and a second storage area specified by a trim request is managed by a first management unit, and the second storage area specified by the trim request is managed by a second management unit. A block in which data of the first management unit are all specified by the trim request from the first or second storage areas and a block in which data of the second management unit are all specified by the trim request from the second storage area are released.