Abstract: Embodiments relate to capturing referenced information in a report to resolve a computer problem. A report for a problem is determined to contain at least one referenced document, the report being generated based on at least one log. Relevant content is determined in the at least one referenced document based at least in part on hint information associated with the at least one referenced document and a term in the report. An enhanced report is generated for the problem of the computer equipment by inserting the relevant content into the report. A problem experienced by computer equipment is resolved by causing execution of at least one operation identified in the enhanced report.

Abstract: Embodiments relate to capturing referenced information in a report to resolve a computer problem. A report for a problem is determined to contain at least one referenced document, the report being generated based on at least one log. Relevant content is determined in the at least one referenced document based at least in part on hint information associated with the at least one referenced document and a term in the report. An enhanced report is generated for the problem of the computer equipment by inserting the relevant content into the report. A problem experienced by computer equipment is resolved by causing execution of at least one operation identified in the enhanced report.

Abstract: A self-cleaning catalytic chemical vapor deposition apparatus which suppresses the corrosion-induced degradation of a catalytic body by a cleaning gas without heating a catalytic body to not less than 2000° C. and permits practical cleaning rates and good cleaning at low cost. Conductors supply a constant current to a catalytic body within a reaction chamber from a heating power supply. Terminals of the heating power supply are electrically insulated from the reaction chamber. A cleaning gas containing halogen elements is introduced into the evacuated reaction chamber. The catalytic body is heated by the heating power supply. An active species generated by this heating reacts with an adhering film adhered to the interior of the reaction chamber, which is removed. During this removal, a DC bias voltage with appropriate polarity and appropriate value is applied from a constant-voltage power supply to the conductor of the heating power supply.

Abstract: A catalytic chemical vapor deposition apparatus is provided for producing a thin film of desired film quality, by making a particle countermeasure against the release gas such as H2O and deposit materials from or on members composing the structure of the inside of the processing chamber and the inner wall of the processing chamber.

Abstract: A method of forming a silicon nitride film comprises: forming a silicon nitride film by applying first gas containing silicon and nitrogen and second gas containing nitrogen and hydrogen to catalyst heated in a reduced pressure atmosphere. A method of manufacturing a semiconductor device comprising the steps of: forming a silicon nitride film by the method as claimed in claim 1 on a substrate having the semiconductor layer, a gate insulation film selectively provided on a principal surface of the semiconductor layer, and a gate electrode provided on the gate insulation film; and removing the silicon nitride film on the semiconductor layer and the gate electrode and leaving a sidewall comprising the silicon nitride film on a side surface of the gate insulation film and the gate electrode by etching the silicon nitride film in a direction generally normal to the principal surface of the semiconductor layer.

Abstract: Provided is a self-cleaning catalytic chemical vapor deposition apparatus which suppresses the corrosion-induced degradation of a catalytic body by a cleaning gas without heating a catalytic body to not less than 2000° C. and permits practical cleaning rates and good cleaning at low cost. With conductors 5a, 5b which supply a constant current to a catalytic body 4 within a reaction chamber 2 from a heating power supply 6 and terminals 6a, 6b of the heating power supply 6 kept electrically insulated from the reaction chamber 2, a cleaning gas containing halogen elements is introduced into the reaction chamber 2 which has been evacuated, and the catalytic body 4 is heated by the energization from the heating power supply 6. An active species generated by this heating is caused to react with an adhering film which adheres to the interior of the reaction chamber 2, whereby the adhering film is removed.

Abstract: A method of forming a silicon nitride film comprises: forming a silicon nitride film by applying first gas containing silicon and nitrogen and second gas containing nitrogen and hydrogen to catalyst heated in a reduced pressure atmosphere. A method of manufacturing a semiconductor device comprising the steps of: forming a silicon nitride film by the method as claimed in claim 1 on a substrate having the semiconductor layer, a gate insulation film selectively provided on a principal surface of the semiconductor layer, and a gate electrode provided on the gate insulation film; and removing the silicon nitride film on the semiconductor layer and the gate electrode and leaving a sidewall comprising the silicon nitride film on a side surface of the gate insulation film and the gate electrode by etching the silicon nitride film in a direction generally normal to the principal surface of the semiconductor layer.

Abstract: A method for manufacturing a capacitor is provided which can form a lower electrode having a high aspect ratio without suffering deterioration of the capacitor electric characteristics even when a platinum-group metal is adopted as the material of the lower electrode and a metal oxide having a high dielectric constant is adopted as the material of the dielectric film. Holes (8) that reach contact plugs (2) are formed in an insulating film (7). Then a dielectric film (9) is formed on the surfaces of the holes (8). Next the dielectric film (9) on the bottoms of the holes (8) are etched away to form holes (18) reaching the contact plugs (2). Lower electrodes (11) are then formed to fill the holes (8) and (18).

Abstract: A method for manufacturing a capacitor is provided which can form a lower electrode having a high aspect ratio without suffering deterioration of the capacitor electric characteristics even when a platinum-group metal is adopted as the material of the lower electrode and a metal oxide having a high dielectric constant is adopted as the material of the dielectric film. Holes (8) that reach contact plugs (2) are formed in an insulating film (7). Then a dielectric film (9) is formed on the surfaces of the holes (8). Next the dielectric film (9) on the bottoms of the holes (8) are etched away to form holes (18) reaching the contact plugs (2). Lower electrodes (11) are then formed to fill the holes (8) and (18).

Abstract: A semiconductor device having a stacked capacitor is provided. A dielectric film (81) formed of BST by a sputtering process is entirely provided to cover upper part of a plurality of storage node electrodes (SN2). A dielectric film (82) formed of BST by a CVD process is entirely provided to cover the dielectric film (81). The dielectric films (81, 82) constitute a dielectric layer (80). A conductive layer made of platinum covers an entire surface of the dielectric film (82) to constitute a counter electrode (9) to the storage node electrodes. The dielectric layer has good step coverage, reduced dependence upon its underlying layer, and good crystallinity.

Abstract: A first interlayer insulating film having a second contact hole is formed on a main surface of a semiconductor substrate 1 in a peripheral circuitry. A second plug electrode of the same material as a first plug electrode in a memory cell array is formed in the second contact hole. A pad layer is formed over the second plug electrode and a top surface of the first interlayer insulating film. The pad layer and a capacitor lower electrode are made of the same material. The pad layer is covered with the second interlayer insulating film. A third contact hole is formed at a portion of the second interlayer insulating film located above the pad layer. A first aluminum interconnection layer is formed in the third contact hole. Thereby, a contact can be formed easily between the interconnection layer and the main surface of the semiconductor substrate in the peripheral circuitry of a DRAM, and a manufacturing process can be simplified.

Abstract: A first interlayer insulating film having a second contact hole is formed on a main surface of a semiconductor substrate 1 in a peripheral circuitry. A second plug electrode of the same material as a first plug electrode in a memory cell array is formed in the second contact hole. A pad layer is formed over the second plug electrode and a top surface of the first interlayer insulating film. The pad layer and a capacitor lower electrode are made of the same material. The pad layer is covered with the second interlayer insulating film. A third contact hole is formed at a portion of the second interlayer insulating film located above the pad layer. A first aluminum interconnection layer is formed in the third contact hole. Thereby, a contact can be formed easily between the interconnection layer and the main surface of the semiconductor substrate in the peripheral circuitry of a DRAM, and a manufacturing process can be simplified.

Abstract: An object of the invention is to provide a capacitor having good anti-leak characteristics and good breakdown voltage characteristics. A transfer gate transistor having source/drain regions is formed on a surface of a silicon substrate. There is provided a lower electrode layer connected to the source/drain region through a plug layer which fills a contact hole formed at an interlayer insulating film. On the lower electrode layer, there is formed a capacitor insulating layer which includes a ferroelectric layer and exposes at least a sidewall surface of the lower electrode layer. The exposed sidewall surface of the lower electrode layer is covered with a sidewall insulating layer which is formed on a top surface of the interlayer insulating film and has a sidewall spacer configuration. The lower electrode layer is covered with an upper electrode layer with the sidewall insulating layer and capacitor insulating layer therebetween.

Abstract: In an electronic device using lead zirconate titanate (PZT) or lanthanum lead zirconate titanate (PLZT) as the main insulating material, a PZT film or a PLZT film is formed on a sub-insulating layer consisting essentially of lead titanate, lanthanum lead titanate, barium titanate, strontium titanate, barium strontium titanate, lead zirconate, or lanthanum lead zirconate. In an MIS structure, a semiconductor, the sub-insulating layer, the PZT film and metal are deposited in order. In a capacitor, the sub-insulating layer and the PZT film are sandwiched between a pair of electrodes. The sub-insulating layer improves crystallinity of PZT or PLZT, and the dielectric constant. An oxide of Pb, La, Zr or Ti can be added as the sub-insulating layer in order to further suppress current leakage.

Abstract: An object of the invention is to provide a capacitor having good anti-leak characteristics and good breakdown voltage characteristics. A transfer gate transistor having source/drain regions is formed on a surface of a silicon substrate. There is provided a lower electrode layer connected to the source/drain region through a plug layer which fills a contact hole formed at an interlayer insulating film. On the lower electrode layer, there is formed a capacitor insulating layer which includes a ferroelectric layer and exposes at least a sidewall surface of the lower electrode layer. The exposed sidewall surface of the lower electrode layer is covered with a sidewall insulating layer which is formed on a top surface of the interlayer insulating film and has a sidewall spacer configuration. The lower electrode layer is covered with an upper electrode layer with the sidewall insulating layer and capacitor insulating layer therebetween.

Abstract: A first interlayer insulating film having a second contact hole is formed on a main surface of a semiconductor substrate 1 in a peripheral circuitry. A second plug electrode of the same material as a first plug electrode in a memory cell array is formed in the second contact hole. A pad layer is formed over the second plug electrode and a top surface of the first interlayer insulating film. The pad layer and a capacitor lower electrode are made of the same material. The pad layer is covered with the second interlayer insulating film. A third contact hole is formed at a portion of the second interlayer insulating film located above the pad layer. A first aluminum interconnection layer is formed in the third contact hole. Thereby, a contact can be formed easily between the interconnection layer and the main surface of the semiconductor substrate in the peripheral circuitry of a DRAM, and a manufacturing process can be simplified.

Abstract: The present invention provides a method for removing a natural gas film or contaminant adhering on a surface of a silicon semiconductor substrate. The semiconductor substrate having the natural oxide film or contaminant adhered thereon is placed in a chamber. Then, a HCl gas is introduced into the chamber. The semiconductor substrate is heated at a temperature in the range of 200.degree..about.700.degree. C., while ultraviolet rays are irradiated into the chamber. According to the method, the reaction of the natural oxide with HCl gas is promoted by a synergistic effect of light and heat energy. Therefore, the natural oxide film or contaminant can be removed at a lower temperature with the help of the light energy.

Abstract: A method of forming a thin film for a semiconductor device, for forming a metal thin film by chemical vapor deposition on an intermediate layer which is provided on a substrate, comprises the steps of activating the surface of the intermediate layer by introducing a halide gas of a metal for forming the thin film onto the surface of the intermediate layer, forming nuclei on the surface of the intermediate layer by introducing a silane-system gas onto the activated surface of the intermediate layer, and introducing the halide gas and a reducing gas onto the surface of the intermediate layer formed with the nuclei, thereby depositing the metal thin film on the surface of the intermediate layer.

Abstract: A method of and an apparatus for removing a naturally grown oxide film and contaminants on the surface of a semiconductor substrate and then forming a thin film on the cleaned surface. The semiconductor substrate is placed in a pretreatment chamber and then hydrogen chloride gas is introduced into the chamber. Then, the semiconductor substrate is heated at a temperature between 200.degree..about.700.degree. C. and the surface of the semiconductor substrate is irradiated with ultraviolet rays, whereby the naturally grown oxide film and other contaminants on the semiconductor substrate can be removed. Then, a thin film is formed on the cleaned surface of the semiconductor substrate by a CVD method or a sputter method. According to this method, the naturally oxide film and other contaminants can be removed from the surface of the semiconductor substrate at a low temperature and the thin film can be formed on the cleaned surface.

Abstract: A semiconductor device capable of improving pressure-resistant and leakage-resistant characteristics of a stacked type capacitor formed on a planarized insulating layer. The semiconductor device includes a plug electrode layer 313 of at least one material selected from the group consisting of TiN, Ti, W, and WN, buried in a contact hole 311a of an interlayer insulating films 311 and extending on and along the upper surface of interlayer insulating film 311. As a result, creation of a stepped portion on platinum layer 314 constituting a capacitor lower electrode to be formed on the plug electrode 313 is prevented, and the thickness of a PZT film 315 to be formed on platinum layer 314 is not disadvantageously made thin at the stepped portion.