Abstract: A semiconductor device with a resistor element whose the resistance value can be adjusted to a desired value without changing dimensions thereof is provided. The resistor element is formed of a poly-Si layer formed on an insulator over a semiconductor substrate. An impurity is introduced into the poly-Si layer by the use of ion implantation. In the vicinity of both ends of the poly-Si layer forming the resistor element, silicide layers each made of cobalt silicide or the like are formed over an upper surface of the poly-Si layer. The area of one silicide layer is larger than that of the other silicide layer. By adjusting the area of the one silicide layer, the length between the silicide layers is adjusted and the resistance value of the resistor element can be adjusted without changing the shape of the poly-Si layer.

Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline silicon layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.

Abstract: A bipolar transistor is provided which is of high reliability and high gain, and which is particularly suitable to high speed operation. The bipolar transistor operates with high accuracy and with no substantial change of collector current even upon change of collector voltage. It also has less variation than conventional bipolar transistors for the collector current while ensuring high speed properties and high gain. In one example, the band gap in the base region is smaller than the band gap in the emitter and collector regions. The band gap is constant near the junction with the emitter region and decreases toward the junction with the collector region. A single crystal silicon/germanium is a typically used for the base region.

Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the polycrystalline first silicon layer has a positive in temperature dependence of resist while the second polycrystalline layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.

Abstract: A bipolar transistor is provided which is of high reliability and high gain, and which is particularly suitable to high speed operation. The bipolar transistor operates with high accuracy and with no substantial change of collector current even upon change of collector voltage. It also has less variation than conventional bipolar transistors for the collector current while ensuring high speed properties and high gain. In one example, the band gap in the base region is smaller than the band gap in the emitter and collector regions. The band gap is constant near the junction with the emitter region and decreases toward the junction with the collector region. A single crystal silicon/germanium is a typically used for the base region.

Abstract: A high-speed bipolar transistor is provided which is improved in the effect of heat radiation without increasing the substrate capacitance. The heat radiation connection between a base region and a silicon substrate includes a p+ extrinsic base polysilicon electrode and a polysilicon layer buried in an isolation groove with a very thin silicon dioxide side wall. Accordingly, the heat generated at the base is radiated through this path to the silicon substrate. Further, the film thickness of the silicon dioxide on the inner wall of the isolation groove is sufficiently increased compared with previous structures to prevent an increase in the substrate capacitance. Consequently, there can be obtained a bipolar transistor which operates at high speed, and is improved in the effect of heat radiation without increasing the substrate capacitance.

Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistances while the second polycrystalline layer has a negative temperature dependance of resistance, or vise versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.

Abstract: A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si—Ge and a base leading-out electrode are connected via a link base made of polycrystal Si—Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si—Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.

Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.

Abstract: A high-speed bipolar transistor is provided which is improved in the effect of heat radiation without increasing the substrate capacitance. The heat radiation connection between a base region and a silicon substrate includes a p+ extrinsic base polysilicon electrode and a polysilicon layer buried in an isolation groove with a very thin silicon dioxide side wall. Accordingly, the heat generated at the base is radiated through this path to the silicon substrate. Further, the film thickness of the silicon dioxide on the inner wall of the isolation groove is sufficiently increased compared with previous structures to prevent an increase in the substrate capacitance. Consequently, there can be obtained a bipolar transistor which operates at high speed, and is improved in the effect of heat radiation without increasing the substrate capacitance.

Abstract: A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si—Ge and a base leading-out electrode are connected via a link base made of polycrystal Si—Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si—Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.

Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.

Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.

Abstract: A high-speed bipolar transistor is provided which is improved in the effect of heat radiation without increasing the substrate capacitance. The heat radiation connection between a base region and a silicon substrate includes a p+ extrinsic base polysilicon electrode and a polysilicon layer buried in an isolation groove with a very thin silicon dioxide side wall. Accordingly, the heat generated at the base is radiated through this path to the silicon substrate. Further, the film thickness of the silicon dioxide on the inner wall of the isolation groove is sufficiently increased compared with previous structures to prevent an increase in the substrate capacitance. Consequently, there can be obtained a bipolar transistor which operates at high speed, and is improved in the effect of heat radiation without increasing the substrate capacitance.

Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor , wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.

Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.

Abstract: A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si—Ge and a base leading-out electrode are connected via a link base made of polycrystal Si—Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si—Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.

Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.

Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.